xref: /linux/drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h (revision b2c41fa9dd8fc740c489e060b199165771f268d1)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * sun4i-ss.h - hardware cryptographic accelerator for Allwinner A20 SoC
4  *
5  * Copyright (C) 2013-2015 Corentin LABBE <clabbe.montjoie@gmail.com>
6  *
7  * Support AES cipher with 128,192,256 bits keysize.
8  * Support MD5 and SHA1 hash algorithms.
9  * Support DES and 3DES
10  *
11  * You could find the datasheet in Documentation/arch/arm/sunxi.rst
12  */
13 
14 #include <linux/clk.h>
15 #include <linux/crypto.h>
16 #include <linux/io.h>
17 #include <linux/module.h>
18 #include <linux/of.h>
19 #include <linux/platform_device.h>
20 #include <linux/reset.h>
21 #include <crypto/scatterwalk.h>
22 #include <linux/scatterlist.h>
23 #include <linux/interrupt.h>
24 #include <linux/delay.h>
25 #include <linux/pm_runtime.h>
26 #include <crypto/md5.h>
27 #include <crypto/skcipher.h>
28 #include <crypto/sha1.h>
29 #include <crypto/hash.h>
30 #include <crypto/internal/hash.h>
31 #include <crypto/internal/skcipher.h>
32 #include <crypto/aes.h>
33 #include <crypto/internal/des.h>
34 
35 #define SS_CTL            0x00
36 #define SS_KEY0           0x04
37 #define SS_KEY1           0x08
38 #define SS_KEY2           0x0C
39 #define SS_KEY3           0x10
40 #define SS_KEY4           0x14
41 #define SS_KEY5           0x18
42 #define SS_KEY6           0x1C
43 #define SS_KEY7           0x20
44 
45 #define SS_IV0            0x24
46 #define SS_IV1            0x28
47 #define SS_IV2            0x2C
48 #define SS_IV3            0x30
49 
50 #define SS_FCSR           0x44
51 
52 #define SS_MD0            0x4C
53 #define SS_MD1            0x50
54 #define SS_MD2            0x54
55 #define SS_MD3            0x58
56 #define SS_MD4            0x5C
57 
58 #define SS_RXFIFO         0x200
59 #define SS_TXFIFO         0x204
60 
61 /* SS_CTL configuration values */
62 
63 /* IV mode for hash */
64 #define SS_IV_ARBITRARY		(1 << 14)
65 
66 /* SS operation mode - bits 12-13 */
67 #define SS_ECB			(0 << 12)
68 #define SS_CBC			(1 << 12)
69 #define SS_CTS			(3 << 12)
70 
71 /* Counter width for CNT mode - bits 10-11 */
72 #define SS_CNT_16BITS		(0 << 10)
73 #define SS_CNT_32BITS		(1 << 10)
74 #define SS_CNT_64BITS		(2 << 10)
75 
76 /* Key size for AES - bits 8-9 */
77 #define SS_AES_128BITS		(0 << 8)
78 #define SS_AES_192BITS		(1 << 8)
79 #define SS_AES_256BITS		(2 << 8)
80 
81 /* Operation direction - bit 7 */
82 #define SS_ENCRYPTION		(0 << 7)
83 #define SS_DECRYPTION		(1 << 7)
84 
85 /* SS Method - bits 4-6 */
86 #define SS_OP_AES		(0 << 4)
87 #define SS_OP_DES		(1 << 4)
88 #define SS_OP_3DES		(2 << 4)
89 #define SS_OP_SHA1		(3 << 4)
90 #define SS_OP_MD5		(4 << 4)
91 
92 /* Data end bit - bit 2 */
93 #define SS_DATA_END		(1 << 2)
94 
95 /* SS Enable bit - bit 0 */
96 #define SS_DISABLED		(0 << 0)
97 #define SS_ENABLED		(1 << 0)
98 
99 /* SS_FCSR configuration values */
100 /* RX FIFO status - bit 30 */
101 #define SS_RXFIFO_FREE		(1 << 30)
102 
103 /* RX FIFO empty spaces - bits 24-29 */
104 #define SS_RXFIFO_SPACES(val)	(((val) >> 24) & 0x3f)
105 
106 /* TX FIFO status - bit 22 */
107 #define SS_TXFIFO_AVAILABLE	(1 << 22)
108 
109 /* TX FIFO available spaces - bits 16-21 */
110 #define SS_TXFIFO_SPACES(val)	(((val) >> 16) & 0x3f)
111 
112 #define SS_RX_MAX	32
113 #define SS_RX_DEFAULT	SS_RX_MAX
114 #define SS_TX_MAX	33
115 
116 #define SS_RXFIFO_EMP_INT_PENDING	(1 << 10)
117 #define SS_TXFIFO_AVA_INT_PENDING	(1 << 8)
118 #define SS_RXFIFO_EMP_INT_ENABLE	(1 << 2)
119 #define SS_TXFIFO_AVA_INT_ENABLE	(1 << 0)
120 
121 /*
122  * struct ss_variant - Describe SS hardware variant
123  * @sha1_in_be:		The SHA1 digest is given by SS in BE, and so need to be inverted.
124  */
125 struct ss_variant {
126 	bool sha1_in_be;
127 };
128 
129 struct sun4i_ss_ctx {
130 	const struct ss_variant *variant;
131 	void __iomem *base;
132 	int irq;
133 	struct clk *busclk;
134 	struct clk *ssclk;
135 	struct reset_control *reset;
136 	struct device *dev;
137 	struct resource *res;
138 	char buf[4 * SS_RX_MAX];/* buffer for linearize SG src */
139 	char bufo[4 * SS_TX_MAX]; /* buffer for linearize SG dst */
140 	spinlock_t slock; /* control the use of the device */
141 	struct dentry *dbgfs_dir;
142 	struct dentry *dbgfs_stats;
143 };
144 
145 struct sun4i_ss_alg_template {
146 	u32 type;
147 	u32 mode;
148 	union {
149 		struct skcipher_alg crypto;
150 		struct ahash_alg hash;
151 	} alg;
152 	struct sun4i_ss_ctx *ss;
153 	unsigned long stat_req;
154 	unsigned long stat_fb;
155 	unsigned long stat_bytes;
156 	unsigned long stat_opti;
157 };
158 
159 struct sun4i_tfm_ctx {
160 	u32 key[AES_MAX_KEY_SIZE / 4];/* divided by sizeof(u32) */
161 	u32 keylen;
162 	u32 keymode;
163 	struct sun4i_ss_ctx *ss;
164 	struct crypto_skcipher *fallback_tfm;
165 };
166 
167 struct sun4i_cipher_req_ctx {
168 	u32 mode;
169 	u8 backup_iv[AES_BLOCK_SIZE];
170 	struct skcipher_request fallback_req;   // keep at the end
171 };
172 
173 struct sun4i_req_ctx {
174 	u32 mode;
175 	u64 byte_count; /* number of bytes "uploaded" to the device */
176 	u32 hash[5]; /* for storing SS_IVx register */
177 	char buf[64];
178 	unsigned int len;
179 	int flags;
180 };
181 
182 int sun4i_hash_crainit(struct crypto_tfm *tfm);
183 void sun4i_hash_craexit(struct crypto_tfm *tfm);
184 int sun4i_hash_init(struct ahash_request *areq);
185 int sun4i_hash_update(struct ahash_request *areq);
186 int sun4i_hash_final(struct ahash_request *areq);
187 int sun4i_hash_finup(struct ahash_request *areq);
188 int sun4i_hash_digest(struct ahash_request *areq);
189 int sun4i_hash_export_md5(struct ahash_request *areq, void *out);
190 int sun4i_hash_import_md5(struct ahash_request *areq, const void *in);
191 int sun4i_hash_export_sha1(struct ahash_request *areq, void *out);
192 int sun4i_hash_import_sha1(struct ahash_request *areq, const void *in);
193 
194 int sun4i_ss_cbc_aes_encrypt(struct skcipher_request *areq);
195 int sun4i_ss_cbc_aes_decrypt(struct skcipher_request *areq);
196 int sun4i_ss_ecb_aes_encrypt(struct skcipher_request *areq);
197 int sun4i_ss_ecb_aes_decrypt(struct skcipher_request *areq);
198 
199 int sun4i_ss_cbc_des_encrypt(struct skcipher_request *areq);
200 int sun4i_ss_cbc_des_decrypt(struct skcipher_request *areq);
201 int sun4i_ss_ecb_des_encrypt(struct skcipher_request *areq);
202 int sun4i_ss_ecb_des_decrypt(struct skcipher_request *areq);
203 
204 int sun4i_ss_cbc_des3_encrypt(struct skcipher_request *areq);
205 int sun4i_ss_cbc_des3_decrypt(struct skcipher_request *areq);
206 int sun4i_ss_ecb_des3_encrypt(struct skcipher_request *areq);
207 int sun4i_ss_ecb_des3_decrypt(struct skcipher_request *areq);
208 
209 int sun4i_ss_cipher_init(struct crypto_tfm *tfm);
210 void sun4i_ss_cipher_exit(struct crypto_tfm *tfm);
211 int sun4i_ss_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
212 			unsigned int keylen);
213 int sun4i_ss_des_setkey(struct crypto_skcipher *tfm, const u8 *key,
214 			unsigned int keylen);
215 int sun4i_ss_des3_setkey(struct crypto_skcipher *tfm, const u8 *key,
216 			 unsigned int keylen);
217