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Searched refs:SSL (Results 1 – 11 of 11) sorted by relevance

/linux/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh7720.c227 DMAC1, LCDC, SSL, enumerator
249 INTC_VECT(SSL, 0x980),
271 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
/linux/arch/arm64/boot/dts/renesas/
H A Drzg2ul-smarc-pinfunction.dtsi112 <RZG2L_PORT_PINMUX(4, 3, 2)>; /* SSL */
H A Drzg2lc-smarc-pinfunction.dtsi122 <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
H A Drzg2l-smarc-pinfunction.dtsi141 <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
/linux/arch/um/drivers/
H A DKconfig11 config SSL config
/linux/drivers/crypto/
H A DKconfig431 bool "Support for Atmel IPSEC/SSL hw accelerator"
436 to enhance support of IPSEC/SSL.
/linux/Documentation/networking/
H A Dtls-offload.rst312 in the SSL/TLS version field of the header. Once pattern is matched
/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a7792.c543 PINMUX_IPSR_GPSR(IP1_22, SSL),
H A Dpfc-r8a7794.c915 PINMUX_IPSR_GPSR(IP3_9_8, SSL),
H A Dpfc-r8a7790.c1022 PINMUX_IPSR_GPSR(IP4_14_12, SSL),
H A Dpfc-r8a7791.c944 PINMUX_IPSR_MSEL(IP2_18_16, SSL, SEL_QSP_0),