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Searched refs:SOCCLK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h379 double SOCCLK; /// <brief Basically just the clock freq at the min (or given) state member
890 double SOCCLK; /// <brief Basically just the clock freq at the min (or given) state member
1239 double SOCCLK; /// <brief Basically just the clock freq at the min (or given) state member
1806 double SOCCLK; member
H A Ddml2_core_dcn5_funcs_mode_programming.c50 s->SOCCLK = min_sop.socclk_khz / 1000.0; in dcn5_mode_programming()
108 DML_ASSERT(s->SOCCLK > 0); in dcn5_mode_programming()
121 DML_LOG_VERBOSE("DML::%s: SOCCLK = %f\n", __func__, s->SOCCLK); in dcn5_mode_programming()
1099 CalculateWatermarks_params->SOCCLK = s->SOCCLK; in dcn5_mode_programming()
H A Ddml2_core_dcn6_calcs_dchub.c1140 …atermark = p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in dcn6_calculate_watermarks_and_dram_speed_change_support()
1149 …eLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in dcn6_calculate_watermarks_and_dram_speed_change_support()
1150 …hangeLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024 / 32 / p->SOCCLK; in dcn6_calculate_watermarks_and_dram_speed_change_support()
H A Ddml2_core_dcn5_calcs_dchub.c4306 …itebackLatency + (s->TotalActiveWriteback - 1) * p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in dcn5_calculate_watermarks_and_dram_speed_change_support()
4315 …itebackLatency + (s->TotalActiveWriteback - 1) * p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in dcn5_calculate_watermarks_and_dram_speed_change_support()
4316 …itebackLatency + (s->TotalActiveWriteback - 1) * p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in dcn5_calculate_watermarks_and_dram_speed_change_support()
4328 …pt_blackout_us + (s->TotalActiveWriteback - 1) * p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in dcn5_calculate_watermarks_and_dram_speed_change_support()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h833 dml_float_t SOCCLK; /// <brief Basically just the clock freq at the min (or given) state member
1346 dml_float_t SOCCLK; member
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c114 FEA_MAP_REVERSE(SOCCLK),
H A Dsmu_v13_0_4_ppt.c118 FEA_MAP_REVERSE(SOCCLK),
H A Dyellow_carp_ppt.c114 FEA_MAP_REVERSE(SOCCLK),
H A Dsmu_v13_0_7_ppt.c169 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
H A Dsmu_v13_0_0_ppt.c178 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0_0_ppt.c138 FEA_MAP_REVERSE(SOCCLK),
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c153 CLK_MAP(SOCCLK, PPCLK_SOCCLK),