Searched refs:SNPS_PHY_MPLLB_DIV5_CLK_EN (Results 1 – 2 of 2) sorted by relevance
31 #define SNPS_PHY_MPLLB_DIV5_CLK_EN REG_BIT(29) macro
271 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, pll_params.mpll_div5_en) | in intel_snps_hdmi_pll_compute_mpllb()