1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2023-2026 ARM Ltd. 4 * 5 * The values and structures in this file are from the Realm Management Monitor 6 * specification (DEN0137) version 2.0-bet3: 7 * https://developer.arm.com/documentation/den0137/2-0bet3/ 8 */ 9 10 #ifndef __LINUX_ARM_SMCCC_RMI_H_ 11 #define __LINUX_ARM_SMCCC_RMI_H_ 12 13 #include <linux/arm-smccc.h> 14 #include <linux/bitfield.h> 15 #include <linux/bits.h> 16 #include <linux/build_bug.h> 17 #include <linux/sizes.h> 18 #include <linux/stddef.h> 19 20 #include <asm/page.h> 21 22 #define SMC_RMI_CALL(func) \ 23 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 24 ARM_SMCCC_SMC_64, \ 25 ARM_SMCCC_OWNER_STANDARD, \ 26 (func)) 27 28 #define SMC_RMI_VERSION SMC_RMI_CALL(0x0150) 29 30 #define SMC_RMI_RTT_DATA_MAP_INIT SMC_RMI_CALL(0x0153) 31 32 #define SMC_RMI_REALM_ACTIVATE SMC_RMI_CALL(0x0157) 33 #define SMC_RMI_REALM_CREATE SMC_RMI_CALL(0x0158) 34 #define SMC_RMI_REALM_DESTROY SMC_RMI_CALL(0x0159) 35 #define SMC_RMI_REC_CREATE SMC_RMI_CALL(0x015a) 36 #define SMC_RMI_REC_DESTROY SMC_RMI_CALL(0x015b) 37 #define SMC_RMI_REC_ENTER SMC_RMI_CALL(0x015c) 38 #define SMC_RMI_RTT_CREATE SMC_RMI_CALL(0x015d) 39 #define SMC_RMI_RTT_DESTROY SMC_RMI_CALL(0x015e) 40 41 #define SMC_RMI_RTT_READ_ENTRY SMC_RMI_CALL(0x0161) 42 43 #define SMC_RMI_RTT_DEV_VALIDATE SMC_RMI_CALL(0x0163) 44 #define SMC_RMI_PSCI_COMPLETE SMC_RMI_CALL(0x0164) 45 #define SMC_RMI_FEATURES SMC_RMI_CALL(0x0165) 46 #define SMC_RMI_RTT_FOLD SMC_RMI_CALL(0x0166) 47 48 #define SMC_RMI_RTT_INIT_RIPAS SMC_RMI_CALL(0x0168) 49 #define SMC_RMI_RTT_SET_RIPAS SMC_RMI_CALL(0x0169) 50 #define SMC_RMI_VSMMU_CREATE SMC_RMI_CALL(0x016a) 51 #define SMC_RMI_VSMMU_DESTROY SMC_RMI_CALL(0x016b) 52 53 #define SMC_RMI_RMM_CONFIG_SET SMC_RMI_CALL(0x016e) 54 #define SMC_RMI_PSMMU_IRQ_NOTIFY SMC_RMI_CALL(0x016f) 55 #define SMC_RMI_ATTEST_PLAT_TOKEN_REFRESH SMC_RMI_CALL(0x0170) 56 57 #define SMC_RMI_PDEV_ABORT SMC_RMI_CALL(0x0174) 58 #define SMC_RMI_PDEV_COMMUNICATE SMC_RMI_CALL(0x0175) 59 #define SMC_RMI_PDEV_CREATE SMC_RMI_CALL(0x0176) 60 #define SMC_RMI_PDEV_DESTROY SMC_RMI_CALL(0x0177) 61 #define SMC_RMI_PDEV_GET_STATE SMC_RMI_CALL(0x0178) 62 63 #define SMC_RMI_PDEV_STREAM_KEY_REFRESH SMC_RMI_CALL(0x017a) 64 #define SMC_RMI_PDEV_SET_PUBKEY SMC_RMI_CALL(0x017b) 65 #define SMC_RMI_PDEV_STOP SMC_RMI_CALL(0x017c) 66 #define SMC_RMI_RTT_AUX_CREATE SMC_RMI_CALL(0x017d) 67 #define SMC_RMI_RTT_AUX_DESTROY SMC_RMI_CALL(0x017e) 68 #define SMC_RMI_RTT_AUX_FOLD SMC_RMI_CALL(0x017f) 69 70 #define SMC_RMI_VDEV_ABORT SMC_RMI_CALL(0x0185) 71 #define SMC_RMI_VDEV_COMMUNICATE SMC_RMI_CALL(0x0186) 72 #define SMC_RMI_VDEV_CREATE SMC_RMI_CALL(0x0187) 73 #define SMC_RMI_VDEV_DESTROY SMC_RMI_CALL(0x0188) 74 #define SMC_RMI_VDEV_GET_STATE SMC_RMI_CALL(0x0189) 75 #define SMC_RMI_VDEV_UNLOCK SMC_RMI_CALL(0x018a) 76 #define SMC_RMI_RTT_SET_S2AP SMC_RMI_CALL(0x018b) 77 78 #define SMC_RMI_VDEV_GET_INTERFACE_REPORT SMC_RMI_CALL(0x01d0) 79 #define SMC_RMI_VDEV_GET_MEASUREMENTS SMC_RMI_CALL(0x01d1) 80 #define SMC_RMI_VDEV_LOCK SMC_RMI_CALL(0x01d2) 81 #define SMC_RMI_VDEV_START SMC_RMI_CALL(0x01d3) 82 83 #define SMC_RMI_VSMMU_EVENT_HANDLE SMC_RMI_CALL(0x01d6) 84 #define SMC_RMI_PSMMU_ACTIVATE SMC_RMI_CALL(0x01d7) 85 #define SMC_RMI_PSMMU_DEACTIVATE SMC_RMI_CALL(0x01d8) 86 87 #define SMC_RMI_PSMMU_ST_L2_CREATE SMC_RMI_CALL(0x01db) 88 #define SMC_RMI_PSMMU_ST_L2_DESTROY SMC_RMI_CALL(0x01dc) 89 #define SMC_RMI_DPT_L0_CREATE SMC_RMI_CALL(0x01dd) 90 #define SMC_RMI_DPT_L0_DESTROY SMC_RMI_CALL(0x01de) 91 #define SMC_RMI_DPT_L1_CREATE SMC_RMI_CALL(0x01df) 92 #define SMC_RMI_DPT_L1_DESTROY SMC_RMI_CALL(0x01e0) 93 #define SMC_RMI_GRANULE_TRACKING_GET SMC_RMI_CALL(0x01e1) 94 95 #define SMC_RMI_GRANULE_TRACKING_SET SMC_RMI_CALL(0x01e3) 96 97 #define SMC_RMI_RMM_CONFIG_GET SMC_RMI_CALL(0x01ec) 98 99 #define SMC_RMI_RMM_STATE_GET SMC_RMI_CALL(0x01ee) 100 101 #define SMC_RMI_PSMMU_EVENT_CONSUME SMC_RMI_CALL(0x01f0) 102 #define SMC_RMI_GRANULE_RANGE_DELEGATE SMC_RMI_CALL(0x01f1) 103 #define SMC_RMI_GRANULE_RANGE_UNDELEGATE SMC_RMI_CALL(0x01f2) 104 #define SMC_RMI_GPT_L1_CREATE SMC_RMI_CALL(0x01f3) 105 #define SMC_RMI_GPT_L1_DESTROY SMC_RMI_CALL(0x01f4) 106 #define SMC_RMI_RTT_DATA_MAP SMC_RMI_CALL(0x01f5) 107 #define SMC_RMI_RTT_DATA_UNMAP SMC_RMI_CALL(0x01f6) 108 #define SMC_RMI_RTT_DEV_MAP SMC_RMI_CALL(0x01f7) 109 #define SMC_RMI_RTT_DEV_UNMAP SMC_RMI_CALL(0x01f8) 110 #define SMC_RMI_RTT_ARCH_DEV_MAP SMC_RMI_CALL(0x01f9) 111 #define SMC_RMI_RTT_ARCH_DEV_UNMAP SMC_RMI_CALL(0x01fa) 112 #define SMC_RMI_RTT_UNPROT_MAP SMC_RMI_CALL(0x01fb) 113 #define SMC_RMI_RTT_UNPROT_UNMAP SMC_RMI_CALL(0x01fc) 114 #define SMC_RMI_RTT_AUX_PROT_MAP SMC_RMI_CALL(0x01fd) 115 #define SMC_RMI_RTT_AUX_PROT_UNMAP SMC_RMI_CALL(0x01fe) 116 #define SMC_RMI_RTT_AUX_UNPROT_MAP SMC_RMI_CALL(0x01ff) 117 #define SMC_RMI_RTT_AUX_UNPROT_UNMAP SMC_RMI_CALL(0x0200) 118 #define SMC_RMI_REALM_TERMINATE SMC_RMI_CALL(0x0201) 119 #define SMC_RMI_RMM_ACTIVATE SMC_RMI_CALL(0x0202) 120 #define SMC_RMI_OP_CONTINUE SMC_RMI_CALL(0x0203) 121 #define SMC_RMI_PDEV_STREAM_CONNECT SMC_RMI_CALL(0x0204) 122 #define SMC_RMI_PDEV_STREAM_DISCONNECT SMC_RMI_CALL(0x0205) 123 #define SMC_RMI_PDEV_STREAM_COMPLETE SMC_RMI_CALL(0x0206) 124 #define SMC_RMI_PDEV_STREAM_KEY_PURGE SMC_RMI_CALL(0x0207) 125 #define SMC_RMI_OP_MEM_DONATE SMC_RMI_CALL(0x0208) 126 #define SMC_RMI_OP_MEM_RECLAIM SMC_RMI_CALL(0x0209) 127 #define SMC_RMI_OP_CANCEL SMC_RMI_CALL(0x020a) 128 #define SMC_RMI_VSMMU_FEATURES SMC_RMI_CALL(0x020b) 129 #define SMC_RMI_VSMMU_CMD_GET SMC_RMI_CALL(0x020c) 130 #define SMC_RMI_VSMMU_CMD_COMPLETE SMC_RMI_CALL(0x020d) 131 #define SMC_RMI_PSMMU_INFO SMC_RMI_CALL(0x020e) 132 #define SMC_RMI_RMM_DEACTIVATE SMC_RMI_CALL(0x020f) 133 #define SMC_RMI_PDEV_STREAM_INFO SMC_RMI_CALL(0x0210) 134 #define SMC_RMI_GPT_INFO SMC_RMI_CALL(0x0211) 135 136 #define RMI_ABI_MAJOR_VERSION 2 137 #define RMI_ABI_MINOR_VERSION 0 138 139 #define RMI_ABI_VERSION_MAJOR_MASK GENMASK(30, 16) 140 #define RMI_ABI_VERSION_MINOR_MASK GENMASK(15, 0) 141 142 #define RMI_ABI_VERSION_GET_MAJOR(v) FIELD_GET(RMI_ABI_VERSION_MAJOR_MASK, (v)) 143 #define RMI_ABI_VERSION_GET_MINOR(v) FIELD_GET(RMI_ABI_VERSION_MINOR_MASK, (v)) 144 #define RMI_ABI_VERSION(major, minor) \ 145 (FIELD_PREP(RMI_ABI_VERSION_MAJOR_MASK, (major)) | \ 146 FIELD_PREP(RMI_ABI_VERSION_MINOR_MASK, (minor))) 147 148 /* RmiResult Type definitions */ 149 #define RMI_RESULT_STATUS_MASK GENMASK(7, 0) 150 /* RmiResultDataLevel field */ 151 #define RMI_RESULT_DATA_LEVEL_MASK GENMASK(15, 8) 152 /* RmiResultDataIncomplete fields */ 153 #define RMI_RESULT_MEMREQ_MASK GENMASK(9, 8) 154 #define RMI_RESULT_CAN_CANCEL_MASK BIT(10) 155 156 #define RMI_RESULT_STATUS(ret) FIELD_GET(RMI_RESULT_STATUS_MASK, ret) 157 #define RMI_RESULT_DATA_LEVEL(ret) FIELD_GET(RMI_RESULT_DATA_LEVEL_MASK, ret) 158 #define RMI_RESULT_MEMREQ(ret) FIELD_GET(RMI_RESULT_MEMREQ_MASK, ret) 159 #define RMI_RESULT_CAN_CANCEL(ret) FIELD_GET(RMI_RESULT_CAN_CANCEL_MASK, ret) 160 161 #define RMI_SUCCESS 0 162 #define RMI_ERROR_INPUT 1 163 #define RMI_ERROR_REALM 2 164 #define RMI_ERROR_REC 3 165 #define RMI_ERROR_RTT 4 166 #define RMI_ERROR_NOT_SUPPORTED 5 167 #define RMI_ERROR_DEVICE 6 168 #define RMI_ERROR_RTT_AUX 7 169 #define RMI_ERROR_PSMMU_ST 8 170 #define RMI_ERROR_DPT 9 171 #define RMI_BUSY 10 172 #define RMI_ERROR_GLOBAL 11 173 #define RMI_ERROR_TRACKING 12 174 #define RMI_INCOMPLETE 13 175 #define RMI_BLOCKED 14 176 #define RMI_ERROR_GPT 15 177 #define RMI_ERROR_GRANULE 16 178 179 #define RMI_CONTINUE_KEEP_GOING 0 180 #define RMI_CONTINUE_STOP 1 181 182 #define RMI_OP_MEM_REQ_NONE 0 183 #define RMI_OP_MEM_REQ_DONATE 1 184 #define RMI_OP_MEM_REQ_RECLAIM 2 185 186 #define RMI_OP_CANNOT_CANCEL 0 187 #define RMI_OP_CAN_CANCEL 1 188 189 #define RMI_DONATE_STATE_MASK GENMASK(18, 17) 190 #define RMI_DONATE_CONTIG_MASK BIT(16) 191 #define RMI_DONATE_COUNT_MASK GENMASK(15, 2) 192 #define RMI_DONATE_BLOCK_SIZE_MASK GENMASK(1, 0) 193 194 #define RMI_DONATE_STATE(req) FIELD_GET(RMI_DONATE_STATE_MASK, req) 195 #define RMI_DONATE_CONTIG(req) FIELD_GET(RMI_DONATE_CONTIG_MASK, req) 196 #define RMI_DONATE_COUNT(req) FIELD_GET(RMI_DONATE_COUNT_MASK, req) 197 #define RMI_DONATE_BLOCK_SIZE(req) FIELD_GET(RMI_DONATE_BLOCK_SIZE_MASK, req) 198 199 #define RMI_OP_MEM_DELEGATED 0 200 #define RMI_OP_MEM_UNDELEGATED 1 201 #define RMI_OP_MEM_CONDITIONAL 2 202 203 #define RMI_OP_MEM_NON_CONTIG 0 204 #define RMI_OP_MEM_CONTIG 1 205 206 #define RMI_ADDR_TYPE_NONE 0 207 #define RMI_ADDR_TYPE_SINGLE 1 208 #define RMI_ADDR_TYPE_LIST 2 209 210 #define RMI_ADDR_RANGE_STATE_MASK GENMASK_ULL(63, 62) 211 #define RMI_ADDR_RANGE_ADDR_MASK GENMASK_ULL(51, PAGE_SHIFT) 212 #define RMI_ADDR_RANGE_COUNT_MASK GENMASK(PAGE_SHIFT - 1, 2) 213 #define RMI_ADDR_RANGE_BLOCK_SIZE_MASK GENMASK(1, 0) 214 215 #define RMI_ADDR_RANGE_STATE(r) FIELD_GET(RMI_ADDR_RANGE_STATE_MASK, (r)) 216 #define RMI_ADDR_RANGE_ADDR(r) ((r) & RMI_ADDR_RANGE_ADDR_MASK) 217 #define RMI_ADDR_RANGE_COUNT(r) FIELD_GET(RMI_ADDR_RANGE_COUNT_MASK, (r)) 218 #define RMI_ADDR_RANGE_BLOCK_SIZE(r) FIELD_GET(RMI_ADDR_RANGE_BLOCK_SIZE_MASK, (r)) 219 220 enum rmi_ripas { 221 RMI_EMPTY = 0, 222 RMI_RAM = 1, 223 RMI_DESTROYED = 2, 224 RMI_DEV = 3, 225 }; 226 227 #define RMI_NO_MEASURE_CONTENT 0 228 #define RMI_MEASURE_CONTENT 1 229 230 #define RMI_FEATURE_REGISTER_0_S2OASZ GENMASK_ULL(40, 33) 231 #define RMI_FEATURE_REGISTER_0_L0GPT_BLOCK_DELEGATE BIT_ULL(32) 232 #define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS GENMASK(31, 27) 233 #define RMI_FEATURE_REGISTER_0_PMU BIT(26) 234 #define RMI_FEATURE_REGISTER_0_NUM_WPS GENMASK(25, 20) 235 #define RMI_FEATURE_REGISTER_0_NUM_BPS GENMASK(19, 14) 236 #define RMI_FEATURE_REGISTER_0_SVE_VL GENMASK(13, 10) 237 #define RMI_FEATURE_REGISTER_0_SVE BIT(9) 238 #define RMI_FEATURE_REGISTER_0_LPA2 BIT(8) 239 #define RMI_FEATURE_REGISTER_0_S2SZ GENMASK(7, 0) 240 241 #define RMI_FEATURE_REGISTER_1_PPS GENMASK(16, 14) 242 #define RMI_FEATURE_REGISTER_1_L0GPTSZ GENMASK(13, 10) 243 #define RMI_FEATURE_REGISTER_1_MAX_RECS_ORDER GENMASK(9, 6) 244 #define RMI_FEATURE_REGISTER_1_HASH_SHA_512 BIT(5) 245 #define RMI_FEATURE_REGISTER_1_HASH_SHA_384 BIT(4) 246 #define RMI_FEATURE_REGISTER_1_HASH_SHA_256 BIT(3) 247 #define RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_64KB BIT(2) 248 #define RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_16KB BIT(1) 249 #define RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_4KB BIT(0) 250 251 #define RMI_FEATURE_REGISTER_2_REALM_MAX_VDEVS_ORDER GENMASK(14, 10) 252 #define RMI_FEATURE_REGISTER_2_NON_TEE_STREAM BIT(9) 253 #define RMI_FEATURE_REGISTER_2_VDEV_KROU BIT(8) 254 #define RMI_FEATURE_REGISTER_2_PDEV_MAX_VDEVS_ORDER GENMASK(7, 4) 255 #define RMI_FEATURE_REGISTER_2_ATS BIT(3) 256 #define RMI_FEATURE_REGISTER_2_VSMMU BIT(2) 257 #define RMI_FEATURE_REGISTER_2_DA_COH BIT(1) 258 #define RMI_FEATURE_REGISTER_2_DA BIT(0) 259 260 #define RMI_FEATURE_REGISTER_3_RTT_S2AP_INDIRECT BIT(6) 261 #define RMI_FEATURE_REGISTER_3_RTT_PLANE GENMASK(5, 4) 262 #define RMI_FEATURE_REGISTER_3_MAX_NUM_AUX_PLANES GENMASK(3, 0) 263 264 #define RMI_FEATURE_REGISTER_4_MEC_COUNT GENMASK_ULL(63, 0) 265 266 #define RMI_MEM_CATEGORY_CONVENTIONAL 0 267 #define RMI_MEM_CATEGORY_DEV_NCOH 1 268 #define RMI_MEM_CATEGORY_DEV_COH 2 269 #define RMI_MEM_CATEGORY_NONE 3 270 271 #define RMI_TRACKING_RESERVED 0 272 #define RMI_TRACKING_NONE 1 273 #define RMI_TRACKING_FINE 2 274 #define RMI_TRACKING_COARSE 3 275 #define RMI_TRACKING_INTERMEDIATE 4 276 277 #define RMI_GRANULE_SIZE_4KB 0 278 #define RMI_GRANULE_SIZE_16KB 1 279 #define RMI_GRANULE_SIZE_64KB 2 280 281 #define RMI_GPT_PAR_RESERVED 0U 282 #define RMI_GPT_PAR_PLAT 1U 283 #define RMI_GPT_PAR_HOST_NOT_CREATED 2U 284 #define RMI_GPT_PAR_HOST_CREATED 3U 285 286 /* 287 * Note many of these fields are smaller than u64 but all fields have u64 288 * alignment, so use u64 to ensure correct alignment. 289 */ 290 struct rmm_config { 291 union { /* 0x0 */ 292 struct { 293 u64 tracking_region_size; 294 u64 rmi_granule_size; 295 }; 296 u8 sizer[SZ_4K]; 297 }; 298 }; 299 300 static_assert(sizeof(struct rmm_config) == SZ_4K); 301 302 #define RMI_REALM_PARAM_FLAG_MEC_POLICY_MASK GENMASK(8, 7) 303 #define RMI_REALM_PARAM_FLAG_LFA_POLICY_MASK GENMASK(6, 5) 304 #define RMI_REALM_PARAM_FLAG_DA BIT(3) 305 #define RMI_REALM_PARAM_FLAG_PMU BIT(2) 306 #define RMI_REALM_PARAM_FLAG_SVE BIT(1) 307 308 #define RMI_HASH_SHA_256 0 309 #define RMI_HASH_SHA_512 1 310 #define RMI_HASH_SHA_384 2 311 312 struct realm_params { 313 union { /* 0x0 */ 314 struct { 315 u64 flags0; 316 u64 s2sz; 317 u64 sve_vl; 318 u64 num_bps; 319 u64 num_wps; 320 u64 pmu_num_ctrs; 321 u64 hash_algo; 322 u64 num_aux_planes; 323 }; 324 u8 sizer0[0x400]; 325 }; 326 union { /* 0x400 */ 327 struct { 328 u8 rpv[64]; 329 u64 ats_plane; 330 }; 331 u8 sizer1[0x400]; 332 }; 333 union { /* 0x800 */ 334 struct { 335 u64 sizer2; 336 u64 rtt_base; 337 s64 rtt_level_start; 338 u64 rtt_num_start; 339 u64 flags1; 340 u64 max_num_vdevs; 341 }; 342 u8 sizer3[0x700]; 343 }; 344 union { /* 0xf00 */ 345 struct { 346 u8 sizer4[0x80]; 347 u64 aux_rtt_base[3]; 348 }; 349 u8 sizer5[0x100]; 350 }; 351 }; 352 353 static_assert(offsetof(struct realm_params, rpv) == 0x400); 354 static_assert(offsetof(struct realm_params, rtt_base) == 0x808); 355 static_assert(offsetof(struct realm_params, aux_rtt_base) == 0xf80); 356 static_assert(sizeof(struct realm_params) == SZ_4K); 357 358 /* 359 * The number of GPRs (starting from X0) that are configured by the host when 360 * a REC is created. 361 */ 362 #define REC_CREATE_NR_GPRS 8 363 364 #define REC_PARAMS_FLAG_RUNNABLE BIT(0) 365 366 struct rec_params { 367 union { /* 0x0 */ 368 u64 flags; 369 u8 sizer0[0x100]; 370 }; 371 union { /* 0x100 */ 372 u64 mpidr; 373 u8 sizer1[0x100]; 374 }; 375 union { /* 0x200 */ 376 u64 pc; 377 u8 sizer2[0x100]; 378 }; 379 union { /* 0x300 */ 380 u64 gprs[REC_CREATE_NR_GPRS]; 381 u8 sizer3[0xd00]; 382 }; 383 }; 384 385 static_assert(offsetof(struct rec_params, mpidr) == 0x100); 386 static_assert(offsetof(struct rec_params, pc) == 0x200); 387 static_assert(offsetof(struct rec_params, gprs) == 0x300); 388 static_assert(sizeof(struct rec_params) == SZ_4K); 389 390 #define REC_ENTER_FLAG_FORCE_P0 BIT(7) 391 #define REC_ENTER_FLAG_DEV_MEM_RESPONSE BIT(6) 392 #define REC_ENTER_FLAG_S2AP_RESPONSE BIT(5) 393 #define REC_ENTER_FLAG_RIPAS_RESPONSE BIT(4) 394 #define REC_ENTER_FLAG_TRAP_WFE BIT(3) 395 #define REC_ENTER_FLAG_TRAP_WFI BIT(2) 396 #define REC_ENTER_FLAG_INJECT_SEA BIT(1) 397 #define REC_ENTER_FLAG_EMULATED_MMIO BIT(0) 398 399 #define REC_RUN_GPRS 31 400 401 struct rec_enter { 402 union { /* 0x000 */ 403 u64 flags; 404 u8 sizer0[0x200]; 405 }; 406 union { /* 0x200 */ 407 u64 gprs[REC_RUN_GPRS]; 408 u8 sizer1[0x600]; 409 }; 410 }; 411 412 static_assert(offsetof(struct rec_enter, gprs) == 0x200); 413 static_assert(sizeof(struct rec_enter) == SZ_2K); 414 415 #define RMI_EXIT_SYNC 0x00 416 #define RMI_EXIT_IRQ 0x01 417 #define RMI_EXIT_FIQ 0x02 418 #define RMI_EXIT_PSCI 0x03 419 #define RMI_EXIT_RIPAS_CHANGE 0x04 420 #define RMI_EXIT_HOST_CALL 0x05 421 #define RMI_EXIT_SERROR 0x06 422 #define RMI_EXIT_S2AP_CHANGE 0x07 423 #define RMI_EXIT_VDEV_VALIDATE_MAPPING 0x08 424 #define RMI_EXIT_VSMMU_COMMAND 0x0a 425 426 struct rec_exit { 427 union { /* 0x000 */ 428 u8 exit_reason; 429 u8 sizer0[0x100]; 430 }; 431 union { /* 0x100 */ 432 struct { 433 u64 esr; 434 u64 far; 435 u64 hpfar; 436 u64 rtt_tree; 437 }; 438 u8 sizer1[0x100]; 439 }; 440 union { /* 0x200 */ 441 u64 gprs[REC_RUN_GPRS]; 442 u8 sizer2[0x200]; 443 }; 444 union { /* 0x400 */ 445 struct { 446 u64 cntp_ctl; 447 u64 cntp_cval; 448 u64 cntv_ctl; 449 u64 cntv_cval; 450 }; 451 u8 sizer4[0x100]; 452 }; 453 union { /* 0x500 */ 454 struct { 455 u64 ripas_base; 456 u64 ripas_top; 457 u8 ripas_value; 458 u8 sizer5[0xf]; 459 u64 s2ap_base; 460 u64 s2ap_top; 461 u64 vdev_id_1; 462 u64 vdev_id_2; 463 u64 dev_mem_base; 464 u64 dev_mem_top; 465 u64 dev_mem_pa; 466 }; 467 u8 sizer6[0x100]; 468 }; 469 union { /* 0x600 */ 470 struct { 471 u16 imm; 472 u8 sizer7[0x6]; 473 u64 plane; 474 }; 475 u8 sizer8[0x100]; 476 }; 477 union { /* 0x700 */ 478 struct { 479 u8 pmu_ovf_status; 480 u8 sizer9[0xf]; 481 u64 vsmmu; 482 }; 483 u8 sizer10[0x100]; 484 }; 485 }; 486 487 static_assert(sizeof(struct rec_exit) == SZ_2K); 488 static_assert(offsetof(struct rec_exit, esr) == 0x100); 489 static_assert(offsetof(struct rec_exit, gprs) == 0x200); 490 static_assert(offsetof(struct rec_exit, cntp_ctl) == 0x400); 491 static_assert(offsetof(struct rec_exit, ripas_base) == 0x500); 492 static_assert(offsetof(struct rec_exit, imm) == 0x600); 493 static_assert(offsetof(struct rec_exit, pmu_ovf_status) == 0x700); 494 495 struct rec_run { 496 struct rec_enter enter; 497 struct rec_exit exit; 498 }; 499 500 static_assert(sizeof(struct rec_run) == SZ_4K); 501 502 /* RMI_RTT_UNPROT_MAP_FLAGS definitions */ 503 #define RMI_RTT_UNPROT_MAP_FLAGS_S2AP_MASK GENMASK(22, 19) 504 #define RMI_RTT_UNPROT_MAP_FLAGS_MEMATTR_MASK GENMASK(18, 16) 505 #define RMI_RTT_UNPROT_MAP_FLAGS_LIST_COUNT_MASK GENMASK(15, 2) 506 #define RMI_RTT_UNPROT_MAP_FLAGS_OADDR_TYPE_MASK GENMASK(1, 0) 507 508 /* RMI_RTT_PROT_MAP_FLAGS definitions */ 509 #define RMI_RTT_PROT_MAP_FLAGS_LIST_COUNT_MASK GENMASK(15, 2) 510 #define RMI_RTT_PROT_MAP_FLAGS_OADDR_TYPE_MASK GENMASK(1, 0) 511 512 /* S2AP Direct Encodings, used in RMI_RTT_UNPROT_MAP_FLAGS_S2AP */ 513 #define RMI_S2AP_DIRECT_READ BIT(1) 514 #define RMI_S2AP_DIRECT_WRITE BIT(0) 515 516 #endif /* __LINUX_ARM_SMCCC_RMI_H_ */ 517