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Searched refs:SMC_IND_ACCESS_CNTL (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dci_smc.c42 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in ci_set_smc_sram_address()
230 WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); in ci_load_smc_ucode()
240 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in ci_load_smc_ucode()
H A Dsi_smc.c42 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in si_set_smc_sram_address()
266 WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); in si_load_smc_ucode()
276 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in si_load_smc_ucode()
H A Dkv_smc.c83 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in kv_set_smc_sram_address()
H A Dsid.h55 #define SMC_IND_ACCESS_CNTL 0x228 macro
H A Dcikd.h425 #define SMC_IND_ACCESS_CNTL 0x240 macro
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_smc.c42 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in si_set_smc_sram_address()
229 WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); in amdgpu_si_load_smc_ucode()
239 WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); in amdgpu_si_load_smc_ucode()
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu7_smumgr.c44 …PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 0); /* on ci, SMC_IND_A… in smu7_set_smc_sram_address()
461 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 1); in smu7_upload_smc_firmware_data()
466 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 0); in smu7_upload_smc_firmware_data()
H A Dci_smumgr.c104 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); in ci_set_smc_sram_address()
2335 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 1); in ci_load_smc_ucode()
2342 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); in ci_load_smc_ucode()
H A Diceland_smumgr.c167 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 1); in iceland_upload_smc_firmware_data()
176 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); in iceland_upload_smc_firmware_data()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h56 #define SMC_IND_ACCESS_CNTL 0x8A macro