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Searched refs:SIMM (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrNEON.td3224 (outs DPR:$Vd), (ins DPR:$Vm, ImmTy:$SIMM), f, itin,
3225 OpcodeStr, Dt, "$Vd, $Vm, $SIMM", "",
3226 [(set DPR:$Vd, (Ty (OpNode (Ty DPR:$Vm), (i32 imm:$SIMM))))]>;
3231 (outs QPR:$Vd), (ins QPR:$Vm, ImmTy:$SIMM), f, itin,
3232 OpcodeStr, Dt, "$Vd, $Vm, $SIMM", "",
3233 [(set QPR:$Vd, (Ty (OpNode (Ty QPR:$Vm), (i32 imm:$SIMM))))]>;
3242 (outs QPR:$Vd), (ins DPR:$Vm, ImmTy:$SIMM), N2RegVShLFrm,
3243 IIC_VSHLiD, OpcodeStr, Dt, "$Vd, $Vm, $SIMM", "",
3244 [(set QPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vm), ImmTy:$SIMM)))]>;
3252 (outs DPR:$Vd), (ins QPR:$Vm, ImmTy:$SIMM), N2RegVShRFrm, itin,
[all …]
H A DARMInstrFormats.td2344 bits<13> SIMM;
2348 let Inst{24} = SIMM{7};
2349 let Inst{18-16} = SIMM{6-4};
2350 let Inst{3-0} = SIMM{3-0};
2446 bits<6> SIMM;
2452 let Inst{21-16} = SIMM{5-0};
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrVec.td557 RegisterClass RCM, Operand SIMM = simm7> {
563 defm iv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins SIMM:$sy, VRC:$vz)>;
569 RegisterClass RC, RegisterClass RCM, Operand SIMM = simm7> {
575 defm vi : RVmm<opcStr, ", $vy, $sy", opc, VRC, RCM, (ins VRC:$vy, SIMM:$sy)>;
579 defm iv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins SIMM:$sy, VRC:$vz)>;
663 RegisterClass RCM, Operand SIMM = simm7> {
672 (ins VRC:$vy, SIMM:$sy, VRC:$vw)>;
678 (ins SIMM:$sy, VRC:$vz, VRC:$vw)>;
735 Operand SIMM = uimm4> {
739 (ins RC:$vy, RC:$vz, SIMM:$sy)>;