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Searched refs:SDMA0_GFX_IB_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dcik_sdma.c266 WREG32(SDMA0_GFX_IB_CNTL + reg_offset, 0); in cik_sdma_gfx_stop()
421 WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl); in cik_sdma_gfx_resume()
H A Dcikd.h1994 #define SDMA0_GFX_IB_CNTL 0xD228 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v3_0.c522 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v3_0_gfx_stop()
730 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v3_0_gfx_resume()
732 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v3_0_gfx_resume()
H A Dsdma_v5_2.c423 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_2_gfx_stop()
671 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_2_gfx_resume_instance()
673 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_2_gfx_resume_instance()
1495 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_2_reset_queue()
H A Dsdma_v5_0.c604 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_0_gfx_stop()
855 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_0_gfx_resume_instance()
857 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_0_gfx_resume_instance()
1595 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_0_reset_queue()
H A Dsdma_v4_0.c932 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, enable ? 1 : 0); in sdma_v4_0_gfx_enable()
1157 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v4_0_gfx_resume()
1159 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v4_0_gfx_resume()