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Searched refs:SCLK_UART5 (Results 1 – 18 of 18) sorted by relevance

/linux/include/dt-bindings/clock/
H A Drockchip,rk3506-cru.h211 #define SCLK_UART5 198 macro
H A Drockchip,rv1106-cru.h197 #define SCLK_UART5 184 macro
H A Dpx30-cru.h30 #define SCLK_UART5 28 macro
H A Drockchip,rv1126b-cru.h42 #define SCLK_UART5 29 macro
H A Drockchip,rk3528-cru.h46 #define SCLK_UART5 34 macro
H A Drockchip,rv1126-cru.h98 #define SCLK_UART5 32 macro
H A Drockchip,rk3576-cru.h162 #define SCLK_UART5 144 macro
H A Drockchip,rk3588-cru.h202 #define SCLK_UART5 187 macro
H A Drk3568-cru.h367 #define SCLK_UART5 303 macro
/linux/drivers/clk/rockchip/
H A Dclk-rk3506.c648 COMPOSITE(SCLK_UART5, "sclk_uart5", sclk_uart_parents_p, 0,
H A Dclk-px30.c723 GATE(SCLK_UART5, "clk_uart5", "clk_uart5_mux", CLK_SET_RATE_PARENT,
H A Dclk-rv1126.c510 GATE(SCLK_UART5, "sclk_uart5", "sclk_uart5_mux", 0,
H A Dclk-rk3528.c360 GATE(SCLK_UART5, "sclk_uart5", "clk_uart5", 0,
H A Dclk-rv1126b.c282 COMPOSITE(SCLK_UART5, "sclk_uart5", mux_sclk_uart_src_p, 0,
H A Dclk-rv1106.c489 GATE(SCLK_UART5, "sclk_uart5", "clk_uart5", 0,
H A Dclk-rk3576.c679 COMPOSITE(SCLK_UART5, "sclk_uart5", clk_uart_p, 0,
H A Dclk-rk3588.c1270 GATE(SCLK_UART5, "sclk_uart5", "clk_uart5", 0,
/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30.dtsi559 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;