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Searched refs:SCLK_UART1 (Results 1 – 25 of 42) sorted by relevance

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/linux/include/dt-bindings/clock/
H A Drk3036-cru.h24 #define SCLK_UART1 78 macro
H A Dexynos7-clk.h96 #define SCLK_UART1 4 macro
H A Ds5pv210.h196 #define SCLK_UART1 174 macro
H A Drk3188-cru-common.h21 #define SCLK_UART1 65 macro
H A Drk3128-cru.h26 #define SCLK_UART1 78 macro
H A Drk3228-cru.h25 #define SCLK_UART1 78 macro
H A Drv1108-cru.h23 #define SCLK_UART1 73 macro
H A Drk3308-cru.h22 #define SCLK_UART1 18 macro
H A Drk3368-cru.h31 #define SCLK_UART1 78 macro
H A Dpx30-cru.h26 #define SCLK_UART1 24 macro
H A Drk3288-cru.h33 #define SCLK_UART1 78 macro
H A Drk3328-cru.h28 #define SCLK_UART1 39 macro
H A Drockchip,rv1126-cru.h25 #define SCLK_UART1 11 macro
H A Drk3399-cru.h39 #define SCLK_UART1 82 macro
H A Drockchip,rk3588-cru.h186 #define SCLK_UART1 171 macro
H A Drk3568-cru.h351 #define SCLK_UART1 287 macro
/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c154 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3128.c190 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3228.c204 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3328.c257 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,
H A Dclk-rv1108.c172 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3188.c264 MUX(SCLK_UART1, "sclk_uart1", mux_sclk_uart1_p, CLK_SET_RATE_PARENT,
/linux/drivers/clk/samsung/
H A Dclk-s5pv210.c598 GATE(SCLK_UART1, "sclk_uart1", "dout_uart1", CLK_SRC_MASK0, 13,
/linux/arch/arm/boot/dts/rockchip/
H A Drk3xxx.dtsi125 clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210.dtsi334 <&clocks SCLK_UART1>;

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