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Searched refs:R_FC0_BW_V1 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852b_common.c772 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_INV, sco_comp, phy_idx); in rtw8852bx_ctrl_ch()
910 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
927 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
944 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); in rtw8852bx_ctrl_bw()
961 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x1, phy_idx); in rtw8852bx_ctrl_bw()
979 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x2, phy_idx); in rtw8852bx_ctrl_bw()
1193 rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); in __rtw8852bx_set_channel_bb()
1626 rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x2); in __rtw8852bx_ctrl_btg_bt_rx()
1645 rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); in __rtw8852bx_ctrl_btg_bt_rx()
1662 rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG0, 1); in __rtw8852bx_bb_ctrl_rx_path()
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H A Drtw8851b.c1187 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_INV, sco_comp, phy_idx); in rtw8851b_ctrl_ch()
1297 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); in rtw8851b_ctrl_bw()
1302 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); in rtw8851b_ctrl_bw()
1307 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); in rtw8851b_ctrl_bw()
1312 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x1, phy_idx); in rtw8851b_ctrl_bw()
1324 rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x2, phy_idx); in rtw8851b_ctrl_bw()
1683 rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); in rtw8851b_set_channel_bb()
2033 rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x1); in rtw8851b_ctrl_btg_bt_rx()
2055 rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); in rtw8851b_ctrl_btg_bt_rx()
2070 rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG0, 1); in rtw8851b_bb_ctrl_rx_path()
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H A Dreg.h9702 #define R_FC0_BW_V1 0x49C0 macro