| /linux/drivers/net/wireless/realtek/rtw89/ |
| H A D | mac_be.c | 80 if (sel == RTW89_CMAC_SEL && mac_idx == RTW89_MAC_1 && in rtw89_mac_check_mac_en_be() 811 if (mac_idx > RTW89_MAC_1) in cmac_pwr_en_be() 870 if (mac_idx > RTW89_MAC_1) in cmac_func_en_be() 960 ret = cmac_pwr_en_be(rtwdev, RTW89_MAC_1, true); in mac_func_en_be() 964 ret = cmac_func_en_be(rtwdev, RTW89_MAC_1, true); in mac_func_en_be() 1596 if (mac_idx == RTW89_MAC_1) in resp_pktctl_init_be() 2150 ret = preload_init_be(rtwdev, RTW89_MAC_1, rtwdev->mac.qta_mode); in band1_enable_be() 2156 ret = cmac_pwr_en_be(rtwdev, RTW89_MAC_1, true); in band1_enable_be() 2158 rtw89_err(rtwdev, "[ERR]CMAC%d pwr en %d\n", RTW89_MAC_1, ret); in band1_enable_be() 2162 ret = cmac_func_en_be(rtwdev, RTW89_MAC_1, true); in band1_enable_be() [all …]
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| H A D | mac.h | 1429 rtw89_mac_cfg_phy_rpt(rtwdev, RTW89_MAC_1, enable); in rtw89_mac_cfg_phy_rpt_bands() 1452 return rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_1, enable); in rtw89_mac_cfg_ppdu_status_bands() 1493 rtw89_mac_set_edcca_mode(rtwdev, RTW89_MAC_1, normal); in rtw89_mac_set_edcca_mode_bands()
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| H A D | coex.c | 4262 wl->afh_info[RTW89_MAC_1][RTW89_BAND_2G].en) { in _set_wl_ch_map() 4264 if (wl->afh_info[RTW89_MAC_1][RTW89_BAND_2G].bw > in _set_wl_ch_map() 4266 hwb = RTW89_MAC_1; in _set_wl_ch_map() 4269 } else if (wl->afh_info[RTW89_MAC_1][RTW89_BAND_2G].en) { in _set_wl_ch_map() 4270 hwb = RTW89_MAC_1; in _set_wl_ch_map() 4507 wl->afh_info[RTW89_MAC_1][j].en) { in _set_bt_afh_info() 4509 if (wl->afh_info[RTW89_MAC_1][j].bw > in _set_bt_afh_info() 4511 hwb = RTW89_MAC_1; in _set_bt_afh_info() 4514 } else if (wl->afh_info[RTW89_MAC_1][j].en) { in _set_bt_afh_info() 4515 hwb = RTW89_MAC_1; in _set_bt_afh_info() [all …]
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| H A D | mac.c | 270 if (!rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_1, RTW89_CMAC_SEL)) { in rtw89_mac_dump_qta_lost_ax() 771 rtw89_mac_dump_cmac_err_status_ax(rtwdev, RTW89_MAC_1); in rtw89_mac_dump_err_status_ax() 1632 if (mac_idx == RTW89_MAC_1) { in cmac_func_en_ax() 1644 if (mac_idx == RTW89_MAC_1) { in cmac_func_en_ax() 3059 } else if (mac_idx == RTW89_MAC_1) { in ptcl_init_ax() 3996 ret = enable_imr_ax(rtwdev, RTW89_MAC_1, RTW89_CMAC_SEL); in dbcc_enable_ax() 4099 rtw89_fw_h2c_init_ba_cam_users(rtwdev, users, offset, RTW89_MAC_1); in rtw89_mac_feat_init() 6349 __rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_1); in rtw89_mac_update_rts_threshold()
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| H A D | phy_be.c | 614 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_1, RTW89_CMAC_SEL); in rtw89_phy_bb_wrap_listen_path_en_init() 618 addr = rtw89_mac_reg_by_idx(rtwdev, R_BE_PWR_LISTEN_PATH, RTW89_MAC_1); in rtw89_phy_bb_wrap_listen_path_en_init() 1195 __rtw89_phy_bb_wrap_init_be(rtwdev, RTW89_MAC_1); in rtw89_phy_bb_wrap_init_be()
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| H A D | rtw8922a.c | 2156 reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_PWR_BOOST, RTW89_MAC_1); in rtw8922a_bb_sethw() 2646 rtw8922a_hal_reset(rtwdev, RTW89_PHY_1, RTW89_MAC_1, band, in rtw8922a_bb_cfg_txrx_path() 2653 rtw8922a_hal_reset(rtwdev, RTW89_PHY_1, RTW89_MAC_1, band, in rtw8922a_bb_cfg_txrx_path()
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| H A D | mac80211.c | 383 rtw89_mac_set_rx_fltr(rtwdev, RTW89_MAC_1, rx_fltr); in rtw89_ops_configure_filter()
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| H A D | rtw8922d.c | 3100 rtw8922d_hal_reset(rtwdev, RTW89_PHY_1, RTW89_MAC_1, band, in rtw8922d_bb_cfg_txrx_path() 3107 rtw8922d_hal_reset(rtwdev, RTW89_PHY_1, RTW89_MAC_1, band, in rtw8922d_bb_cfg_txrx_path()
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| H A D | rtw8852b_common.c | 1425 RTW89_MAC_1 : RTW89_MAC_0); in __rtw8852bx_init_txpwr_unit()
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| H A D | rtw8851b.c | 1989 RTW89_MAC_1 : RTW89_MAC_0); in rtw8851b_init_txpwr_unit()
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| H A D | rtw8852c.c | 2311 RTW89_MAC_1 : in rtw8852c_init_txpwr_unit()
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| H A D | debug.c | 1871 p += rtw89_debug_mac_dump_cmac_err(rtwdev, p, end - p, RTW89_MAC_1); in rtw89_debug_mac_dump_cmac_dbg()
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| H A D | fw.c | 6501 for (j = RTW89_MAC_0; j <= RTW89_MAC_1; j++) { in rtw89_fw_h2c_cxdrv_role_v8() 6567 for (j = RTW89_MAC_0; j <= RTW89_MAC_1; j++) { in rtw89_fw_h2c_cxdrv_role_v10()
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| H A D | core.h | 880 RTW89_MAC_1 = 1, enumerator
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| H A D | core.c | 618 __rtw89_set_channel(rtwdev, conf.chans[1], RTW89_MAC_1, RTW89_PHY_1); in rtw89_set_channel()
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| H A D | phy.c | 802 rtw89_write32_idx(rtwdev, ra_limit->addr, ra_limit->mask, agg_num, RTW89_MAC_1); in rtw89_phy_ra_recalc_agg_limit()
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