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Searched refs:RTW89_MAC_0 (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/net/wireless/realtek/rtw89/
H A Dmac_be.c77 if (sel == RTW89_CMAC_SEL && mac_idx == RTW89_MAC_0 && in rtw89_mac_check_mac_en_be()
814 if (mac_idx == RTW89_MAC_0) { in cmac_pwr_en_be()
873 if (mac_idx == RTW89_MAC_0) { in cmac_func_en_be()
924 ret = cmac_pwr_en_be(rtwdev, RTW89_MAC_0, true); in sys_init_be()
928 ret = cmac_func_en_be(rtwdev, RTW89_MAC_0, true); in sys_init_be()
950 ret = cmac_pwr_en_be(rtwdev, RTW89_MAC_0, true); in mac_func_en_be()
954 ret = cmac_func_en_be(rtwdev, RTW89_MAC_0, true); in mac_func_en_be()
982 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in sta_sch_init_be()
1006 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in mpdu_proc_init_be()
1041 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in sec_eng_init_be()
[all …]
H A Drtw8852bt.c567 rtw89_chip_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852bt_set_channel_help()
568 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); in rtw8852bt_set_channel_help()
574 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); in rtw8852bt_set_channel_help()
578 rtw89_chip_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); in rtw8852bt_set_channel_help()
H A Drtw8852b.c682 rtw89_chip_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852b_set_channel_help()
683 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); in rtw8852b_set_channel_help()
689 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); in rtw8852b_set_channel_help()
693 rtw89_chip_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); in rtw8852b_set_channel_help()
H A Dwow.c787 mac->typ_fltr_opt(rtwdev, RTW89_MGNT, fwd_target, RTW89_MAC_0); in rtw89_wow_set_rx_filter()
788 mac->typ_fltr_opt(rtwdev, RTW89_CTRL, fwd_target, RTW89_MAC_0); in rtw89_wow_set_rx_filter()
789 mac->typ_fltr_opt(rtwdev, RTW89_DATA, fwd_target, RTW89_MAC_0); in rtw89_wow_set_rx_filter()
1360 rtw89_mac_ptk_drop_by_band_and_wait(rtwdev, RTW89_MAC_0); in rtw89_wow_enable_trx_pre()
1369 ret = rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); in rtw89_wow_enable_trx_pre()
1448 ret = rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); in rtw89_wow_disable_trx_post()
H A Dmac.c770 rtw89_mac_dump_cmac_err_status_ax(rtwdev, RTW89_MAC_0); in rtw89_mac_dump_err_status_ax()
981 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in hfc_ch_ctrl()
1010 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in hfc_upd_ch_info()
1035 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in hfc_pub_ctrl()
1114 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in hfc_upd_mix_info()
1207 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in rtw89_mac_hfc_init()
2282 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in rtw89_mac_dle_init()
2352 max_preld_size = (mac_idx == RTW89_MAC_0 ? in preload_init_set_ax()
2354 reg = mac_idx == RTW89_MAC_0 ? in preload_init_set_ax()
2360 reg = mac_idx == RTW89_MAC_0 ? in preload_init_set_ax()
[all …]
H A Dmac.h1424 rtw89_mac_cfg_phy_rpt(rtwdev, RTW89_MAC_0, enable); in rtw89_mac_cfg_phy_rpt_bands()
1445 ret = rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, enable); in rtw89_mac_cfg_ppdu_status_bands()
1492 rtw89_mac_set_edcca_mode(rtwdev, RTW89_MAC_0, normal); in rtw89_mac_set_edcca_mode_bands()
H A Drtw8851b.c1739 rtw89_chip_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8851b_set_channel_help()
1740 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); in rtw8851b_set_channel_help()
1746 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); in rtw8851b_set_channel_help()
1750 rtw89_chip_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); in rtw8851b_set_channel_help()
1989 RTW89_MAC_1 : RTW89_MAC_0); in rtw8851b_init_txpwr_unit()
H A Dcoex.c2035 RTW89_MAC_0); in _chk_btc_report()
4261 if (wl->afh_info[RTW89_MAC_0][RTW89_BAND_2G].en && in _set_wl_ch_map()
4265 wl->afh_info[RTW89_MAC_0][RTW89_BAND_2G].bw) in _set_wl_ch_map()
4268 hwb = RTW89_MAC_0; in _set_wl_ch_map()
4272 hwb = RTW89_MAC_0; in _set_wl_ch_map()
4467 for (j = RTW89_MAC_0; j < RTW89_MAC_NUM; j++) { in _set_bt_afh_info()
4506 if (wl->afh_info[RTW89_MAC_0][j].en && in _set_bt_afh_info()
4510 wl->afh_info[RTW89_MAC_0][j].bw) in _set_bt_afh_info()
4513 hwb = RTW89_MAC_0; in _set_bt_afh_info()
4517 hwb = RTW89_MAC_0; in _set_bt_afh_info()
[all …]
H A Ddebug.c1869 p += rtw89_debug_mac_dump_cmac_err(rtwdev, p, end - p, RTW89_MAC_0); in rtw89_debug_mac_dump_cmac_dbg()
3652 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_DMAC_SEL); in rtw89_dbg_trigger_l1_error_be()
3700 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_CMAC_SEL); in rtw89_dbg_trigger_l0_error_ax()
3720 ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_CMAC_SEL); in rtw89_dbg_trigger_l0_error_be()
H A Dphy_be.c1138 enum rtw89_phy_idx phy_idx = mac_idx != RTW89_MAC_0 ? RTW89_PHY_1 : RTW89_PHY_0; in rtw89_phy_bb_wrap_tx_rfsi_ctrl_init()
1193 __rtw89_phy_bb_wrap_init_be(rtwdev, RTW89_MAC_0); in rtw89_phy_bb_wrap_init_be()
H A Drtw8922a.c2644 rtw8922a_hal_reset(rtwdev, RTW89_PHY_0, RTW89_MAC_0, band, &tx_en0, true); in rtw8922a_bb_cfg_txrx_path()
2651 rtw8922a_hal_reset(rtwdev, RTW89_PHY_0, RTW89_MAC_0, band, &tx_en0, false); in rtw8922a_bb_cfg_txrx_path()
H A Dmac80211.c380 rtw89_mac_set_rx_fltr(rtwdev, RTW89_MAC_0, rx_fltr); in rtw89_ops_configure_filter()
H A Drtw8922d.c3098 rtw8922d_hal_reset(rtwdev, RTW89_PHY_0, RTW89_MAC_0, band, &tx_en0, true); in rtw8922d_bb_cfg_txrx_path()
3105 rtw8922d_hal_reset(rtwdev, RTW89_PHY_0, RTW89_MAC_0, band, &tx_en0, false); in rtw8922d_bb_cfg_txrx_path()
H A Dfw.c6103 rl = &r->rlink[i][RTW89_MAC_0]; in rtw89_fw_h2c_cxdrv_role()
6186 rl = &r->rlink[i][RTW89_MAC_0]; in rtw89_fw_h2c_cxdrv_role_v1()
6360 rl = &r->rlink[i][RTW89_MAC_0]; in rtw89_fw_h2c_cxdrv_role_v2()
6428 rl = &r->rlink[i][RTW89_MAC_0]; in rtw89_fw_h2c_cxdrv_role_v7()
6501 for (j = RTW89_MAC_0; j <= RTW89_MAC_1; j++) { in rtw89_fw_h2c_cxdrv_role_v8()
6567 for (j = RTW89_MAC_0; j <= RTW89_MAC_1; j++) { in rtw89_fw_h2c_cxdrv_role_v10()
H A Drtw8852b_common.c1425 RTW89_MAC_1 : RTW89_MAC_0); in __rtw8852bx_init_txpwr_unit()
H A Drtw8852c.c2312 RTW89_MAC_0); in rtw8852c_init_txpwr_unit()
H A Dcore.c613 __rtw89_set_channel(rtwdev, conf.chans[0], RTW89_MAC_0, RTW89_PHY_0); in rtw89_set_channel()
6822 inst->mac_idx = RTW89_MAC_0 + index; in rtw89_init_vif()
H A Dcore.h879 RTW89_MAC_0 = 0, enumerator
H A Dphy.c799 rtw89_write32_idx(rtwdev, ra_limit->addr, ra_limit->mask, agg_num, RTW89_MAC_0); in rtw89_phy_ra_recalc_agg_limit()