| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mm-phygate-tauri-l-rs232-rts-cts.dtso | 6 * Tauri-L RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
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| H A D | imx8mm-venice-gw72xx-0x-rs232-rts.dtso | 5 * GW72xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
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| H A D | imx8mm-venice-gw73xx-0x-rs232-rts.dtso | 5 * GW73xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
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| H A D | imx8mq-hummingboard-pulse.dts | 166 * reconfigured to enable RTS/CTS on UART3
209 * Header. To use RTS/CTS on UART3 comment them out
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| H A D | imx8mm-venice-gw7902.dts | 952 MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x140 /* RTS */
983 MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */
992 MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x140 /* RTS */
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6ull-dhcom-drc02.dts | 23 * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins.
24 * Therefore the UART RTS/CTS must be output on other DHCOM pins, see uart1
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| H A D | imx6ul-ccimx6ulsbcpro.dts | 62 /* CAN2 is multiplexed with UART2 RTS/CTS */
200 /* UART2 RTS/CTS muxed with CAN2 */
208 /* UART3 RTS/CTS muxed with CAN 1 */
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | am335x-netcom-plus-2xx.dts | 26 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* RTS */
39 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* RTS */
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| H A D | am335x-regor.dtsi | 206 * am335x RTS is high on idle and gets low on active !
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| /linux/arch/arm64/boot/dts/allwinner/ |
| H A D | sun50i-a64-sopine-baseboard.dts | 189 /* On Wifi/BT connector, with RTS/CTS */
211 /* On Euler connector, RTS/CTS optional */
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| H A D | sun50i-a64-orangepi-win.dts | 382 /* On Pi-2 connector, RTS/CTS optional */
389 /* On Pi-2 connector, RTS/CTS optional */
396 /* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */
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| H A D | sun50i-a64-pine64.dts | 296 /* On Wifi/BT connector, with RTS/CTS */
318 /* On Euler connector, RTS/CTS optional */
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| /linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| H A D | serial.txt | 14 CTS, RTS, DCD, DSR, DTR, and RI.
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r9a08g045s33-smarc-pmod1-type-3a.dtso | 37 <RZG2L_PORT_PINMUX(16, 1, 1)>; /* RTS# */
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| H A D | rzg2lc-smarc-pinfunction.dtsi | 71 <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
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| H A D | rzg2l-smarc-pinfunction.dtsi | 90 <RZG2L_PORT_PINMUX(48, 4, 1)>; /* RTS# */
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp157a-iot-box.dts | 57 /* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
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| H A D | stm32mp153c-lxa-fairytux2-gen1.dts | 94 * On Gen 1 FairyTux 2 only RTS can be used and not CTS as well,
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| /linux/drivers/tty/serial/ |
| H A D | zs.h | 142 #define RTS 0x2 /* RTS */ macro
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| H A D | sunzilog.h | 117 #define RTS 0x2 /* RTS */ macro
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| H A D | ip22zilog.h | 125 #define RTS 0x2 /* RTS */ macro
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| H A D | pmac_zilog.c | 529 set_bits |= RTS; in pmz_set_mctrl()
531 clear_bits |= RTS; in pmz_set_mctrl()
761 write_zsreg(uap, 5, Tx8 | RTS); in pmz_fix_zero_bug_scc()
825 uap->curregs[R5] = Tx8 | RTS; in __pmz_startup()
1882 write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR); in pmz_console_write()
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| H A D | pmac_zilog.h | 205 #define RTS 0x2 /* RTS */ macro
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| /linux/Documentation/hwmon/ |
| H A D | sbtsi_temp.rst | 38 and physical interface of a typical 8-pin remote temperature sensor (RTS) on
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| /linux/drivers/tty/ |
| H A D | nozomi.c | 232 unsigned int RTS:1; member
291 unsigned int RTS:1; member
1457 ctrl.RTS = 0; in nozomi_card_exit()
1489 port->ctrl_ul.RTS = rts; in set_rts()
1644 return (ctrl_ul->RTS ? TIOCM_RTS : 0) in ntty_tiocmget()
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