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Searched refs:RST_BUS_OTG (Results 1 – 25 of 32) sorted by relevance

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/linux/include/dt-bindings/reset/
H A Dsun8i-v3s-ccu.h62 #define RST_BUS_OTG 17 macro
H A Dsuniv-ccu-f1c100s.h17 #define RST_BUS_OTG 7 macro
H A Dsun8i-a23-a33-ccu.h61 #define RST_BUS_OTG 15 macro
H A Dsun8i-a83t-ccu.h65 #define RST_BUS_OTG 17 macro
H A Dsun9i-a80-ccu.h61 #define RST_BUS_OTG 14 macro
H A Dsun50i-a64-ccu.h64 #define RST_BUS_OTG 18 macro
H A Dsun8i-h3-ccu.h65 #define RST_BUS_OTG 17 macro
H A Dsun50i-a100-ccu.h57 #define RST_BUS_OTG 48 macro
H A Dsun50i-h616-ccu.h59 #define RST_BUS_OTG 50 macro
H A Dsun50i-h6-ccu.h62 #define RST_BUS_OTG 53 macro
H A Dsun20i-d1-ccu.h56 #define RST_BUS_OTG 46 macro
H A Dsun8i-r40-ccu.h70 #define RST_BUS_OTG 22 macro
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun8i-v3s.c661 [RST_BUS_OTG] = { 0x2c0, BIT(24) },
696 [RST_BUS_OTG] = { 0x2c0, BIT(24) },
H A Dccu-sun8i-h3.c899 [RST_BUS_OTG] = { 0x2c0, BIT(23) },
962 [RST_BUS_OTG] = { 0x2c0, BIT(23) },
H A Dccu-suniv-f1c100s.c489 [RST_BUS_OTG] = { 0x2c0, BIT(24) },
H A Dccu-sun8i-a23.c688 [RST_BUS_OTG] = { 0x2c0, BIT(24) },
H A Dccu-sun8i-a33.c733 [RST_BUS_OTG] = { 0x2c0, BIT(24) },
H A Dccu-sun8i-a83t.c818 [RST_BUS_OTG] = { 0x2c0, BIT(24) },
H A Dccu-sun50i-a64.c882 [RST_BUS_OTG] = { 0x2c0, BIT(23) },
H A Dccu-sun9i-a80.c1129 [RST_BUS_OTG] = { 0x5a4, BIT(0) },
H A Dccu-sun50i-a100.c1116 [RST_BUS_OTG] = { 0xa8c, BIT(24) },
H A Dccu-sun50i-h616.c1059 [RST_BUS_OTG] = { 0xa8c, BIT(24) },
H A Dccu-sun50i-h6.c1136 [RST_BUS_OTG] = { 0xa8c, BIT(24) },
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-v3s.dtsi299 resets = <&ccu RST_BUS_OTG>;
H A Dsun8i-a23-a33.dtsi282 resets = <&ccu RST_BUS_OTG>;

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