1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ 2 /* Copyright (c) 2023 Imagination Technologies Ltd. */ 3 4 #ifndef PVR_FW_INFO_H 5 #define PVR_FW_INFO_H 6 7 #include <linux/bits.h> 8 #include <linux/sizes.h> 9 #include <linux/types.h> 10 11 /* 12 * Firmware binary block unit in bytes. 13 * Raw data stored in FW binary will be aligned to this size. 14 */ 15 #define FW_BLOCK_SIZE SZ_4K 16 17 /* Maximum number of entries in firmware layout table. */ 18 #define PVR_FW_INFO_MAX_NUM_ENTRIES 8 19 20 enum pvr_fw_section_id { 21 META_CODE = 0, 22 META_PRIVATE_DATA, 23 META_COREMEM_CODE, 24 META_COREMEM_DATA, 25 MIPS_CODE, 26 MIPS_EXCEPTIONS_CODE, 27 MIPS_BOOT_CODE, 28 MIPS_PRIVATE_DATA, 29 MIPS_BOOT_DATA, 30 MIPS_STACK, 31 RISCV_UNCACHED_CODE, 32 RISCV_CACHED_CODE, 33 RISCV_PRIVATE_DATA, 34 RISCV_COREMEM_CODE, 35 RISCV_COREMEM_DATA, 36 }; 37 38 enum pvr_fw_section_type { 39 NONE = 0, 40 FW_CODE, 41 FW_DATA, 42 FW_COREMEM_CODE, 43 FW_COREMEM_DATA, 44 }; 45 46 /* 47 * FW binary format with FW info attached: 48 * 49 * Contents Offset 50 * +-----------------+ 51 * | | 0 52 * | | 53 * | Original binary | 54 * | file | 55 * | (.ldr/.elf) | 56 * | | 57 * | | 58 * +-----------------+ 59 * | Device info | FILE_SIZE - 4K - device_info_size 60 * +-----------------+ 61 * | FW info header | FILE_SIZE - 4K 62 * +-----------------+ 63 * | | 64 * | FW layout table | 65 * | | 66 * +-----------------+ 67 * FILE_SIZE 68 */ 69 70 #define PVR_FW_INFO_VERSION 3 71 72 #define PVR_FW_FLAGS_OPEN_SOURCE BIT(0) 73 74 /** struct pvr_fw_info_header - Firmware header */ 75 struct pvr_fw_info_header { 76 /** @info_version: FW info header version. */ 77 u32 info_version; 78 /** @header_len: Header length. */ 79 u32 header_len; 80 /** @layout_entry_num: Number of entries in the layout table. */ 81 u32 layout_entry_num; 82 /** @layout_entry_size: Size of an entry in the layout table. */ 83 u32 layout_entry_size; 84 /** @bvnc: GPU ID supported by firmware. */ 85 aligned_u64 bvnc; 86 /** @fw_page_size: Page size of processor on which firmware executes. */ 87 u32 fw_page_size; 88 /** @flags: Compatibility flags. */ 89 u32 flags; 90 /** @fw_version_major: Firmware major version number. */ 91 u16 fw_version_major; 92 /** @fw_version_minor: Firmware minor version number. */ 93 u16 fw_version_minor; 94 /** @fw_version_build: Firmware build number. */ 95 u32 fw_version_build; 96 /** @device_info_size: Size of device info structure. */ 97 u32 device_info_size; 98 /** @padding: Padding. */ 99 u32 padding; 100 }; 101 102 /** 103 * struct pvr_fw_layout_entry - Entry in firmware layout table, describing a 104 * section of the firmware image 105 */ 106 struct pvr_fw_layout_entry { 107 /** @id: Section ID. */ 108 enum pvr_fw_section_id id; 109 /** @type: Section type. */ 110 enum pvr_fw_section_type type; 111 /** @base_addr: Base address of section in FW address space. */ 112 u32 base_addr; 113 /** @max_size: Maximum size of section, in bytes. */ 114 u32 max_size; 115 /** @alloc_size: Allocation size of section, in bytes. */ 116 u32 alloc_size; 117 /** @alloc_offset: Allocation offset of section. */ 118 u32 alloc_offset; 119 }; 120 121 /** 122 * struct pvr_fw_device_info_header - Device information header. 123 */ 124 struct pvr_fw_device_info_header { 125 /** @brn_mask_size: BRN mask size (in u64s). */ 126 u64 brn_mask_size; 127 /** @ern_mask_size: ERN mask size (in u64s). */ 128 u64 ern_mask_size; 129 /** @feature_mask_size: Feature mask size (in u64s). */ 130 u64 feature_mask_size; 131 /** @feature_param_size: Feature parameter size (in u64s). */ 132 u64 feature_param_size; 133 }; 134 135 #endif /* PVR_FW_INFO_H */ 136