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Searched refs:RING_TIMESTAMP (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c619 REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),
631 REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
647 REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
677 REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),
678 REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
680 REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
684 REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),
685 REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
687 REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
H A Di915_ioctl.c32 .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
H A Di915_perf.c2024 *cs++ = i915_mmio_reg_offset(RING_TIMESTAMP(base)); in alloc_noa_wait()
2042 *cs++ = i915_mmio_reg_offset(RING_TIMESTAMP(base)); in alloc_noa_wait()
H A Dintel_gvt_mmio_table.c99 MMIO_RING_D(RING_TIMESTAMP); in iterate_generic_mmio()
/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_gt_pm.c44 ENGINE_READ_FW(engine, RING_TIMESTAMP); in read_timestamp()
49 return ENGINE_READ_FW(engine, RING_TIMESTAMP); in read_timestamp()
H A Dselftest_engine_pm.c96 cs = emit_srm(cs, RING_TIMESTAMP(engine->mmio_base), offset + 4000); in __measure_timestamps()
102 cs = emit_srm(cs, RING_TIMESTAMP(engine->mmio_base), offset + 4016); in __measure_timestamps()
H A Dselftest_engine_cs.c51 return RING_TIMESTAMP(engine->mmio_base); in timestamp_reg()
/linux/drivers/gpu/drm/xe/regs/
H A Dxe_engine_regs.h144 #define RING_TIMESTAMP(base) XE_REG((base) + 0x358) macro
/linux/drivers/gpu/drm/xe/
H A Dxe_query.c95 lower_reg = RING_TIMESTAMP(hwe->mmio_base); in hwe_read_timestamp()
H A Dxe_hw_engine.c986 return xe_mmio_read64_2x32(&hwe->gt->mmio, RING_TIMESTAMP(hwe->mmio_base)); in xe_hw_engine_read_timestamp()
/linux/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c1976 offset == i915_mmio_reg_offset(RING_TIMESTAMP(engine->mmio_base)) || in mmio_read_from_hw()
2253 MMIO_RING_DFH(RING_TIMESTAMP, D_ALL, F_CMD_ACCESS, in init_generic_mmio_info()