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Searched refs:REG_UPDATE_3 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_mpc.c56 REG_UPDATE_3(MUX[opp_id], in mpc201_set_out_rate_control()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.c130 REG_UPDATE_3(BLND_CONTROL[blnd_inst], in dce_set_blender_mode()
/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h97 #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \ macro