Searched refs:REG_RXPSEL (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/net/wireless/realtek/rtw88/ |
| H A D | rtw8814a.c | 321 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8814a_phy_set_param() 597 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST, 0x3); in rtw8814a_switch_band() 613 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST, 0x2); in rtw8814a_switch_band() 757 bb_reg_808 = rtw_read32(rtwdev, REG_RXPSEL); in rtw8814a_adc_clk() 779 rtw_write8(rtwdev, REG_RXPSEL, 0x11); in rtw8814a_adc_clk() 845 rtw_write32(rtwdev, REG_RXPSEL, bb_reg_808); in rtw8814a_adc_clk() 1352 cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28); in rtw8814a_false_alarm_statistics() 1515 rtw_write8(rtwdev, REG_RXPSEL, 0x00); in rtw8814a_iqk_configure_mac()
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| H A D | rtw8822b.c | 166 rtw_write32_clr(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8822b_phy_set_param() 175 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8822b_phy_set_param() 586 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, 0x0); in rtw8822b_toggle_igi() 587 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, in rtw8822b_toggle_igi() 619 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1); in rtw8822b_set_channel_bb() 638 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0); in rtw8822b_set_channel_bb() 799 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, rx_path_sel); in rtw8822b_config_trx_mode()
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| H A D | rtw8821c.c | 184 rtw_write32_clr(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8821c_phy_set_param() 194 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8821c_phy_set_param() 450 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1); in rtw8821c_set_channel_bb() 479 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0); in rtw8821c_set_channel_bb() 731 cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28); in rtw8821c_false_alarm_statistics()
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| H A D | rtw88xxa.c | 613 rtw_write32_mask(rtwdev, REG_RXPSEL, 0xff, 0x11); in rtw8812a_config_1t() 940 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw88xxa_switch_band() 981 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw88xxa_switch_band() 1671 cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28); in rtw88xxa_false_alarm_statistics() 1771 rtw_write8(rtwdev, REG_RXPSEL, 0x00); in rtw88xxa_iqk_configure_mac()
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| H A D | reg.h | 603 #define REG_RXPSEL 0x0808 macro
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