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Searched refs:REG_RXPSEL (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8814a.c321 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8814a_phy_set_param()
598 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST, 0x3); in rtw8814a_switch_band()
614 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST, 0x2); in rtw8814a_switch_band()
758 bb_reg_808 = rtw_read32(rtwdev, REG_RXPSEL); in rtw8814a_adc_clk()
780 rtw_write8(rtwdev, REG_RXPSEL, 0x11); in rtw8814a_adc_clk()
846 rtw_write32(rtwdev, REG_RXPSEL, bb_reg_808); in rtw8814a_adc_clk()
1353 cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28); in rtw8814a_false_alarm_statistics()
1516 rtw_write8(rtwdev, REG_RXPSEL, 0x00); in rtw8814a_iqk_configure_mac()
H A Drtw8822b.c166 rtw_write32_clr(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8822b_phy_set_param()
175 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8822b_phy_set_param()
589 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, 0x0); in rtw8822b_toggle_igi()
590 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, in rtw8822b_toggle_igi()
622 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1); in rtw8822b_set_channel_bb()
641 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0); in rtw8822b_set_channel_bb()
802 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, rx_path_sel); in rtw8822b_config_trx_mode()
H A Drtw8821c.c184 rtw_write32_clr(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8821c_phy_set_param()
194 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8821c_phy_set_param()
452 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1); in rtw8821c_set_channel_bb()
481 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0); in rtw8821c_set_channel_bb()
733 cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28); in rtw8821c_false_alarm_statistics()
H A Drtw88xxa.c614 rtw_write32_mask(rtwdev, REG_RXPSEL, 0xff, 0x11); in rtw8812a_config_1t()
941 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw88xxa_switch_band()
982 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw88xxa_switch_band()
1672 cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28); in rtw88xxa_false_alarm_statistics()
1772 rtw_write8(rtwdev, REG_RXPSEL, 0x00); in rtw88xxa_iqk_configure_mac()
H A Dreg.h603 #define REG_RXPSEL 0x0808 macro