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Searched refs:REG_RD (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c222 u32 val = REG_RD(bp, reg); in bnx2x_bits_en()
231 u32 val = REG_RD(bp, reg); in bnx2x_bits_dis()
254 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
269 link_status = REG_RD(bp, params->shmem_base + in bnx2x_check_lfa()
298 saved_val = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
307 saved_val = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
316 saved_val = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
326 cur_speed_cap_mask = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
339 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
349 eee_status = REG_RD(bp, params->shmem2_base + in bnx2x_check_lfa()
[all …]
H A Dbnx2x_init.h210 u32 curr_cos = REG_RD(bp, QM_REG_QVOQIDX_0 + q_num * 4); in bnx2x_map_q_cos()
237 reg_bit_map = REG_RD(bp, reg_addr); in bnx2x_map_q_cos()
242 reg_bit_map = REG_RD(bp, reg_addr); in bnx2x_map_q_cos()
250 reg_bit_map = REG_RD(bp, reg_addr); in bnx2x_map_q_cos()
681 reg_val = REG_RD(bp, mcp_attn_ctl_regs[i].addr); in bnx2x_set_mcp_parity()
744 reg_val = REG_RD(bp, bnx2x_blocks_parity_data[i]. in bnx2x_clear_blocks_parity()
755 reg_val = REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_4_MCP); in bnx2x_clear_blocks_parity()
H A Dbnx2x_self_test.c2955 REG_RD(bp, rec->reg1 + i * rec->incr); in bnx2x_idle_chk6()
2957 REG_RD(bp, rec->reg1 + i * rec->incr + 4); in bnx2x_idle_chk6()
2995 if ((REG_RD(bp, (rec->reg2 + i * 4)) & 0x1) != 0x1) in bnx2x_idle_chk7()
2999 REG_RD(bp, (rec->reg1 + i * rec->incr)); in bnx2x_idle_chk7()
3000 REG_RD(bp, (rec->reg1 + i * rec->incr + 4)); in bnx2x_idle_chk7()
3002 REG_RD(bp, (rec->reg1 + i * rec->incr + 8)); in bnx2x_idle_chk7()
3003 REG_RD(bp, (rec->reg1 + i * rec->incr + 12)); in bnx2x_idle_chk7()
3017 rec->pred_args.val2 = REG_RD(bp, rec->reg3 + i * 4); in bnx2x_idle_chk7()
3072 rec.pred_args.val1 = REG_RD(bp, rec.reg1); in bnx2x_idle_chk()
3087 REG_RD(bp, rec.reg1 + i * rec.incr); in bnx2x_idle_chk()
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H A Dbnx2x_init_ops.h262 REG_RD(bp, addr); in bnx2x_init_block()
518 val = REG_RD(bp, write_arb_addr[i].l); in bnx2x_init_pxp_arb()
522 val = REG_RD(bp, write_arb_addr[i].add); in bnx2x_init_pxp_arb()
526 val = REG_RD(bp, write_arb_addr[i].ubound); in bnx2x_init_pxp_arb()
587 val = REG_RD(bp, PCIE_REG_PCIER_TL_HDR_FC_ST); in bnx2x_init_pxp_arb()
H A Dbnx2x.h171 #define REG_RD(bp, offset) readl(REG_ADDR(bp, offset)) macro
212 #define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field))
217 #define SHMEM2_RD(bp, field) REG_RD(bp, SHMEM2_ADDR(bp, field))
224 #define MF_CFG_RD(bp, field) REG_RD(bp, MF_CFG_ADDR(bp, field))
227 #define MF2_CFG_RD(bp, field) REG_RD(bp, MF2_CFG_ADDR(bp, field))
233 #define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg)
2081 val = REG_RD(bp, reg); in reg_poll()
H A Dbnx2x_cmn.h700 u32 result = REG_RD(bp, hc_addr); in bnx2x_hc_ack_int()
709 u32 result = REG_RD(bp, igu_addr); in bnx2x_igu_ack_int()
H A Dbnx2x_stats.c861 estats->eee_tx_lpi += REG_RD(bp, lpi_reg); in bnx2x_hw_stats_update()
1631 REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38); in bnx2x_stats_init()
1633 REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38); in bnx2x_stats_init()
H A Dbnx2x_sriov.c730 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION); in bnx2x_vf_igu_reset()
1086 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4); in bnx2x_get_vf_igu_cam_info()
1155 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF); in bnx2x_sriov_info()
1979 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION); in bnx2x_vf_igu_disable()
H A Dbnx2x_dcb.c60 *buff = REG_RD(bp, addr + i); in bnx2x_read_data()
H A Dbnx2x_cmn.c2382 loaded_fw = REG_RD(bp, XSEM_REG_PRAM); in bnx2x_compare_fw_ver()
/linux/lib/crypto/x86/
H A Dsha1-avx2-asm.S85 #define REG_RD %rax macro
108 .set RD, REG_RD
/linux/drivers/scsi/bnx2i/
H A Dbnx2i.h128 #define REG_RD(__hba, offset) \ macro
H A Dbnx2i_hwi.c2724 config2 = REG_RD(ep->hba, BNX2_MQ_CONFIG2); in bnx2i_map_ep_dbell_regs()
/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_dev.c2473 if (REG_RD(p_hwfn, addr)) { in qed_final_cleanup()
2486 while (!REG_RD(p_hwfn, addr) && count--) in qed_final_cleanup()
2489 if (REG_RD(p_hwfn, addr)) in qed_final_cleanup()
3546 p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, in get_function_id()
3549 p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, PXP_PF_ME_CONCRETE_ADDR); in get_function_id()
4651 if (REG_RD(p_hwfn, PXP_PF_ME_OPAQUE_ADDR) == 0xffffffff) { in qed_hw_prepare_single()
H A Dqed_vf.c451 p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg); in qed_vf_hw_prepare()
454 p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg); in qed_vf_hw_prepare()
H A Dqed_int.c2295 intr_status_lo = REG_RD(p_hwfn, in qed_int_igu_read_sisr_reg()
2298 intr_status_hi = REG_RD(p_hwfn, in qed_int_igu_read_sisr_reg()