/linux/drivers/gpu/drm/amd/amdkfd/ |
H A D | kfd_int_process_v10.c | 216 encoding = REG_GET_FIELD(context_id1, in event_interrupt_wq_v10() 222 REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_AUTO_CTXID1, in event_interrupt_wq_v10() 224 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 226 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 228 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 230 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 232 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 237 REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1, in event_interrupt_wq_v10() 239 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, in event_interrupt_wq_v10() 241 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, in event_interrupt_wq_v10() [all …]
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/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | umc_v8_7.c | 64 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_7_ecc_info_query_correctable_error_count() 65 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v8_7_ecc_info_query_correctable_error_count() 81 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 82 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 83 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 || in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 84 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 85 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 || in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 86 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1)) in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 149 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_7_ecc_info_query_error_address() 150 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1) { in umc_v8_7_ecc_info_query_error_address() [all …]
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H A D | umc_v6_7.c | 66 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1) in umc_v6_7_query_error_status_helper() 110 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v6_7_ecc_info_query_correctable_error_count() 111 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) { in umc_v6_7_ecc_info_query_correctable_error_count() 122 err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr); in umc_v6_7_ecc_info_query_correctable_error_count() 151 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 152 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 153 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 || in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 154 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 155 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 || in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 156 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1)) { in umc_v6_7_ecc_info_querry_uncorrectable_error_count() [all …]
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H A D | umc_v8_10.c | 118 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_10_query_correctable_error_count() 119 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v8_10_query_correctable_error_count() 134 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v8_10_query_uncorrectable_error_count() 135 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || in umc_v8_10_query_uncorrectable_error_count() 136 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 || in umc_v8_10_query_uncorrectable_error_count() 137 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v8_10_query_uncorrectable_error_count() 138 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 || in umc_v8_10_query_uncorrectable_error_count() 139 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1)) in umc_v8_10_query_uncorrectable_error_count() 222 addr_lsb = REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, AddrLsb); in umc_v8_10_convert_error_address() 269 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_10_query_error_address() [all …]
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H A D | umc_v6_1.c | 82 return REG_GET_FIELD(rsmu_umc_val, in umc_v6_1_get_umc_index_mode_state() 204 (REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) - in umc_v6_1_query_correctable_error_count() 214 (REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) - in umc_v6_1_query_correctable_error_count() 220 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 6 && in umc_v6_1_query_correctable_error_count() 221 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v6_1_query_correctable_error_count() 222 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v6_1_query_correctable_error_count() 245 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v6_1_querry_uncorrectable_error_count() 246 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || in umc_v6_1_querry_uncorrectable_error_count() 247 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 || in umc_v6_1_querry_uncorrectable_error_count() 248 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v6_1_querry_uncorrectable_error_count() [all …]
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H A D | gfxhub_v1_1.c | 54 seg_size = REG_GET_FIELD( in gfxhub_v1_1_get_xgmi_info() 58 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE, PF_MAX_REGION); in gfxhub_v1_1_get_xgmi_info() 61 seg_size = REG_GET_FIELD( in gfxhub_v1_1_get_xgmi_info() 65 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION); in gfxhub_v1_1_get_xgmi_info() 96 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE, in gfxhub_v1_1_get_xgmi_info() 100 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, in gfxhub_v1_1_get_xgmi_info()
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H A D | df_v4_3.c | 39 v0 = REG_GET_FIELD(hw_assert_msklo, in df_v4_3_query_ras_poison_mode() 41 v1 = REG_GET_FIELD(hw_assert_msklo, in df_v4_3_query_ras_poison_mode() 43 v28 = REG_GET_FIELD(hw_assert_mskhi, in df_v4_3_query_ras_poison_mode() 45 v31 = REG_GET_FIELD(hw_assert_mskhi, in df_v4_3_query_ras_poison_mode()
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H A D | smu_v11_0_i2c.c | 90 if (REG_GET_FIELD(en_stat, CKSVII2C_IC_ENABLE_STATUS, IC_EN)) in smu_v11_0_i2c_enable() 189 } while (REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFE) == 0); in smu_v11_0_i2c_poll_tx_status() 197 if (REG_GET_FIELD(reg, CKSVII2C_IC_INTR_STAT, R_TX_ABRT) == 1) { in smu_v11_0_i2c_poll_tx_status() 202 if (REG_GET_FIELD(reg_c_tx_abrt_source, in smu_v11_0_i2c_poll_tx_status() 208 } else if (REG_GET_FIELD(reg_c_tx_abrt_source, in smu_v11_0_i2c_poll_tx_status() 233 if (REG_GET_FIELD(reg_c_tx_abrt_source, in smu_v11_0_i2c_poll_rx_status() 251 } while (REG_GET_FIELD(reg_ic_status, CKSVII2C_IC_STATUS, RFNE) == 0); in smu_v11_0_i2c_poll_rx_status() 299 if (!REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFNF)) { in smu_v11_0_i2c_transmit() 423 data[bytes_received] = REG_GET_FIELD(reg, CKSVII2C_IC_DATA_CMD, DAT); in smu_v11_0_i2c_receive() 470 if ((REG_GET_FIELD(reg_ic_enable, CKSVII2C_IC_ENABLE, ENABLE) == 0) && in smu_v11_0_i2c_activity_done() [all …]
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H A D | smuio_v13_0.c | 86 die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID); in smuio_v13_0_get_die_id() 103 socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID); in smuio_v13_0_get_socket_id() 120 data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, TOPOLOGY_ID); in smuio_v13_0_is_host_gpu_xgmi_supported() 137 data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, TOPOLOGY_ID); in smuio_v13_0_get_pkg_type()
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H A D | smuio_v13_0_3.c | 43 die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID); in smuio_v13_0_3_get_die_id() 60 socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID); in smuio_v13_0_3_get_socket_id() 79 data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, PKG_TYPE); in smuio_v13_0_3_get_pkg_type()
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H A D | gmc_v7_0.c | 95 if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) { in gmc_v7_0_mc_stop() 193 running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN); in gmc_v7_0_mc_load_microcode() 216 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v7_0_mc_load_microcode() 222 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v7_0_mc_load_microcode() 324 if (REG_GET_FIELD(tmp, MC_ARB_RAMCFG, CHANSIZE)) in gmc_v7_0_mc_init() 330 switch (REG_GET_FIELD(tmp, MC_SHARED_CHMAP, NOOFCHAN)) { in gmc_v7_0_mc_init() 759 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); in gmc_v7_0_vm_decode_fault() 760 u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v7_0_vm_decode_fault() 766 mc_id = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v7_0_vm_decode_fault() 771 REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v7_0_vm_decode_fault() [all …]
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H A D | gfx_v9_4.c | 711 sec_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, SEC_COUNT); in gfx_v9_4_query_utc_edc_status() 719 ded_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, DED_COUNT); in gfx_v9_4_query_utc_edc_status() 732 sec_count = REG_GET_FIELD(data, VML2_WALKER_MEM_ECC_CNTL, in gfx_v9_4_query_utc_edc_status() 741 ded_count = REG_GET_FIELD(data, VML2_WALKER_MEM_ECC_CNTL, in gfx_v9_4_query_utc_edc_status() 755 sec_count = REG_GET_FIELD(data, UTCL2_MEM_ECC_CNTL, SEC_COUNT); in gfx_v9_4_query_utc_edc_status() 763 ded_count = REG_GET_FIELD(data, UTCL2_MEM_ECC_CNTL, DED_COUNT); in gfx_v9_4_query_utc_edc_status() 776 sec_count = REG_GET_FIELD(data, ATC_L2_CACHE_2M_DSM_CNTL, in gfx_v9_4_query_utc_edc_status() 785 ded_count = REG_GET_FIELD(data, ATC_L2_CACHE_2M_DSM_CNTL, in gfx_v9_4_query_utc_edc_status() 799 sec_count = REG_GET_FIELD(data, ATC_L2_CACHE_4K_DSM_CNTL, in gfx_v9_4_query_utc_edc_status() 808 ded_count = REG_GET_FIELD(data, ATC_L2_CACHE_4K_DSM_CNTL, in gfx_v9_4_query_utc_edc_status() [all …]
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H A D | imu_v12_0.c | 284 inst_index = REG_GET_FIELD(data, GRBM_GFX_INDEX, INSTANCE_INDEX); in imu_v12_0_grbm_gfx_index_remap() 289 val = REG_GET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES) << 18 | in imu_v12_0_grbm_gfx_index_remap() 290 REG_GET_FIELD(data, GRBM_GFX_INDEX, SA_BROADCAST_WRITES) << 19 | in imu_v12_0_grbm_gfx_index_remap() 291 REG_GET_FIELD(data, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES) << 20 | in imu_v12_0_grbm_gfx_index_remap() 292 REG_GET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX) << 21 | in imu_v12_0_grbm_gfx_index_remap() 293 REG_GET_FIELD(data, GRBM_GFX_INDEX, SA_INDEX) << 25 | in imu_v12_0_grbm_gfx_index_remap()
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H A D | df_v3_6.c | 228 adev->df.hash_status.hash_64k = REG_GET_FIELD(tmp, in df_v3_6_query_hashes() 231 adev->df.hash_status.hash_2m = REG_GET_FIELD(tmp, in df_v3_6_query_hashes() 234 adev->df.hash_status.hash_1g = REG_GET_FIELD(tmp, in df_v3_6_query_hashes() 650 v0 = REG_GET_FIELD(hw_assert_msklo, in df_v3_6_query_ras_poison_mode() 652 v1 = REG_GET_FIELD(hw_assert_msklo, in df_v3_6_query_ras_poison_mode() 654 v28 = REG_GET_FIELD(hw_assert_mskhi, in df_v3_6_query_ras_poison_mode() 656 v31 = REG_GET_FIELD(hw_assert_mskhi, in df_v3_6_query_ras_poison_mode()
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H A D | gmc_v8_0.c | 177 if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) { in gmc_v8_0_mc_stop() 303 running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN); in gmc_v8_0_tonga_mc_load_microcode() 326 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v8_0_tonga_mc_load_microcode() 332 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v8_0_tonga_mc_load_microcode() 510 if (REG_GET_FIELD(tmp, MC_ARB_RAMCFG, CHANSIZE)) in gmc_v8_0_mc_init() 516 switch (REG_GET_FIELD(tmp, MC_SHARED_CHMAP, NOOFCHAN)) { in gmc_v8_0_mc_init() 991 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); in gmc_v8_0_vm_decode_fault() 992 u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v8_0_vm_decode_fault() 998 mc_id = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v8_0_vm_decode_fault() 1003 REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v8_0_vm_decode_fault() [all …]
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H A D | gfxhub_v3_0_3.c | 81 u32 cid = REG_GET_FIELD(status, in gfxhub_v3_0_3_print_l2_protection_fault_status() 91 REG_GET_FIELD(status, in gfxhub_v3_0_3_print_l2_protection_fault_status() 94 REG_GET_FIELD(status, in gfxhub_v3_0_3_print_l2_protection_fault_status() 97 REG_GET_FIELD(status, in gfxhub_v3_0_3_print_l2_protection_fault_status() 100 REG_GET_FIELD(status, in gfxhub_v3_0_3_print_l2_protection_fault_status() 103 REG_GET_FIELD(status, in gfxhub_v3_0_3_print_l2_protection_fault_status()
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H A D | gfxhub_v2_0.c | 79 u32 cid = REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 89 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 92 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 95 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 98 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 101 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status()
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H A D | gfxhub_v2_1.c | 82 u32 cid = REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 92 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 95 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 98 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 101 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 104 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 512 REG_GET_FIELD(xgmi_lfb_cntl, GCMC_VM_XGMI_LFB_CNTL, PF_MAX_REGION); in gfxhub_v2_1_get_xgmi_info() 532 REG_GET_FIELD(xgmi_lfb_cntl, GCMC_VM_XGMI_LFB_CNTL, PF_LFB_REGION); in gfxhub_v2_1_get_xgmi_info() 536 adev->gmc.xgmi.node_segment_size = REG_GET_FIELD( in gfxhub_v2_1_get_xgmi_info()
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H A D | gmc_v6_0.c | 71 if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) { in gmc_v6_0_mc_stop() 602 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); in gmc_v6_0_vm_decode_fault() 603 u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v6_0_vm_decode_fault() 608 mc_id = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v6_0_vm_decode_fault() 613 REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v6_0_vm_decode_fault() 790 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v6_0_get_vbios_fb_size() 795 size = (REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_HEIGHT) * in gmc_v6_0_get_vbios_fb_size() 796 REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_WIDTH) * in gmc_v6_0_get_vbios_fb_size()
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H A D | gfxhub_v11_5_0.c | 83 u32 cid = REG_GET_FIELD(status, in gfxhub_v11_5_0_print_l2_protection_fault_status() 93 REG_GET_FIELD(status, in gfxhub_v11_5_0_print_l2_protection_fault_status() 96 REG_GET_FIELD(status, in gfxhub_v11_5_0_print_l2_protection_fault_status() 99 REG_GET_FIELD(status, in gfxhub_v11_5_0_print_l2_protection_fault_status() 102 REG_GET_FIELD(status, in gfxhub_v11_5_0_print_l2_protection_fault_status() 105 REG_GET_FIELD(status, in gfxhub_v11_5_0_print_l2_protection_fault_status()
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H A D | mmhub_v3_0_2.c | 102 cid = REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 104 rw = REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 115 REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 118 REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 121 REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 124 REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status()
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H A D | gfxhub_v3_0.c | 78 u32 cid = REG_GET_FIELD(status, in gfxhub_v3_0_print_l2_protection_fault_status() 88 REG_GET_FIELD(status, in gfxhub_v3_0_print_l2_protection_fault_status() 91 REG_GET_FIELD(status, in gfxhub_v3_0_print_l2_protection_fault_status() 94 REG_GET_FIELD(status, in gfxhub_v3_0_print_l2_protection_fault_status() 97 REG_GET_FIELD(status, in gfxhub_v3_0_print_l2_protection_fault_status() 100 REG_GET_FIELD(status, in gfxhub_v3_0_print_l2_protection_fault_status()
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H A D | gfxhub_v12_0.c | 85 u32 cid = REG_GET_FIELD(status, in gfxhub_v12_0_print_l2_protection_fault_status() 95 REG_GET_FIELD(status, in gfxhub_v12_0_print_l2_protection_fault_status() 98 REG_GET_FIELD(status, in gfxhub_v12_0_print_l2_protection_fault_status() 101 REG_GET_FIELD(status, in gfxhub_v12_0_print_l2_protection_fault_status() 104 REG_GET_FIELD(status, in gfxhub_v12_0_print_l2_protection_fault_status() 107 REG_GET_FIELD(status, in gfxhub_v12_0_print_l2_protection_fault_status()
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H A D | iceland_ih.c | 197 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr() 203 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr() 349 if (REG_GET_FIELD(tmp, SRBM_STATUS, IH_BUSY)) in iceland_ih_is_idle() 364 if (!REG_GET_FIELD(tmp, SRBM_STATUS, IH_BUSY)) in iceland_ih_wait_for_idle()
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | vega10_thermal.c | 74 duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1), in vega10_fan_ctrl_get_fan_speed_pwm() 76 duty = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_THERMAL_STATUS), in vega10_fan_ctrl_get_fan_speed_pwm() 104 REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_TACH_STATUS), in vega10_fan_ctrl_get_fan_speed_rpm() 132 REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2), in vega10_fan_ctrl_set_static_mode() 135 REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2), in vega10_fan_ctrl_set_static_mode() 263 duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1), in vega10_fan_ctrl_set_fan_speed_pwm()
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