| /linux/drivers/gpu/drm/amd/display/dc/hpo/dcn31/ |
| H A D | dcn31_hpo_dp_link_encoder.c | 467 REG_GET_2(DP_DPHY_SYM32_SAT_VC0, in dcn31_hpo_dp_link_enc_read_state()
470 REG_GET_2(DP_DPHY_SYM32_SAT_VC1, in dcn31_hpo_dp_link_enc_read_state()
473 REG_GET_2(DP_DPHY_SYM32_SAT_VC2, in dcn31_hpo_dp_link_enc_read_state()
476 REG_GET_2(DP_DPHY_SYM32_SAT_VC3, in dcn31_hpo_dp_link_enc_read_state()
480 REG_GET_2(DP_DPHY_SYM32_VC_RATE_CNTL0, in dcn31_hpo_dp_link_enc_read_state()
483 REG_GET_2(DP_DPHY_SYM32_VC_RATE_CNTL1, in dcn31_hpo_dp_link_enc_read_state()
486 REG_GET_2(DP_DPHY_SYM32_VC_RATE_CNTL2, in dcn31_hpo_dp_link_enc_read_state()
489 REG_GET_2(DP_DPHY_SYM32_VC_RATE_CNTL3, in dcn31_hpo_dp_link_enc_read_state()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| H A D | dcn401_hubp.c | 797 REG_GET_2(BLANK_OFFSET_0, in hubp401_read_state()
807 REG_GET_2(DST_AFTER_SCALER, in hubp401_read_state()
811 REG_GET_2(PREFETCH_SETTINGS, in hubp401_read_state()
815 REG_GET_2(VBLANK_PARAMETERS_0, in hubp401_read_state()
841 REG_GET_2(PER_LINE_DELIVERY_PRE, in hubp401_read_state()
845 REG_GET_2(PER_LINE_DELIVERY, in hubp401_read_state()
871 REG_GET_2(DCN_TTU_QOS_WM, in hubp401_read_state()
875 REG_GET_2(DCN_GLOBAL_TTU_CNTL, in hubp401_read_state()
910 REG_GET_2(DCSURF_PRI_VIEWPORT_DIMENSION, in hubp401_read_state()
914 REG_GET_2(DCSURF_SURFACE_CONFIG, in hubp401_read_state()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn35/ |
| H A D | dcn35_dccg.c | 558 REG_GET_2(SYMCLK32_SE_CNTL, SYMCLK32_SE3_SRC_SEL, &src_sel, SYMCLK32_SE3_EN, &en); in dccg35_is_symclk32_se_src_functional_le_new()
785 REG_GET_2(SYMCLKA_CLOCK_ENABLE, SYMCLKA_FE_SRC_SEL, &src_sel, SYMCLKA_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
788 REG_GET_2(SYMCLKB_CLOCK_ENABLE, SYMCLKB_FE_SRC_SEL, &src_sel, SYMCLKB_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
791 REG_GET_2(SYMCLKC_CLOCK_ENABLE, SYMCLKC_FE_SRC_SEL, &src_sel, SYMCLKC_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
794 REG_GET_2(SYMCLKD_CLOCK_ENABLE, SYMCLKD_FE_SRC_SEL, &src_sel, SYMCLKD_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
797 REG_GET_2(SYMCLKE_CLOCK_ENABLE, SYMCLKE_FE_SRC_SEL, &src_sel, SYMCLKE_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
881 REG_GET_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_is_symclk32_se_rcg()
886 REG_GET_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_is_symclk32_se_rcg()
891 REG_GET_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_is_symclk32_se_rcg()
896 REG_GET_2(DCCG_GATE_DISABLE_CNTL3, in dccg35_is_symclk32_se_rcg()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn32/ |
| H A D | dcn32_dccg.c | 72 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg32_get_pixel_rate_div()
77 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg32_get_pixel_rate_div()
82 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg32_get_pixel_rate_div()
87 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg32_get_pixel_rate_div()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| H A D | dcn10_hubp.c | 904 REG_GET_2(BLANK_OFFSET_0, in hubp1_read_state_common()
914 REG_GET_2(DST_AFTER_SCALER, in hubp1_read_state_common()
919 REG_GET_2(PREFETCH_SETTINS, in hubp1_read_state_common()
923 REG_GET_2(PREFETCH_SETTINGS, in hubp1_read_state_common()
927 REG_GET_2(VBLANK_PARAMETERS_0, in hubp1_read_state_common()
955 REG_GET_2(PER_LINE_DELIVERY_PRE, in hubp1_read_state_common()
959 REG_GET_2(PER_LINE_DELIVERY, in hubp1_read_state_common()
991 REG_GET_2(DCN_TTU_QOS_WM, in hubp1_read_state_common()
995 REG_GET_2(DCN_GLOBAL_TTU_CNTL, in hubp1_read_state_common()
1030 REG_GET_2(DCSURF_PRI_VIEWPORT_DIMENSION, in hubp1_read_state_common()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
| H A D | dcn401_dccg.c | 130 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg401_get_pixel_rate_div()
135 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg401_get_pixel_rate_div()
140 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg401_get_pixel_rate_div()
145 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg401_get_pixel_rate_div()
875 REG_GET_2(SYMCLKA_CLOCK_ENABLE, SYMCLKA_FE_EN, &fe_clk_en[0], in dccg401_get_number_enabled_symclk_fe_connected_to_be()
878 REG_GET_2(SYMCLKB_CLOCK_ENABLE, SYMCLKB_FE_EN, &fe_clk_en[1], in dccg401_get_number_enabled_symclk_fe_connected_to_be()
881 REG_GET_2(SYMCLKC_CLOCK_ENABLE, SYMCLKC_FE_EN, &fe_clk_en[2], in dccg401_get_number_enabled_symclk_fe_connected_to_be()
884 REG_GET_2(SYMCLKD_CLOCK_ENABLE, SYMCLKD_FE_EN, &fe_clk_en[3], in dccg401_get_number_enabled_symclk_fe_connected_to_be()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
| H A D | dcn314_dccg.c | 72 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg314_get_pixel_rate_div()
77 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg314_get_pixel_rate_div()
82 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg314_get_pixel_rate_div()
87 REG_GET_2(OTG_PIXEL_RATE_DIV, in dccg314_get_pixel_rate_div()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| H A D | dcn20_hubp.c | 1139 REG_GET_2(BLANK_OFFSET_0, in hubp2_read_state_common()
1149 REG_GET_2(DST_AFTER_SCALER, in hubp2_read_state_common()
1154 REG_GET_2(PREFETCH_SETTINS, in hubp2_read_state_common()
1158 REG_GET_2(PREFETCH_SETTINGS, in hubp2_read_state_common()
1162 REG_GET_2(VBLANK_PARAMETERS_0, in hubp2_read_state_common()
1190 REG_GET_2(PER_LINE_DELIVERY_PRE, in hubp2_read_state_common()
1194 REG_GET_2(PER_LINE_DELIVERY, in hubp2_read_state_common()
1226 REG_GET_2(DCN_TTU_QOS_WM, in hubp2_read_state_common()
1230 REG_GET_2(DCN_GLOBAL_TTU_CNTL, in hubp2_read_state_common()
1265 REG_GET_2(DCSURF_PRI_VIEWPORT_DIMENSION, in hubp2_read_state_common()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_panel_cntl.c | 152 REG_GET_2(PWRSEQ_CNTL, LVTMA_BLON, &blon, LVTMA_BLON_OVRD, &blon_ovrd); in dce_is_panel_backlight_on()
168 REG_GET_2(PWRSEQ_CNTL, LVTMA_DIGON, &dig_on, LVTMA_DIGON_OVRD, &dig_on_ovrd); in dce_is_panel_powered_on()
205 REG_GET_2(BL_PWM_PERIOD_CNTL, in dce_driver_set_backlight()
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| H A D | dcn10_optc.c | 476 REG_GET_2(OTG_BLANK_CONTROL, in optc1_is_blanked()
703 REG_GET_2(OTG_STATUS_POSITION, in optc1_get_position()
1240 REG_GET_2(OTG_V_BLANK_START_END, in optc1_get_crtc_scanoutpos()
1338 REG_GET_2(OTG_V_BLANK_START_END, in optc1_read_otg_state()
1360 REG_GET_2(OTG_V_SYNC_A, in optc1_read_otg_state()
1364 REG_GET_2(OTG_H_BLANK_START_END, in optc1_read_otg_state()
1368 REG_GET_2(OTG_H_SYNC_A, in optc1_read_otg_state()
1415 REG_GET_2(OTG_V_BLANK_START_END, in optc1_get_otg_active_size()
1419 REG_GET_2(OTG_H_BLANK_START_END, in optc1_get_otg_active_size()
1537 REG_GET_2(OTG_CRC0_DATA_RG, in optc1_get_crc()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 137 REG_GET_2(DOMAIN22_PG_STATUS, in dcn401_read_ono_state()
143 REG_GET_2(DOMAIN23_PG_STATUS, in dcn401_read_ono_state()
149 REG_GET_2(DOMAIN24_PG_STATUS, in dcn401_read_ono_state()
155 REG_GET_2(DOMAIN25_PG_STATUS, in dcn401_read_ono_state()
161 REG_GET_2(DOMAIN0_PG_STATUS, in dcn401_read_ono_state()
167 REG_GET_2(DOMAIN16_PG_STATUS, in dcn401_read_ono_state()
173 REG_GET_2(DOMAIN1_PG_STATUS, in dcn401_read_ono_state()
179 REG_GET_2(DOMAIN17_PG_STATUS, in dcn401_read_ono_state()
185 REG_GET_2(DOMAIN2_PG_STATUS, in dcn401_read_ono_state()
191 REG_GET_2(DOMAIN18_PG_STATUS, in dcn401_read_ono_state()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn35/ |
| H A D | dcn35_dsc.c | 95 …REG_GET_2(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN, &dsc_fw_config, DSCRM_DSC_OPP_PIPE_SOURC… in dsc35_enable()
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn30/ |
| H A D | dcn30_optc.c | 73 REG_GET_2(OTG_V_BLANK_START_END, in optc3_lock_doublebuffer_enable()
76 REG_GET_2(OTG_H_BLANK_START_END, in optc3_lock_doublebuffer_enable()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn21/ |
| H A D | dcn21_hubp.c | 357 REG_GET_2(BLANK_OFFSET_0, in hubp21_validate_dml_output()
364 REG_GET_2(DST_AFTER_SCALER, in hubp21_validate_dml_output()
405 REG_GET_2(PER_LINE_DELIVERY, in hubp21_validate_dml_output()
408 REG_GET_2(PER_LINE_DELIVERY_PRE, in hubp21_validate_dml_output()
478 REG_GET_2(DCN_TTU_QOS_WM, in hubp21_validate_dml_output()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| H A D | dcn20_dccg.c | 85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_link_encoder.c | 59 REG_GET_2(RDPCSTX_PHY_CNTL2, RDPCS_PHY_DPALT_DISABLE, &value1, in dcn201_link_encoder_get_max_link_cap()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/ |
| H A D | hw_ddc.c | 113 REG_GET_2(gpio.MASK_reg, in set_config()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| H A D | dcn301_panel_cntl.c | 175 REG_GET_2(PWRSEQ_CNTL, PANEL_DIGON, &dig_on, PANEL_DIGON_OVRD, &dig_on_ovrd); in dcn301_is_panel_powered_on()
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| /linux/drivers/gpu/drm/amd/display/dc/mpc/dcn10/ |
| H A D | dcn10_mpc.c | 170 REG_GET_2(MPCC_STATUS[mpcc_id], in mpc1_assert_mpcc_idle_before_connect()
472 REG_GET_2(MPCC_STATUS[mpcc_inst], MPCC_IDLE, &s->idle, in mpc1_read_mpcc_state()
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| H A D | dcn401_dsc.c | 132 REG_GET_2(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN, &s->dsc_fw_en, in dsc401_read_state()
173 …REG_GET_2(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN, &dsc_fw_config, DSCRM_DSC_OPP_PIPE_SOURC… in dsc401_enable()
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| /linux/drivers/gpu/drm/amd/display/dc/opp/dcn20/ |
| H A D | dcn20_opp.c | 330 REG_GET_2(DPG_CONTROL, in opp2_dpg_is_blanked()
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn20/ |
| H A D | dcn20_dpp.c | 66 REG_GET_2(CM_3DLUT_READ_WRITE_CONTROL, in dpp20_read_state()
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| H A D | dcn20_dsc.c | 161 REG_GET_2(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN, &s->dsc_fw_en, in dsc2_read_state()
236 …REG_GET_2(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN, &dsc_fw_config, DSCRM_DSC_OPP_PIPE_SOURC… in dsc2_enable()
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| /linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| H A D | dcn30_dwb_cm.c | 153 REG_GET_2(DWB_OGAM_CONTROL, in dwb3_get_ogam_current()
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| /linux/drivers/gpu/drm/amd/display/dc/mpc/dcn30/ |
| H A D | dcn30_mpc.c | 123 REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id], MPCC_OGAM_MODE_CURRENT, &state_mode, in mpc3_get_ogam_current()
1469 REG_GET_2(MPCC_STATUS[mpcc_inst], MPCC_IDLE, &s->idle, in mpc3_read_mpcc_state()
1495 REG_GET_2(MPCC_OGAM_CONTROL[mpcc_inst], in mpc3_read_mpcc_state()
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