Searched refs:REG_FPGA0_RF_MODE (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/net/wireless/realtek/rtl8xxxu/ |
| H A D | 8188f.c | 458 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188f_spur_calibration()
460 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188f_spur_calibration()
486 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188f_spur_calibration()
488 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188f_spur_calibration()
533 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188fu_config_channel()
536 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188fu_config_channel()
544 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188fu_config_channel()
546 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188fu_config_channel()
549 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188fu_config_channel()
552 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188fu_config_channel()
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| H A D | 8710b.c | 715 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
717 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
731 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
733 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
736 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
739 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
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| H A D | 8192f.c | 622 rtl8xxxu_write32_mask(priv, REG_FPGA0_RF_MODE, FPGA_RF_MODE, ht40); in rtl8192fu_config_channel()
626 rtl8xxxu_write32_mask(priv, REG_FPGA0_RF_MODE, GENMASK(10, 8), 4); in rtl8192fu_config_channel()
629 rtl8xxxu_write32_mask(priv, REG_FPGA0_RF_MODE, BIT(13) | BIT(12), 2); in rtl8192fu_config_channel()
640 rtl8xxxu_write32_set(priv, REG_FPGA0_RF_MODE, FPGA_RF_MODE_CCK); in rtl8192fu_config_channel()
795 rtl8xxxu_write32_clear(priv, REG_FPGA0_RF_MODE, FPGA_RF_MODE_OFDM); in rtl8192f_phy_lc_calibrate()
796 rtl8xxxu_write32_set(priv, REG_FPGA0_RF_MODE, FPGA_RF_MODE_OFDM); in rtl8192f_phy_lc_calibrate()
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| H A D | regs.h | 883 #define REG_FPGA0_RF_MODE 0x0800 macro
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| H A D | 8723b.c | 919 REG_FPGA0_XB_RF_INT_OE, REG_FPGA0_RF_MODE in rtl8723bu_phy_iqcalibrate()
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