Searched refs:Pixel (Results 1 – 20 of 20) sorted by relevance
91 #define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL)) argument
47 tristate "NXP i.MX Pixel Pipeline (PXP)"53 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling,
20 **Pixel unpacked representation.**
145 - IN: Pixel format for which the frame sizes are enumerated.
131 - IN: Pixel format for which the frame intervals are enumerated.
110 - Graphics content. Pixel data should be passed unfiltered and
392 Pixel format erratum.
116 - Pixel clock in Hz. Ex. 74.25MHz->74250000
224 displayed only when the bit is *set*. Pixel coordinates translate to
15 Pixel Valve (DRM CRTC)
55 The Pixel lightbar has a number of built-in sequences
20 Pixel Array sub-device
20 /* Pixel clock, porches, etc */
33 Pixel clock in picoseconds
124 Pixel values are encoded as indices into a colormap that stores red, green and268 Pixel values are bits_per_pixel wide and are split in non-overlapping red,
1713 #define LCCR1_DisWdth(Pixel) /* Display Width [16..1024 pix.] */ \ argument1714 (((Pixel) - 16)/16 << FShft (LCCR1_PPL))
39 hardware blocks. The VFE has different input interfaces. The PIX (Pixel) input
90 Pixel blend mode is a DRM plane composition property of :c:type:`drm_plane` used to
164 pad(s). Pixel encoding conversion includes but isn't limited
45 Google Pixel 3 phone for example::