Home
last modified time | relevance | path

Searched refs:PORT_D (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/i915/gvt/
H A Ddisplay.c470 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_D)) { in emulate_monitor_status_change()
472 ~DPLL_CTRL2_DDI_CLK_OFF(PORT_D); in emulate_monitor_status_change()
474 DPLL_CTRL2_DDI_CLK_SEL(DPLL_ID_SKL_DPLL0, PORT_D); in emulate_monitor_status_change()
476 DPLL_CTRL2_DDI_SEL_OVERRIDE(PORT_D); in emulate_monitor_status_change()
483 (PORT_D << TRANS_DDI_PORT_SHIFT) | in emulate_monitor_status_change()
486 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) &= in emulate_monitor_status_change()
488 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) |= in emulate_monitor_status_change()
491 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) |= DDI_BUF_CTL_ENABLE; in emulate_monitor_status_change()
492 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) &= ~DDI_BUF_IS_IDLE; in emulate_monitor_status_change()
785 clean_virtual_dp_monitor(vgpu, PORT_D); in intel_vgpu_clean_display()
[all …]
H A Dvgpu.c380 ret = intel_gvt_set_edid(vgpu, PORT_D); in intel_gvt_create_vgpu()
H A Dhandlers.c677 if (port != PORT_B && port != PORT_D) { in vgpu_update_refresh_rate()
2379 MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
2385 MMIO_DH(DP_TP_CTL(PORT_D), D_ALL, NULL, dp_tp_ctl_mmio_write); in init_generic_mmio_info()
2391 MMIO_DH(DP_TP_STATUS(PORT_D), D_ALL, NULL, dp_tp_status_mmio_write); in init_generic_mmio_info()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_limits.h98 PORT_D, enumerator
106 PORT_TC1 = PORT_D,
H A Dintel_display_device.c426 ….__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D…
438 ….__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D…
453 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDV…
482 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SD…
507 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SD…
585 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
638 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
657 .__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* HDMI/DP B/C/D */
682 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
931 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
[all …]
H A Dintel_display.c1864 port == PORT_D) in intel_port_to_phy()
7863 dpd_is_edp = intel_dp_is_port_edp(display, PORT_D); in intel_setup_outputs()
7881 g4x_hdmi_init(display, PCH_HDMID, PORT_D); in intel_setup_outputs()
7887 g4x_dp_init(display, PCH_DP_D, PORT_D); in intel_setup_outputs()
7928 has_port = intel_bios_is_port_present(display, PORT_D); in intel_setup_outputs()
7930 g4x_dp_init(display, CHV_DP_D, PORT_D); in intel_setup_outputs()
7932 g4x_hdmi_init(display, CHV_HDMID, PORT_D); in intel_setup_outputs()
7979 g4x_dp_init(display, DP_D, PORT_D); in intel_setup_outputs()
H A Dintel_hdcp.c469 case PORT_D: in intel_hdcp_get_repeater_ctl()
H A Dintel_bios.c2347 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, in dvo_port_to_port()