1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 #ifndef __MFD_88PM886_H 3 #define __MFD_88PM886_H 4 5 #include <linux/i2c.h> 6 #include <linux/regmap.h> 7 8 #define PM886_A1_CHIP_ID 0xa1 9 10 #define PM886_IRQ_ONKEY 0 11 12 #define PM886_PAGE_OFFSET_REGULATORS 1 13 #define PM886_PAGE_OFFSET_GPADC 2 14 #define PM886_PAGE_OFFSET_BATTERY 3 15 16 #define PM886_REG_ID 0x00 17 18 #define PM886_REG_STATUS1 0x01 19 #define PM886_ONKEY_STS1 BIT(0) 20 21 #define PM886_REG_INT_STATUS1 0x05 22 23 #define PM886_REG_INT_ENA_1 0x0a 24 #define PM886_INT_ENA1_ONKEY BIT(0) 25 26 #define PM886_REG_MISC_CONFIG1 0x14 27 #define PM886_SW_PDOWN BIT(5) 28 29 #define PM886_REG_MISC_CONFIG2 0x15 30 #define PM886_INT_INV BIT(0) 31 #define PM886_INT_CLEAR BIT(1) 32 #define PM886_INT_RC 0x00 33 #define PM886_INT_WC BIT(1) 34 #define PM886_INT_MASK_MODE BIT(2) 35 36 #define PM886_REG_RTC_CNT1 0xd1 37 #define PM886_REG_RTC_CNT2 0xd2 38 #define PM886_REG_RTC_CNT3 0xd3 39 #define PM886_REG_RTC_CNT4 0xd4 40 #define PM886_REG_RTC_SPARE1 0xea 41 #define PM886_REG_RTC_SPARE2 0xeb 42 #define PM886_REG_RTC_SPARE3 0xec 43 #define PM886_REG_RTC_SPARE4 0xed 44 #define PM886_REG_RTC_SPARE5 0xee 45 #define PM886_REG_RTC_SPARE6 0xef 46 47 #define PM886_REG_BUCK_EN 0x08 48 #define PM886_REG_LDO_EN1 0x09 49 #define PM886_REG_LDO_EN2 0x0a 50 #define PM886_REG_LDO1_VOUT 0x20 51 #define PM886_REG_LDO2_VOUT 0x26 52 #define PM886_REG_LDO3_VOUT 0x2c 53 #define PM886_REG_LDO4_VOUT 0x32 54 #define PM886_REG_LDO5_VOUT 0x38 55 #define PM886_REG_LDO6_VOUT 0x3e 56 #define PM886_REG_LDO7_VOUT 0x44 57 #define PM886_REG_LDO8_VOUT 0x4a 58 #define PM886_REG_LDO9_VOUT 0x50 59 #define PM886_REG_LDO10_VOUT 0x56 60 #define PM886_REG_LDO11_VOUT 0x5c 61 #define PM886_REG_LDO12_VOUT 0x62 62 #define PM886_REG_LDO13_VOUT 0x68 63 #define PM886_REG_LDO14_VOUT 0x6e 64 #define PM886_REG_LDO15_VOUT 0x74 65 #define PM886_REG_LDO16_VOUT 0x7a 66 #define PM886_REG_BUCK1_VOUT 0xa5 67 #define PM886_REG_BUCK2_VOUT 0xb3 68 #define PM886_REG_BUCK3_VOUT 0xc1 69 #define PM886_REG_BUCK4_VOUT 0xcf 70 #define PM886_REG_BUCK5_VOUT 0xdd 71 72 #define PM886_LDO_VSEL_MASK 0x0f 73 #define PM886_BUCK_VSEL_MASK 0x7f 74 75 /* GPADC enable/disable registers */ 76 #define PM886_REG_GPADC_CONFIG(n) (n) 77 78 #define PM886_GPADC_VSC_EN BIT(0) 79 #define PM886_GPADC_VBAT_EN BIT(1) 80 #define PM886_GPADC_GNDDET1_EN BIT(3) 81 #define PM886_GPADC_VBUS_EN BIT(4) 82 #define PM886_GPADC_VCHG_PWR_EN BIT(5) 83 #define PM886_GPADC_VCF_OUT_EN BIT(6) 84 #define PM886_GPADC_CONFIG1_EN_ALL \ 85 (PM886_GPADC_VSC_EN | \ 86 PM886_GPADC_VBAT_EN | \ 87 PM886_GPADC_GNDDET1_EN | \ 88 PM886_GPADC_VBUS_EN | \ 89 PM886_GPADC_VCHG_PWR_EN | \ 90 PM886_GPADC_VCF_OUT_EN) 91 92 #define PM886_GPADC_TINT_EN BIT(0) 93 #define PM886_GPADC_PMODE_EN BIT(1) 94 #define PM886_GPADC_GPADC0_EN BIT(2) 95 #define PM886_GPADC_GPADC1_EN BIT(3) 96 #define PM886_GPADC_GPADC2_EN BIT(4) 97 #define PM886_GPADC_GPADC3_EN BIT(5) 98 #define PM886_GPADC_MIC_DET_EN BIT(6) 99 #define PM886_GPADC_CONFIG2_EN_ALL \ 100 (PM886_GPADC_TINT_EN | \ 101 PM886_GPADC_GPADC0_EN | \ 102 PM886_GPADC_GPADC1_EN | \ 103 PM886_GPADC_GPADC2_EN | \ 104 PM886_GPADC_GPADC3_EN | \ 105 PM886_GPADC_MIC_DET_EN) 106 107 /* No CONFIG3_EN_ALL because this is the only bit there. */ 108 #define PM886_GPADC_GND_DET2_EN BIT(0) 109 110 /* GPADC channel registers */ 111 #define PM886_REG_GPADC_VSC 0x40 112 #define PM886_REG_GPADC_VCHG_PWR 0x4c 113 #define PM886_REG_GPADC_VCF_OUT 0x4e 114 #define PM886_REG_GPADC_TINT 0x50 115 #define PM886_REG_GPADC_GPADC0 0x54 116 #define PM886_REG_GPADC_GPADC1 0x56 117 #define PM886_REG_GPADC_GPADC2 0x58 118 #define PM886_REG_GPADC_VBAT 0xa0 119 #define PM886_REG_GPADC_GND_DET1 0xa4 120 #define PM886_REG_GPADC_GND_DET2 0xa6 121 #define PM886_REG_GPADC_VBUS 0xa8 122 #define PM886_REG_GPADC_GPADC3 0xaa 123 #define PM886_REG_GPADC_MIC_DET 0xac 124 #define PM886_REG_GPADC_VBAT_SLP 0xb0 125 126 /* VBAT_SLP is the last register and is 2 bytes wide like other channels. */ 127 #define PM886_GPADC_MAX_REGISTER (PM886_REG_GPADC_VBAT_SLP + 1) 128 129 #define PM886_GPADC_BIAS_LEVELS 16 130 #define PM886_GPADC_INDEX_TO_BIAS_uA(i) (1 + (i) * 5) 131 132 /* Battery block register definitions */ 133 #define PM886_REG_CLS_CONFIG1 0x71 134 135 struct pm886_chip { 136 struct i2c_client *client; 137 unsigned int chip_id; 138 struct regmap *regmap; 139 struct regmap *regmap_battery; 140 }; 141 #endif /* __MFD_88PM886_H */ 142