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Searched refs:PLL_VPLL1 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dpll.c41 { PLL_VPLL1 , 0x680520 },
50 { PLL_VPLL1 , 0x680520 },
64 { PLL_VPLL1 , 0x614900 },
76 { PLL_VPLL1 , 0x614900 },
/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dpll.h38 PLL_VPLL1 = 0x81, enumerator
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dgv100.c48 case PLL_VPLL1: in gv100_devinit_pll_set()
H A Dtu102.c49 case PLL_VPLL1: in tu102_devinit_pll_set()
H A Dga100.c49 case PLL_VPLL1: in ga100_devinit_pll_set()
H A Dgf100.c50 case PLL_VPLL1: in gf100_devinit_pll_set()
H A Dgt215.c50 case PLL_VPLL1: in gt215_devinit_pll_set()
H A Dnv50.c58 case PLL_VPLL1: in nv50_devinit_pll_set()
/linux/include/dt-bindings/clock/
H A Drk3308-cru.h14 #define PLL_VPLL1 4 macro
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c265 enum nvbios_pll_type pll = head ? PLL_VPLL1 : PLL_VPLL0; in nouveau_hw_fix_bad_vpll()
403 nouveau_hw_get_pllvals(dev, head ? PLL_VPLL1 : PLL_VPLL0, &regp->pllvals); in nv_save_state_ramdac()
H A Dcrtc.c129 if (nvbios_pll_parse(bios, nv_crtc->index ? PLL_VPLL1 : PLL_VPLL0, in nv_crtc_calc_state_ext()
/linux/drivers/clk/rockchip/
H A Dclk-rk3308.c189 [vpll1] = PLL(pll_rk3328, PLL_VPLL1, "vpll1", mux_pll_p,