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Searched refs:PLL_VPLL0 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dgv100.c34 int head = type - PLL_VPLL0; in gv100_devinit_pll_set()
47 case PLL_VPLL0: in gv100_devinit_pll_set()
H A Dtu102.c35 int head = type - PLL_VPLL0; in tu102_devinit_pll_set()
48 case PLL_VPLL0: in tu102_devinit_pll_set()
H A Dga100.c35 int head = type - PLL_VPLL0; in ga100_devinit_pll_set()
48 case PLL_VPLL0: in ga100_devinit_pll_set()
H A Dgf100.c49 case PLL_VPLL0: in gf100_devinit_pll_set()
H A Dgt215.c49 case PLL_VPLL0: in gt215_devinit_pll_set()
H A Dnv50.c57 case PLL_VPLL0: in nv50_devinit_pll_set()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dpll.c40 { PLL_VPLL0 , 0x680508 },
49 { PLL_VPLL0 , 0x680508 },
63 { PLL_VPLL0 , 0x614100 },
75 { PLL_VPLL0 , 0x614100 },
/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dpll.h37 PLL_VPLL0 = 0x80, enumerator
/linux/include/dt-bindings/clock/
H A Drk3308-cru.h13 #define PLL_VPLL0 3 macro
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c265 enum nvbios_pll_type pll = head ? PLL_VPLL1 : PLL_VPLL0; in nouveau_hw_fix_bad_vpll()
403 nouveau_hw_get_pllvals(dev, head ? PLL_VPLL1 : PLL_VPLL0, &regp->pllvals); in nv_save_state_ramdac()
H A Dcrtc.c129 if (nvbios_pll_parse(bios, nv_crtc->index ? PLL_VPLL1 : PLL_VPLL0, in nv_crtc_calc_state_ext()
/linux/drivers/clk/rockchip/
H A Dclk-rk3308.c186 [vpll0] = PLL(pll_rk3328, PLL_VPLL0, "vpll0", mux_pll_p,
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dnv50.c1314 nvkm_devinit_pll_set(devinit, PLL_VPLL0 + head->id, khz); in nv50_disp_super_2_1()