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Searched refs:PLL_HPLL (Results 1 – 25 of 26) sorted by relevance

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/linux/include/dt-bindings/clock/
H A Drockchip,rv1126-cru.h68 #define PLL_HPLL 4 macro
H A Drk3568-cru.h14 #define PLL_HPLL 2 macro
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-radxa-zero-3.dtsi517 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-box-demo.dts469 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-lubancat-1.dts576 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-photonicat.dts570 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-nanopi-r5s.dtsi592 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-odroid-m1s.dts650 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-easepi-r1.dts610 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-lckfb-tspi.dts712 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-evb1-v10.dts730 assigned-clock-parents = <&pmucru PLL_HPLL>, <&xin24m>, <&cru PLL_VPLL>;
H A Drk3566-orangepi-3b.dtsi670 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-rock-3c.dts715 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-rock-3b.dts768 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-quartz64-b.dts732 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-anbernic-rgxx3.dtsi706 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-odroid-m1.dts730 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-rock-3a.dts842 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-9tripod-x3568-v4.dts867 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-powkiddy-rk2023.dtsi841 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-quartz64-a.dts831 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-bigtreetech-cb2.dtsi891 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-pinetab2.dtsi924 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3562.dtsi572 <&cru PLL_HPLL>;
/linux/drivers/clk/rockchip/
H A Dclk-rv1126.c206 [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p,

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