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Searched refs:PLL3_Q (Results 1 – 8 of 8) sorted by relevance

/linux/arch/arm/boot/dts/st/
H A Dstm32mp151c-mecio1r0.dts44 assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL3_Q>;
45 assigned-clock-parents = <&rcc PLL3_Q>;
H A Dstm32mp15xx-dhcor-avenger96.dtsi368 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
H A Dstm32mp135f-dhcor-dhsbc.dts278 clocks = <&rcc SAI1>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
H A Dstm32mp157c-phycore-stm32mp15-som.dtsi446 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
/linux/include/dt-bindings/clock/
H A Dstm32h7-clks.h43 #define PLL3_Q 39 macro
H A Dstm32mp13-clks.h32 #define PLL3_Q 17 macro
H A Dstm32mp1-clks.h196 #define PLL3_Q 187 macro
/linux/drivers/clk/stm32/
H A Dclk-stm32mp1.c1808 COMPOSITE(PLL3_Q, "pll3_q", PARENT("pll3"), 0,