1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Renesas R-Car Gen3 for USB2.0 PHY driver
4 *
5 * Copyright (C) 2015-2017 Renesas Electronics Corporation
6 *
7 * This is based on the phy-rcar-gen2 driver:
8 * Copyright (C) 2014 Renesas Solutions Corp.
9 * Copyright (C) 2014 Cogent Embedded, Inc.
10 */
11
12 #include <linux/bitfield.h>
13 #include <linux/bits.h>
14 #include <linux/cleanup.h>
15 #include <linux/extcon-provider.h>
16 #include <linux/interrupt.h>
17 #include <linux/io.h>
18 #include <linux/module.h>
19 #include <linux/mutex.h>
20 #include <linux/mux/consumer.h>
21 #include <linux/of.h>
22 #include <linux/phy/phy.h>
23 #include <linux/platform_device.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/reset.h>
28 #include <linux/string.h>
29 #include <linux/usb/of.h>
30 #include <linux/workqueue.h>
31
32 /******* USB2.0 Host registers (original offset is +0x200) *******/
33 #define USB2_INT_ENABLE 0x000
34 #define USB2_AHB_BUS_CTR 0x008
35 #define USB2_USBCTR 0x00c
36 #define USB2_REGEN_CG_CTRL 0x104 /* RZ/V2H(P) only */
37 #define USB2_SPD_RSM_TIMSET 0x10c
38 #define USB2_OC_TIMSET 0x110
39 #define USB2_UTMI_CTRL 0x118 /* RZ/V2H(P) only */
40 #define USB2_COMMCTRL 0x600
41 #define USB2_OBINTSTA 0x604
42 #define USB2_OBINTEN 0x608
43 #define USB2_VBCTRL 0x60c
44 #define USB2_LINECTRL1 0x610
45 #define USB2_ADPCTRL 0x630
46
47 /* INT_ENABLE */
48 #define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
49 #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */
50 #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */
51
52 /* AHB_BUS_CTR */
53 #define USB2_AHB_BUS_CTR_MBL_MASK GENMASK(1, 0)
54 #define USB2_AHB_BUS_CTR_MBL_INCR4 2
55
56 /* USBCTR */
57 #define USB2_USBCTR_DIRPD BIT(2)
58 #define USB2_USBCTR_PLL_RST BIT(1)
59
60 /* REGEN_CG_CTRL*/
61 #define USB2_REGEN_CG_CTRL_UPHY_WEN BIT(0)
62
63 /* SPD_RSM_TIMSET */
64 #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
65
66 /* OC_TIMSET */
67 #define USB2_OC_TIMSET_INIT 0x000209ab
68
69 /* UTMI_CTRL */
70 #define USB2_UTMI_CTRL_INIT 0x8000018f
71
72 /* COMMCTRL */
73 #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
74
75 /* OBINTSTA and OBINTEN */
76 #define USB2_OBINTSTA_CLEAR GENMASK(31, 0)
77 #define USB2_OBINT_SESSVLDCHG BIT(12)
78 #define USB2_OBINT_IDDIGCHG BIT(11)
79 #define USB2_OBINT_VBSTAINT BIT(3)
80 #define USB2_OBINT_IDCHG_EN BIT(0) /* RZ/G2L specific */
81
82 /* VBCTRL */
83 #define USB2_VBCTRL_VBSTA_MASK GENMASK(31, 28)
84 #define USB2_VBCTRL_VBSTA_DEFAULT 2
85 #define USB2_VBCTRL_VBLVL_MASK GENMASK(23, 20)
86 #define USB2_VBCTRL_VBLVL(m) FIELD_PREP_CONST(USB2_VBCTRL_VBLVL_MASK, (m))
87 #define USB2_VBCTRL_OCCLREN BIT(16)
88 #define USB2_VBCTRL_DRVVBUSSEL BIT(8)
89 #define USB2_VBCTRL_SIDDQREL BIT(2)
90 #define USB2_VBCTRL_VBOUT BIT(0)
91
92 /* LINECTRL1 */
93 #define USB2_LINECTRL1_DPRPD_EN BIT(19)
94 #define USB2_LINECTRL1_DP_RPD BIT(18)
95 #define USB2_LINECTRL1_DMRPD_EN BIT(17)
96 #define USB2_LINECTRL1_DM_RPD BIT(16)
97 #define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
98
99 /* ADPCTRL */
100 #define USB2_ADPCTRL_OTGSESSVLD BIT(20)
101 #define USB2_ADPCTRL_IDDIG BIT(19)
102 #define USB2_ADPCTRL_VBUSVALID BIT(18)
103 #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
104 #define USB2_ADPCTRL_DRVVBUS BIT(4)
105
106 /* RZ/G2L specific */
107 #define USB2_LINECTRL1_USB2_IDMON BIT(0)
108
109 #define NUM_OF_PHYS 4
110 enum rcar_gen3_phy_index {
111 PHY_INDEX_BOTH_HC,
112 PHY_INDEX_OHCI,
113 PHY_INDEX_EHCI,
114 PHY_INDEX_HSUSB
115 };
116
117 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
118 USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
119 USB2_INT_ENABLE_USBH_INTA_EN,
120 USB2_INT_ENABLE_USBH_INTB_EN,
121 0
122 };
123
124 struct rcar_gen3_phy {
125 struct phy *phy;
126 struct rcar_gen3_chan *ch;
127 u32 int_enable_bits;
128 bool initialized;
129 bool powered;
130 };
131
132 struct rcar_gen3_chan {
133 void __iomem *base;
134 struct device *dev; /* platform_device's device */
135 const struct rcar_gen3_phy_drv_data *phy_data;
136 struct extcon_dev *extcon;
137 struct reset_control *rstc;
138 struct rcar_gen3_phy rphys[NUM_OF_PHYS];
139 struct regulator *vbus;
140 struct work_struct work;
141 spinlock_t lock; /* protects access to hardware and driver data structure. */
142 enum usb_dr_mode dr_mode;
143 bool extcon_host;
144 bool is_otg_channel;
145 bool uses_otg_pins;
146 bool otg_internal_reg;
147 };
148
149 struct rcar_gen3_phy_drv_data {
150 const struct phy_ops *phy_usb2_ops;
151 bool no_adp_ctrl;
152 bool init_bus;
153 bool utmi_ctrl;
154 bool vblvl_ctrl;
155 u32 obint_enable_bits;
156 };
157
158 /*
159 * Combination about is_otg_channel and uses_otg_pins:
160 *
161 * Parameters || Behaviors
162 * is_otg_channel | uses_otg_pins || irqs | role sysfs
163 * ---------------------+---------------++--------------+------------
164 * true | true || enabled | enabled
165 * true | false || disabled | enabled
166 * false | any || disabled | disabled
167 */
168
rcar_gen3_phy_usb2_work(struct work_struct * work)169 static void rcar_gen3_phy_usb2_work(struct work_struct *work)
170 {
171 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
172 work);
173
174 if (ch->extcon_host) {
175 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
176 extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
177 } else {
178 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
179 extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
180 }
181 }
182
rcar_gen3_set_host_mode(struct rcar_gen3_chan * ch,int host)183 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
184 {
185 void __iomem *usb2_base = ch->base;
186 u32 val = readl(usb2_base + USB2_COMMCTRL);
187
188 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
189 if (host)
190 val &= ~USB2_COMMCTRL_OTG_PERI;
191 else
192 val |= USB2_COMMCTRL_OTG_PERI;
193 writel(val, usb2_base + USB2_COMMCTRL);
194 }
195
rcar_gen3_set_linectrl(struct rcar_gen3_chan * ch,int dp,int dm)196 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
197 {
198 void __iomem *usb2_base = ch->base;
199 u32 val = readl(usb2_base + USB2_LINECTRL1);
200
201 dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
202 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
203 if (dp)
204 val |= USB2_LINECTRL1_DP_RPD;
205 if (dm)
206 val |= USB2_LINECTRL1_DM_RPD;
207 writel(val, usb2_base + USB2_LINECTRL1);
208 }
209
rcar_gen3_phy_usb2_set_vbus(struct rcar_gen3_chan * ch,u32 vbus_ctrl_reg,u32 vbus_ctrl_val,bool enable)210 static void rcar_gen3_phy_usb2_set_vbus(struct rcar_gen3_chan *ch,
211 u32 vbus_ctrl_reg,
212 u32 vbus_ctrl_val,
213 bool enable)
214 {
215 void __iomem *usb2_base = ch->base;
216 u32 val;
217
218 val = readl(usb2_base + vbus_ctrl_reg);
219 if (enable)
220 val |= vbus_ctrl_val;
221 else
222 val &= ~vbus_ctrl_val;
223 writel(val, usb2_base + vbus_ctrl_reg);
224
225 dev_vdbg(ch->dev, "%s: reg=0x%08x, val=%08x, enable=%d\n",
226 __func__, vbus_ctrl_reg, val, enable);
227 }
228
rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan * ch,int vbus)229 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
230 {
231 if (ch->otg_internal_reg) {
232 regulator_hardware_enable(ch->vbus, vbus);
233 return;
234 }
235
236 if (ch->phy_data->no_adp_ctrl || ch->phy_data->vblvl_ctrl) {
237 if (ch->vbus)
238 regulator_hardware_enable(ch->vbus, vbus);
239
240 rcar_gen3_phy_usb2_set_vbus(ch, USB2_VBCTRL,
241 USB2_VBCTRL_VBOUT, vbus);
242 return;
243 }
244
245 rcar_gen3_phy_usb2_set_vbus(ch, USB2_ADPCTRL,
246 USB2_ADPCTRL_DRVVBUS, vbus);
247 }
248
rcar_gen3_control_otg_irq(struct rcar_gen3_chan * ch,int enable)249 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
250 {
251 void __iomem *usb2_base = ch->base;
252 u32 val = readl(usb2_base + USB2_OBINTEN);
253
254 if (ch->uses_otg_pins && enable)
255 val |= ch->phy_data->obint_enable_bits;
256 else
257 val &= ~ch->phy_data->obint_enable_bits;
258 writel(val, usb2_base + USB2_OBINTEN);
259 }
260
rcar_gen3_init_for_host(struct rcar_gen3_chan * ch)261 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
262 {
263 rcar_gen3_set_linectrl(ch, 1, 1);
264 rcar_gen3_set_host_mode(ch, 1);
265 rcar_gen3_enable_vbus_ctrl(ch, 1);
266
267 ch->extcon_host = true;
268 schedule_work(&ch->work);
269 }
270
rcar_gen3_init_for_peri(struct rcar_gen3_chan * ch)271 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
272 {
273 rcar_gen3_set_linectrl(ch, 0, 1);
274 rcar_gen3_set_host_mode(ch, 0);
275 rcar_gen3_enable_vbus_ctrl(ch, 0);
276
277 ch->extcon_host = false;
278 schedule_work(&ch->work);
279 }
280
rcar_gen3_init_for_b_host(struct rcar_gen3_chan * ch)281 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
282 {
283 void __iomem *usb2_base = ch->base;
284 u32 val;
285
286 val = readl(usb2_base + USB2_LINECTRL1);
287 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
288
289 rcar_gen3_set_linectrl(ch, 1, 1);
290 rcar_gen3_set_host_mode(ch, 1);
291 rcar_gen3_enable_vbus_ctrl(ch, 0);
292
293 val = readl(usb2_base + USB2_LINECTRL1);
294 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
295 }
296
rcar_gen3_init_for_a_peri(struct rcar_gen3_chan * ch)297 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
298 {
299 rcar_gen3_set_linectrl(ch, 0, 1);
300 rcar_gen3_set_host_mode(ch, 0);
301 rcar_gen3_enable_vbus_ctrl(ch, 1);
302 }
303
rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan * ch)304 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
305 {
306 rcar_gen3_control_otg_irq(ch, 0);
307
308 rcar_gen3_enable_vbus_ctrl(ch, 1);
309 rcar_gen3_init_for_host(ch);
310
311 rcar_gen3_control_otg_irq(ch, 1);
312 }
313
rcar_gen3_check_id(struct rcar_gen3_chan * ch)314 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
315 {
316 if (ch->phy_data->vblvl_ctrl) {
317 u32 val = readl(ch->base + USB2_ADPCTRL);
318 bool vbus_valid = val & USB2_ADPCTRL_VBUSVALID;
319 bool device = val & USB2_ADPCTRL_IDDIG;
320
321 return device == vbus_valid;
322 }
323
324 if (!ch->uses_otg_pins)
325 return ch->dr_mode != USB_DR_MODE_HOST;
326
327 if (ch->phy_data->no_adp_ctrl)
328 return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON);
329
330 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
331 }
332
rcar_gen3_device_recognition(struct rcar_gen3_chan * ch)333 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
334 {
335 if (!rcar_gen3_check_id(ch))
336 rcar_gen3_init_for_host(ch);
337 else
338 rcar_gen3_init_for_peri(ch);
339 }
340
rcar_gen3_is_host(struct rcar_gen3_chan * ch)341 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
342 {
343 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
344 }
345
rcar_gen3_get_phy_mode(struct rcar_gen3_chan * ch)346 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
347 {
348 if (rcar_gen3_is_host(ch))
349 return PHY_MODE_USB_HOST;
350
351 return PHY_MODE_USB_DEVICE;
352 }
353
rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan * ch)354 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
355 {
356 int i;
357
358 for (i = 0; i < NUM_OF_PHYS; i++) {
359 if (ch->rphys[i].initialized)
360 return true;
361 }
362
363 return false;
364 }
365
rcar_gen3_is_any_otg_rphy_initialized(struct rcar_gen3_chan * ch)366 static bool rcar_gen3_is_any_otg_rphy_initialized(struct rcar_gen3_chan *ch)
367 {
368 for (enum rcar_gen3_phy_index i = PHY_INDEX_BOTH_HC; i <= PHY_INDEX_EHCI;
369 i++) {
370 if (ch->rphys[i].initialized)
371 return true;
372 }
373
374 return false;
375 }
376
rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan * ch)377 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
378 {
379 int i;
380
381 for (i = 0; i < NUM_OF_PHYS; i++) {
382 if (ch->rphys[i].powered)
383 return false;
384 }
385
386 return true;
387 }
388
role_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)389 static ssize_t role_store(struct device *dev, struct device_attribute *attr,
390 const char *buf, size_t count)
391 {
392 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
393 bool is_b_device;
394 enum phy_mode cur_mode, new_mode;
395
396 guard(spinlock_irqsave)(&ch->lock);
397
398 if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch))
399 return -EIO;
400
401 if (sysfs_streq(buf, "host"))
402 new_mode = PHY_MODE_USB_HOST;
403 else if (sysfs_streq(buf, "peripheral"))
404 new_mode = PHY_MODE_USB_DEVICE;
405 else
406 return -EINVAL;
407
408 /* is_b_device: true is B-Device. false is A-Device. */
409 is_b_device = rcar_gen3_check_id(ch);
410 cur_mode = rcar_gen3_get_phy_mode(ch);
411
412 /* If current and new mode is the same, this returns the error */
413 if (cur_mode == new_mode)
414 return -EINVAL;
415
416 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
417 if (!is_b_device) /* A-Peripheral */
418 rcar_gen3_init_from_a_peri_to_a_host(ch);
419 else /* B-Peripheral */
420 rcar_gen3_init_for_b_host(ch);
421 } else { /* And is_host must be true */
422 if (!is_b_device) /* A-Host */
423 rcar_gen3_init_for_a_peri(ch);
424 else /* B-Host */
425 rcar_gen3_init_for_peri(ch);
426 }
427
428 return count;
429 }
430
role_show(struct device * dev,struct device_attribute * attr,char * buf)431 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
432 char *buf)
433 {
434 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
435
436 if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch))
437 return -EIO;
438
439 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
440 "peripheral");
441 }
442 static DEVICE_ATTR_RW(role);
443
rcar_gen3_init_otg(struct rcar_gen3_chan * ch)444 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
445 {
446 void __iomem *usb2_base = ch->base;
447 u32 val;
448
449 if (!ch->is_otg_channel || rcar_gen3_is_any_otg_rphy_initialized(ch))
450 return;
451
452 /* Should not use functions of read-modify-write a register */
453 val = readl(usb2_base + USB2_LINECTRL1);
454 val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
455 USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
456 writel(val, usb2_base + USB2_LINECTRL1);
457
458 if (!ch->phy_data->no_adp_ctrl) {
459 if (ch->phy_data->vblvl_ctrl) {
460 val = readl(usb2_base + USB2_VBCTRL);
461 val = (val & ~USB2_VBCTRL_VBLVL_MASK) | USB2_VBCTRL_VBLVL(2);
462 writel(val, usb2_base + USB2_VBCTRL);
463 val = readl(usb2_base + USB2_ADPCTRL);
464 writel(val | USB2_ADPCTRL_IDPULLUP | USB2_ADPCTRL_DRVVBUS,
465 usb2_base + USB2_ADPCTRL);
466 } else {
467 val = readl(usb2_base + USB2_VBCTRL);
468 val &= ~USB2_VBCTRL_OCCLREN;
469 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
470 val = readl(usb2_base + USB2_ADPCTRL);
471 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
472 }
473 }
474 mdelay(20);
475
476 writel(0xffffffff, usb2_base + USB2_OBINTSTA);
477 writel(ch->phy_data->obint_enable_bits, usb2_base + USB2_OBINTEN);
478
479 rcar_gen3_device_recognition(ch);
480 }
481
rcar_gen3_configure_vblvl_ctrl(struct rcar_gen3_chan * ch)482 static void rcar_gen3_configure_vblvl_ctrl(struct rcar_gen3_chan *ch)
483 {
484 void __iomem *usb2_base = ch->base;
485 u32 val;
486
487 if (!ch->phy_data->vblvl_ctrl)
488 return;
489
490 val = readl(usb2_base + USB2_VBCTRL);
491 if ((val & USB2_VBCTRL_VBSTA_MASK) ==
492 FIELD_PREP_CONST(USB2_VBCTRL_VBSTA_MASK, USB2_VBCTRL_VBSTA_DEFAULT))
493 val &= ~USB2_VBCTRL_VBLVL_MASK;
494 else
495 val |= USB2_VBCTRL_VBLVL(USB2_VBCTRL_VBSTA_DEFAULT);
496 writel(val, usb2_base + USB2_VBCTRL);
497 }
498
rcar_gen3_phy_usb2_irq(int irq,void * _ch)499 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
500 {
501 struct rcar_gen3_chan *ch = _ch;
502 void __iomem *usb2_base = ch->base;
503 struct device *dev = ch->dev;
504 irqreturn_t ret = IRQ_NONE;
505 u32 status;
506
507 pm_runtime_get_noresume(dev);
508
509 if (pm_runtime_suspended(dev))
510 goto rpm_put;
511
512 scoped_guard(spinlock, &ch->lock) {
513 status = readl(usb2_base + USB2_OBINTSTA);
514 if (status & ch->phy_data->obint_enable_bits) {
515 dev_vdbg(dev, "%s: %08x\n", __func__, status);
516 if (ch->phy_data->vblvl_ctrl)
517 writel(USB2_OBINTSTA_CLEAR, usb2_base + USB2_OBINTSTA);
518 else
519 writel(ch->phy_data->obint_enable_bits, usb2_base + USB2_OBINTSTA);
520 rcar_gen3_device_recognition(ch);
521 rcar_gen3_configure_vblvl_ctrl(ch);
522 ret = IRQ_HANDLED;
523 }
524 }
525
526 rpm_put:
527 pm_runtime_put_noidle(dev);
528 return ret;
529 }
530
rcar_gen3_phy_usb2_init(struct phy * p)531 static int rcar_gen3_phy_usb2_init(struct phy *p)
532 {
533 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
534 struct rcar_gen3_chan *channel = rphy->ch;
535 void __iomem *usb2_base = channel->base;
536 u32 val;
537
538 guard(spinlock_irqsave)(&channel->lock);
539
540 /* Initialize USB2 part */
541 val = readl(usb2_base + USB2_INT_ENABLE);
542 val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
543 writel(val, usb2_base + USB2_INT_ENABLE);
544
545 if (!rcar_gen3_is_any_rphy_initialized(channel)) {
546 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
547 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
548 }
549
550 /* Initialize otg part (only if we initialize a PHY with IRQs). */
551 if (rphy->int_enable_bits)
552 rcar_gen3_init_otg(channel);
553
554 if (channel->phy_data->vblvl_ctrl) {
555 /* SIDDQ mode release */
556 writel(readl(usb2_base + USB2_VBCTRL) | USB2_VBCTRL_SIDDQREL,
557 usb2_base + USB2_VBCTRL);
558 udelay(250);
559 }
560
561 if (channel->phy_data->utmi_ctrl) {
562 val = readl(usb2_base + USB2_REGEN_CG_CTRL) | USB2_REGEN_CG_CTRL_UPHY_WEN;
563 writel(val, usb2_base + USB2_REGEN_CG_CTRL);
564
565 writel(USB2_UTMI_CTRL_INIT, usb2_base + USB2_UTMI_CTRL);
566 writel(val & ~USB2_REGEN_CG_CTRL_UPHY_WEN, usb2_base + USB2_REGEN_CG_CTRL);
567 }
568
569 rphy->initialized = true;
570
571 return 0;
572 }
573
rcar_gen3_phy_usb2_exit(struct phy * p)574 static int rcar_gen3_phy_usb2_exit(struct phy *p)
575 {
576 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
577 struct rcar_gen3_chan *channel = rphy->ch;
578 void __iomem *usb2_base = channel->base;
579 u32 val;
580
581 guard(spinlock_irqsave)(&channel->lock);
582
583 rphy->initialized = false;
584
585 val = readl(usb2_base + USB2_INT_ENABLE);
586 val &= ~rphy->int_enable_bits;
587 if (!rcar_gen3_is_any_rphy_initialized(channel))
588 val &= ~USB2_INT_ENABLE_UCOM_INTEN;
589 writel(val, usb2_base + USB2_INT_ENABLE);
590
591 return 0;
592 }
593
rcar_gen3_phy_usb2_power_on(struct phy * p)594 static int rcar_gen3_phy_usb2_power_on(struct phy *p)
595 {
596 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
597 struct rcar_gen3_chan *channel = rphy->ch;
598 void __iomem *usb2_base = channel->base;
599 u32 val;
600 int ret = 0;
601
602 if (channel->vbus && !channel->otg_internal_reg) {
603 ret = regulator_enable(channel->vbus);
604 if (ret)
605 return ret;
606 }
607
608 guard(spinlock_irqsave)(&channel->lock);
609
610 if (!rcar_gen3_are_all_rphys_power_off(channel))
611 goto out;
612
613 val = readl(usb2_base + USB2_USBCTR);
614 val |= USB2_USBCTR_PLL_RST;
615 writel(val, usb2_base + USB2_USBCTR);
616 val &= ~USB2_USBCTR_PLL_RST;
617 writel(val, usb2_base + USB2_USBCTR);
618
619 out:
620 /* The powered flag should be set for any other phys anyway */
621 rphy->powered = true;
622
623 return 0;
624 }
625
rcar_gen3_phy_usb2_power_off(struct phy * p)626 static int rcar_gen3_phy_usb2_power_off(struct phy *p)
627 {
628 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
629 struct rcar_gen3_chan *channel = rphy->ch;
630 int ret = 0;
631
632 scoped_guard(spinlock_irqsave, &channel->lock) {
633 rphy->powered = false;
634
635 if (rcar_gen3_are_all_rphys_power_off(channel)) {
636 u32 val = readl(channel->base + USB2_USBCTR);
637
638 val |= USB2_USBCTR_PLL_RST;
639 writel(val, channel->base + USB2_USBCTR);
640 }
641 }
642
643 if (channel->vbus && !channel->otg_internal_reg)
644 ret = regulator_disable(channel->vbus);
645
646 return ret;
647 }
648
649 static const struct phy_ops rcar_gen3_phy_usb2_ops = {
650 .init = rcar_gen3_phy_usb2_init,
651 .exit = rcar_gen3_phy_usb2_exit,
652 .power_on = rcar_gen3_phy_usb2_power_on,
653 .power_off = rcar_gen3_phy_usb2_power_off,
654 .owner = THIS_MODULE,
655 };
656
657 static const struct phy_ops rz_g1c_phy_usb2_ops = {
658 .init = rcar_gen3_phy_usb2_init,
659 .exit = rcar_gen3_phy_usb2_exit,
660 .owner = THIS_MODULE,
661 };
662
663 static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = {
664 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
665 .no_adp_ctrl = false,
666 .obint_enable_bits = USB2_OBINT_SESSVLDCHG |
667 USB2_OBINT_IDDIGCHG,
668 };
669
670 static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = {
671 .phy_usb2_ops = &rz_g1c_phy_usb2_ops,
672 .no_adp_ctrl = false,
673 .obint_enable_bits = USB2_OBINT_SESSVLDCHG |
674 USB2_OBINT_IDDIGCHG,
675 };
676
677 static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = {
678 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
679 .no_adp_ctrl = true,
680 .obint_enable_bits = USB2_OBINT_IDCHG_EN,
681 };
682
683 static const struct rcar_gen3_phy_drv_data rz_g3s_phy_usb2_data = {
684 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
685 .no_adp_ctrl = true,
686 .init_bus = true,
687 .obint_enable_bits = USB2_OBINT_IDCHG_EN,
688 };
689
690 static const struct rcar_gen3_phy_drv_data rz_t2h_phy_usb2_data = {
691 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
692 .vblvl_ctrl = true,
693 .obint_enable_bits = USB2_OBINT_IDCHG_EN | USB2_OBINT_VBSTAINT,
694 };
695
696 static const struct rcar_gen3_phy_drv_data rz_v2h_phy_usb2_data = {
697 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
698 .no_adp_ctrl = true,
699 .utmi_ctrl = true,
700 .obint_enable_bits = USB2_OBINT_IDCHG_EN,
701 };
702
703 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
704 {
705 .compatible = "renesas,usb2-phy-r8a77470",
706 .data = &rz_g1c_phy_usb2_data,
707 },
708 {
709 .compatible = "renesas,usb2-phy-r8a7795",
710 .data = &rcar_gen3_phy_usb2_data,
711 },
712 {
713 .compatible = "renesas,usb2-phy-r8a7796",
714 .data = &rcar_gen3_phy_usb2_data,
715 },
716 {
717 .compatible = "renesas,usb2-phy-r8a77965",
718 .data = &rcar_gen3_phy_usb2_data,
719 },
720 {
721 .compatible = "renesas,usb2-phy-r9a08g045",
722 .data = &rz_g3s_phy_usb2_data,
723 },
724 {
725 .compatible = "renesas,usb2-phy-r9a08g046",
726 .data = &rz_g3s_phy_usb2_data,
727 },
728 {
729 .compatible = "renesas,usb2-phy-r9a09g057",
730 .data = &rz_v2h_phy_usb2_data,
731 },
732 {
733 .compatible = "renesas,usb2-phy-r9a09g077",
734 .data = &rz_t2h_phy_usb2_data,
735 },
736 {
737 .compatible = "renesas,rzg2l-usb2-phy",
738 .data = &rz_g2l_phy_usb2_data,
739 },
740 {
741 .compatible = "renesas,rcar-gen3-usb2-phy",
742 .data = &rcar_gen3_phy_usb2_data,
743 },
744 { /* sentinel */ },
745 };
746 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
747
748 static const unsigned int rcar_gen3_phy_cable[] = {
749 EXTCON_USB,
750 EXTCON_USB_HOST,
751 EXTCON_NONE,
752 };
753
rcar_gen3_phy_usb2_xlate(struct device * dev,const struct of_phandle_args * args)754 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
755 const struct of_phandle_args *args)
756 {
757 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
758
759 if (args->args_count == 0) /* For old version dts */
760 return ch->rphys[PHY_INDEX_BOTH_HC].phy;
761 else if (args->args_count > 1) /* Prevent invalid args count */
762 return ERR_PTR(-ENODEV);
763
764 if (args->args[0] >= NUM_OF_PHYS)
765 return ERR_PTR(-ENODEV);
766
767 return ch->rphys[args->args[0]].phy;
768 }
769
rcar_gen3_get_dr_mode(struct device_node * np)770 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
771 {
772 enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
773 int i;
774
775 /*
776 * If one of device nodes has other dr_mode except UNKNOWN,
777 * this function returns UNKNOWN. To achieve backward compatibility,
778 * this loop starts the index as 0.
779 */
780 for (i = 0; i < NUM_OF_PHYS; i++) {
781 enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
782
783 if (mode != USB_DR_MODE_UNKNOWN) {
784 if (candidate == USB_DR_MODE_UNKNOWN)
785 candidate = mode;
786 else if (candidate != mode)
787 return USB_DR_MODE_UNKNOWN;
788 }
789 }
790
791 return candidate;
792 }
793
rcar_gen3_reset_assert(void * data)794 static void rcar_gen3_reset_assert(void *data)
795 {
796 reset_control_assert(data);
797 }
798
rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan * channel)799 static int rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan *channel)
800 {
801 struct device *dev = channel->dev;
802 int ret;
803 u32 val;
804
805 if (!channel->phy_data->init_bus)
806 return 0;
807
808 ret = pm_runtime_resume_and_get(dev);
809 if (ret)
810 return ret;
811
812 val = readl(channel->base + USB2_AHB_BUS_CTR);
813 val &= ~USB2_AHB_BUS_CTR_MBL_MASK;
814 val |= USB2_AHB_BUS_CTR_MBL_INCR4;
815 writel(val, channel->base + USB2_AHB_BUS_CTR);
816
817 pm_runtime_put(dev);
818
819 return 0;
820 }
821
rcar_gen3_phy_usb2_regulator_endisable(struct regulator_dev * rdev,bool enable)822 static int rcar_gen3_phy_usb2_regulator_endisable(struct regulator_dev *rdev,
823 bool enable)
824 {
825 struct rcar_gen3_chan *channel = rdev_get_drvdata(rdev);
826 struct device *dev = channel->dev;
827 int ret;
828
829 ret = pm_runtime_resume_and_get(dev);
830 if (ret < 0) {
831 dev_warn(dev, "pm_runtime_get failed: %i\n", ret);
832 return ret;
833 }
834
835 rcar_gen3_phy_usb2_set_vbus(channel, USB2_VBCTRL,
836 USB2_VBCTRL_VBOUT, enable);
837 pm_runtime_put_noidle(dev);
838
839 return ret;
840 }
841
rcar_gen3_phy_usb2_regulator_enable(struct regulator_dev * rdev)842 static int rcar_gen3_phy_usb2_regulator_enable(struct regulator_dev *rdev)
843 {
844 return rcar_gen3_phy_usb2_regulator_endisable(rdev, true);
845 }
846
rcar_gen3_phy_usb2_regulator_disable(struct regulator_dev * rdev)847 static int rcar_gen3_phy_usb2_regulator_disable(struct regulator_dev *rdev)
848 {
849 return rcar_gen3_phy_usb2_regulator_endisable(rdev, false);
850 }
851
rcar_gen3_phy_usb2_regulator_is_enabled(struct regulator_dev * rdev)852 static int rcar_gen3_phy_usb2_regulator_is_enabled(struct regulator_dev *rdev)
853 {
854 struct rcar_gen3_chan *channel = rdev_get_drvdata(rdev);
855 void __iomem *usb2_base = channel->base;
856 struct device *dev = channel->dev;
857 u32 vbus_ctrl_reg = USB2_VBCTRL;
858 u32 val;
859 int ret;
860
861 ret = pm_runtime_resume_and_get(dev);
862 if (ret < 0) {
863 dev_warn(dev, "pm_runtime_get failed: %i\n", ret);
864 return ret;
865 }
866
867 val = readl(usb2_base + vbus_ctrl_reg);
868
869 pm_runtime_put_noidle(dev);
870 dev_dbg(channel->dev, "%s: %08x\n", __func__, val);
871
872 return (val & USB2_VBCTRL_VBOUT) ? 1 : 0;
873 }
874
875 static const struct regulator_ops rcar_gen3_phy_usb2_regulator_ops = {
876 .enable = rcar_gen3_phy_usb2_regulator_enable,
877 .disable = rcar_gen3_phy_usb2_regulator_disable,
878 .is_enabled = rcar_gen3_phy_usb2_regulator_is_enabled,
879 };
880
881 static const struct regulator_desc rcar_gen3_phy_usb2_regulator = {
882 .name = "otg-vbus-regulator",
883 .of_match = of_match_ptr("vbus-regulator"),
884 .ops = &rcar_gen3_phy_usb2_regulator_ops,
885 .type = REGULATOR_VOLTAGE,
886 .owner = THIS_MODULE,
887 .fixed_uV = 5000000,
888 .n_voltages = 1,
889 };
890
rcar_gen3_phy_usb2_vbus_disable_action(void * data)891 static void rcar_gen3_phy_usb2_vbus_disable_action(void *data)
892 {
893 struct regulator *vbus = data;
894
895 regulator_disable(vbus);
896 }
897
rcar_gen3_phy_usb2_vbus_regulator_get_exclusive_enable(struct rcar_gen3_chan * channel,bool enable)898 static int rcar_gen3_phy_usb2_vbus_regulator_get_exclusive_enable(struct rcar_gen3_chan *channel,
899 bool enable)
900 {
901 struct device *dev = channel->dev;
902 int ret;
903
904 channel->vbus = devm_regulator_get_exclusive(dev, "vbus");
905 if (IS_ERR(channel->vbus)) {
906 ret = PTR_ERR(channel->vbus);
907 /* If vbus-regulator node was present vbus regulator should be available */
908 if (channel->otg_internal_reg)
909 return ret;
910
911 if (ret == -EPROBE_DEFER)
912 return ret;
913
914 return 0;
915 }
916
917 if (enable) {
918 ret = regulator_enable(channel->vbus);
919 if (ret)
920 return ret;
921 }
922
923 if (regulator_is_enabled(channel->vbus))
924 return devm_add_action_or_reset(dev, rcar_gen3_phy_usb2_vbus_disable_action,
925 channel->vbus);
926
927 return 0;
928 }
929
rcar_gen3_phy_usb2_vbus_regulator_register(struct rcar_gen3_chan * channel)930 static int rcar_gen3_phy_usb2_vbus_regulator_register(struct rcar_gen3_chan *channel)
931 {
932 struct device *dev = channel->dev;
933 struct regulator_config rcfg = { .dev = dev, };
934 struct regulator_dev *rdev;
935 bool enable = false;
936
937 rcfg.of_node = of_get_available_child_by_name(dev->of_node,
938 "vbus-regulator");
939 if (rcfg.of_node) {
940 rcfg.driver_data = channel;
941 rdev = devm_regulator_register(dev, &rcar_gen3_phy_usb2_regulator,
942 &rcfg);
943 of_node_put(rcfg.of_node);
944 if (IS_ERR(rdev))
945 return dev_err_probe(dev, PTR_ERR(rdev),
946 "Failed to create vbus-regulator\n");
947
948 channel->otg_internal_reg = true;
949 enable = true;
950 }
951
952 return rcar_gen3_phy_usb2_vbus_regulator_get_exclusive_enable(channel, enable);
953 }
954
rcar_gen3_phy_usb2_probe(struct platform_device * pdev)955 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
956 {
957 struct device *dev = &pdev->dev;
958 struct rcar_gen3_chan *channel;
959 struct phy_provider *provider;
960 struct mux_state *mux_state;
961 int ret = 0, i, irq;
962
963 if (!dev->of_node) {
964 dev_err(dev, "This driver needs device tree\n");
965 return -EINVAL;
966 }
967
968 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
969 if (!channel)
970 return -ENOMEM;
971
972 channel->base = devm_platform_ioremap_resource(pdev, 0);
973 if (IS_ERR(channel->base))
974 return PTR_ERR(channel->base);
975
976 channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
977 if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
978 channel->is_otg_channel = true;
979 channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
980 "renesas,no-otg-pins");
981 channel->extcon = devm_extcon_dev_allocate(dev,
982 rcar_gen3_phy_cable);
983 if (IS_ERR(channel->extcon))
984 return PTR_ERR(channel->extcon);
985
986 ret = devm_extcon_dev_register(dev, channel->extcon);
987 if (ret < 0) {
988 dev_err(dev, "Failed to register extcon\n");
989 return ret;
990 }
991 }
992
993 channel->rstc = devm_reset_control_array_get_optional_shared(dev);
994 if (IS_ERR(channel->rstc))
995 return PTR_ERR(channel->rstc);
996
997 ret = reset_control_deassert(channel->rstc);
998 if (ret)
999 return ret;
1000
1001 ret = devm_add_action_or_reset(dev, rcar_gen3_reset_assert, channel->rstc);
1002 if (ret)
1003 return ret;
1004
1005 /*
1006 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
1007 * And then, phy-core will manage runtime pm for this device.
1008 */
1009 ret = devm_pm_runtime_enable(dev);
1010 if (ret)
1011 return dev_err_probe(dev, ret, "Failed to enable pm_runtime\n");
1012
1013 channel->phy_data = of_device_get_match_data(dev);
1014 if (!channel->phy_data)
1015 return -EINVAL;
1016
1017 platform_set_drvdata(pdev, channel);
1018 channel->dev = dev;
1019
1020 ret = rcar_gen3_phy_usb2_init_bus(channel);
1021 if (ret)
1022 return ret;
1023
1024 spin_lock_init(&channel->lock);
1025 for (i = 0; i < NUM_OF_PHYS; i++) {
1026 channel->rphys[i].phy = devm_phy_create(dev, NULL,
1027 channel->phy_data->phy_usb2_ops);
1028 if (IS_ERR(channel->rphys[i].phy))
1029 return dev_err_probe(dev, PTR_ERR(channel->rphys[i].phy),
1030 "Failed to create USB2 PHY\n");
1031
1032 channel->rphys[i].ch = channel;
1033 channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
1034 phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
1035 }
1036
1037 mux_state = devm_mux_state_get_optional_selected(dev, NULL);
1038 if (IS_ERR(mux_state))
1039 return dev_err_probe(dev, PTR_ERR(mux_state), "Failed to get USB mux\n");
1040
1041 if (channel->phy_data->no_adp_ctrl && channel->is_otg_channel) {
1042 ret = rcar_gen3_phy_usb2_vbus_regulator_register(channel);
1043 if (ret)
1044 return ret;
1045 } else {
1046 channel->vbus = devm_regulator_get_optional(dev, "vbus");
1047 }
1048 if (IS_ERR(channel->vbus)) {
1049 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER)
1050 return PTR_ERR(channel->vbus);
1051
1052 channel->vbus = NULL;
1053 }
1054
1055 irq = platform_get_irq_optional(pdev, 0);
1056 if (irq < 0 && irq != -ENXIO) {
1057 return irq;
1058 } else if (irq > 0) {
1059 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
1060 ret = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
1061 IRQF_SHARED, dev_name(dev), channel);
1062 if (ret < 0)
1063 return dev_err_probe(dev, ret,
1064 "Failed to request irq (%d)\n",
1065 irq);
1066 }
1067
1068 provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
1069 if (IS_ERR(provider)) {
1070 return dev_err_probe(dev, PTR_ERR(provider),
1071 "Failed to register PHY provider\n");
1072 } else if (channel->is_otg_channel) {
1073 ret = device_create_file(dev, &dev_attr_role);
1074 if (ret < 0)
1075 return ret;
1076 }
1077
1078 return 0;
1079 }
1080
rcar_gen3_phy_usb2_remove(struct platform_device * pdev)1081 static void rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
1082 {
1083 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
1084
1085 if (channel->is_otg_channel)
1086 device_remove_file(&pdev->dev, &dev_attr_role);
1087 }
1088
rcar_gen3_phy_usb2_suspend(struct device * dev)1089 static int rcar_gen3_phy_usb2_suspend(struct device *dev)
1090 {
1091 struct rcar_gen3_chan *channel = dev_get_drvdata(dev);
1092
1093 return reset_control_assert(channel->rstc);
1094 }
1095
rcar_gen3_phy_usb2_resume(struct device * dev)1096 static int rcar_gen3_phy_usb2_resume(struct device *dev)
1097 {
1098 struct rcar_gen3_chan *channel = dev_get_drvdata(dev);
1099 int ret;
1100
1101 ret = reset_control_deassert(channel->rstc);
1102 if (ret)
1103 return ret;
1104
1105 ret = rcar_gen3_phy_usb2_init_bus(channel);
1106 if (ret)
1107 reset_control_assert(channel->rstc);
1108
1109 return ret;
1110 }
1111
1112 static DEFINE_SIMPLE_DEV_PM_OPS(rcar_gen3_phy_usb2_pm_ops,
1113 rcar_gen3_phy_usb2_suspend,
1114 rcar_gen3_phy_usb2_resume);
1115
1116 static struct platform_driver rcar_gen3_phy_usb2_driver = {
1117 .driver = {
1118 .name = "phy_rcar_gen3_usb2",
1119 .of_match_table = rcar_gen3_phy_usb2_match_table,
1120 .pm = pm_ptr(&rcar_gen3_phy_usb2_pm_ops),
1121 },
1122 .probe = rcar_gen3_phy_usb2_probe,
1123 .remove = rcar_gen3_phy_usb2_remove,
1124 };
1125 module_platform_driver(rcar_gen3_phy_usb2_driver);
1126
1127 MODULE_LICENSE("GPL v2");
1128 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
1129 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
1130