| /linux/arch/arm/boot/dts/samsung/ |
| H A D | s3c64xx.dtsi | 147 clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
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| /linux/include/dt-bindings/clock/ |
| H A D | samsung,s3c64xx-clock.h | 86 #define PCLK_UART2 71 macro
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| H A D | rk3036-cru.h | 71 #define PCLK_UART2 343 macro
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| H A D | exynos7-clk.h | 94 #define PCLK_UART2 2 macro
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| H A D | rk3128-cru.h | 110 #define PCLK_UART2 343 macro
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| H A D | rk3228-cru.h | 109 #define PCLK_UART2 343 macro
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| H A D | rockchip,rk3506-cru.h | 114 #define PCLK_UART2 101 macro
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| H A D | rv1108-cru.h | 118 #define PCLK_UART2 267 macro
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| H A D | rk3308-cru.h | 178 #define PCLK_UART2 199 macro
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| H A D | rk3328-cru.h | 143 #define PCLK_UART2 212 macro
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| H A D | px30-cru.h | 153 #define PCLK_UART2 330 macro
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| H A D | rk3288-cru.h | 135 #define PCLK_UART2 343 macro
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| H A D | rk3368-cru.h | 128 #define PCLK_UART2 343 macro
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| H A D | rockchip,rv1126b-cru.h | 317 #define PCLK_UART2 304 macro
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| H A D | rockchip,rk3528-cru.h | 172 #define PCLK_UART2 160 macro
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| H A D | rockchip,rv1126-cru.h | 313 #define PCLK_UART2 251 macro
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| H A D | rockchip,rk3576-cru.h | 148 #define PCLK_UART2 130 macro
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| H A D | rk3399-cru.h | 249 #define PCLK_UART2 354 macro
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| H A D | rockchip,rk3588-cru.h | 175 #define PCLK_UART2 160 macro
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| H A D | rk3568-cru.h | 352 #define PCLK_UART2 288 macro
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| /linux/drivers/clk/rockchip/ |
| H A D | clk-rk3036.c | 420 GATE(PCLK_UART2, "pclk_uart2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
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| H A D | clk-rk3128.c | 504 GATE(PCLK_UART2, "pclk_uart2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
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| H A D | clk-rk3228.c | 615 GATE(PCLK_UART2, "pclk_uart2", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 14, GFLAGS),
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| H A D | clk-rv1108.c | 609 GATE(PCLK_UART2, "pclk_uart2", "pclk_bus_pre", 0,
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| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3xxx.dtsi | 425 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
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