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Searched refs:PCLK_PWM1 (Results 1 – 19 of 19) sorted by relevance

/linux/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi320 clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
331 clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
342 clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
353 clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
/linux/include/dt-bindings/clock/
H A Drk3308-cru.h210 #define PCLK_PWM1 231 macro
H A Drk3368-cru.h135 #define PCLK_PWM1 351 macro
H A Dpx30-cru.h163 #define PCLK_PWM1 340 macro
H A Drockchip,rv1126-cru.h49 #define PCLK_PWM1 36 macro
H A Drockchip,rk3576-cru.h181 #define PCLK_PWM1 163 macro
H A Drockchip,rk3588-cru.h90 #define PCLK_PWM1 75 macro
H A Drk3568-cru.h409 #define PCLK_PWM1 345 macro
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi564 clocks = <&cru PCLK_PWM1>;
574 clocks = <&cru PCLK_PWM1>;
582 clocks = <&cru PCLK_PWM1>;
592 clocks = <&cru PCLK_PWM1>;
H A Drk3308.dtsi459 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
470 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
481 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
492 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
H A Dpx30.dtsi713 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
724 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
735 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
746 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
H A Drk3588-base.dtsi2362 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
2373 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
2384 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
2395 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
/linux/drivers/clk/rockchip/
H A Dclk-rk3368.c706 GATE(PCLK_PWM1, "pclk_pwm1", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 6, GFLAGS),
H A Dclk-rk3308.c898 GATE(PCLK_PWM1, "pclk_pwm1", "pclk_bus", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(7), 12, GFLAGS),
H A Dclk-px30.c857 GATE(PCLK_PWM1, "pclk_pwm1", "pclk_bus_pre", 0, PX30_CLKGATE_CON(15), 0, GFLAGS),
H A Dclk-rv1126.c325 GATE(PCLK_PWM1, "pclk_pwm1", "pclk_pdpmu", 0,
H A Dclk-rk3568.c1374 GATE(PCLK_PWM1, "pclk_pwm1", "pclk_bus", 0, RK3568_CLKGATE_CON(31), 10, GFLAGS),
H A Dclk-rk3576.c724 GATE(PCLK_PWM1, "pclk_pwm1", "pclk_bus_root", 0,
H A Dclk-rk3588.c1015 GATE(PCLK_PWM1, "pclk_pwm1", "pclk_top_root", 0,