xref: /linux/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * processor_thermal_device.h
4  * Copyright (c) 2020, Intel Corporation.
5  */
6 
7 #ifndef __PROCESSOR_THERMAL_DEVICE_H__
8 #define __PROCESSOR_THERMAL_DEVICE_H__
9 
10 #include <linux/intel_rapl.h>
11 
12 #define PCI_DEVICE_ID_INTEL_ADL_THERMAL	0x461d
13 #define PCI_DEVICE_ID_INTEL_ARL_S_THERMAL 0xAD03
14 #define PCI_DEVICE_ID_INTEL_BDW_THERMAL	0x1603
15 #define PCI_DEVICE_ID_INTEL_BSW_THERMAL	0x22DC
16 
17 #define PCI_DEVICE_ID_INTEL_BXT0_THERMAL	0x0A8C
18 #define PCI_DEVICE_ID_INTEL_BXT1_THERMAL	0x1A8C
19 #define PCI_DEVICE_ID_INTEL_BXTX_THERMAL	0x4A8C
20 #define PCI_DEVICE_ID_INTEL_BXTP_THERMAL	0x5A8C
21 
22 #define PCI_DEVICE_ID_INTEL_CNL_THERMAL	0x5a03
23 #define PCI_DEVICE_ID_INTEL_CFL_THERMAL	0x3E83
24 #define PCI_DEVICE_ID_INTEL_GLK_THERMAL	0x318C
25 #define PCI_DEVICE_ID_INTEL_HSB_THERMAL	0x0A03
26 #define PCI_DEVICE_ID_INTEL_ICL_THERMAL	0x8a03
27 #define PCI_DEVICE_ID_INTEL_JSL_THERMAL	0x4E03
28 #define PCI_DEVICE_ID_INTEL_LNLM_THERMAL	0x641D
29 #define PCI_DEVICE_ID_INTEL_MTLP_THERMAL	0x7D03
30 #define PCI_DEVICE_ID_INTEL_RPL_THERMAL	0xA71D
31 #define PCI_DEVICE_ID_INTEL_SKL_THERMAL	0x1903
32 #define PCI_DEVICE_ID_INTEL_TGL_THERMAL	0x9A03
33 
34 struct power_config {
35 	u32	index;
36 	u32	min_uw;
37 	u32	max_uw;
38 	u32	tmin_us;
39 	u32	tmax_us;
40 	u32	step_uw;
41 };
42 
43 struct proc_thermal_device {
44 	struct device *dev;
45 	struct acpi_device *adev;
46 	struct power_config power_limits[2];
47 	struct int34x_thermal_zone *int340x_zone;
48 	struct intel_soc_dts_sensors *soc_dts;
49 	u32 mmio_feature_mask;
50 	void __iomem *mmio_base;
51 	void *priv_data;
52 };
53 
54 struct rapl_mmio_regs {
55 	u64 reg_unit;
56 	u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
57 	int limits[RAPL_DOMAIN_MAX];
58 };
59 
60 #define PROC_THERMAL_FEATURE_NONE	0x00
61 #define PROC_THERMAL_FEATURE_RAPL	0x01
62 #define PROC_THERMAL_FEATURE_FIVR	0x02
63 #define PROC_THERMAL_FEATURE_DVFS	0x04
64 #define PROC_THERMAL_FEATURE_WT_REQ	0x08
65 #define PROC_THERMAL_FEATURE_DLVR	0x10
66 #define PROC_THERMAL_FEATURE_WT_HINT	0x20
67 #define PROC_THERMAL_FEATURE_POWER_FLOOR	0x40
68 #define PROC_THERMAL_FEATURE_MSI_SUPPORT	0x80
69 
70 #if IS_ENABLED(CONFIG_PROC_THERMAL_MMIO_RAPL)
71 int proc_thermal_rapl_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
72 void proc_thermal_rapl_remove(void);
73 #else
proc_thermal_rapl_add(struct pci_dev * pdev,struct proc_thermal_device * proc_priv)74 static int __maybe_unused proc_thermal_rapl_add(struct pci_dev *pdev,
75 						struct proc_thermal_device *proc_priv)
76 {
77 	return 0;
78 }
79 
proc_thermal_rapl_remove(void)80 static void __maybe_unused proc_thermal_rapl_remove(void)
81 {
82 }
83 #endif
84 
85 int proc_thermal_rfim_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
86 void proc_thermal_rfim_remove(struct pci_dev *pdev);
87 
88 int proc_thermal_wt_req_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
89 void proc_thermal_wt_req_remove(struct pci_dev *pdev);
90 
91 #define MBOX_CMD_WORKLOAD_TYPE_READ	0x0E
92 #define MBOX_CMD_WORKLOAD_TYPE_WRITE	0x0F
93 
94 #define MBOX_DATA_BIT_AC_DC		30
95 #define MBOX_DATA_BIT_VALID		31
96 
97 #define SOC_WT_RES_INT_STATUS_OFFSET	0x5B18
98 #define SOC_WT_RES_INT_STATUS_MASK	GENMASK_ULL(3, 2)
99 
100 int proc_thermal_read_power_floor_status(struct proc_thermal_device *proc_priv);
101 int proc_thermal_power_floor_set_state(struct proc_thermal_device *proc_priv, bool enable);
102 bool proc_thermal_power_floor_get_state(struct proc_thermal_device *proc_priv);
103 void proc_thermal_power_floor_intr_callback(struct pci_dev *pdev,
104 					    struct proc_thermal_device *proc_priv);
105 bool proc_thermal_check_power_floor_intr(struct proc_thermal_device *proc_priv);
106 
107 int processor_thermal_send_mbox_read_cmd(struct pci_dev *pdev, u16 id, u64 *resp);
108 int processor_thermal_send_mbox_write_cmd(struct pci_dev *pdev, u16 id, u32 data);
109 int processor_thermal_mbox_interrupt_config(struct pci_dev *pdev, bool enable, int enable_bit,
110 					    int time_window);
111 int proc_thermal_add(struct device *dev, struct proc_thermal_device *priv);
112 void proc_thermal_remove(struct proc_thermal_device *proc_priv);
113 
114 int proc_thermal_wt_hint_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
115 void proc_thermal_wt_hint_remove(struct pci_dev *pdev);
116 void proc_thermal_wt_intr_callback(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
117 bool proc_thermal_check_wt_intr(struct proc_thermal_device *proc_priv);
118 
119 int proc_thermal_suspend(struct device *dev);
120 int proc_thermal_resume(struct device *dev);
121 int proc_thermal_mmio_add(struct pci_dev *pdev,
122 			  struct proc_thermal_device *proc_priv,
123 			  kernel_ulong_t feature_mask);
124 void proc_thermal_mmio_remove(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
125 #endif
126