1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Host communication command constants for ChromeOS EC 4 * 5 * Copyright (C) 2012 Google, Inc 6 * 7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 9 */ 10 11 /* Host communication command constants for Chrome EC */ 12 13 #ifndef __CROS_EC_COMMANDS_H 14 #define __CROS_EC_COMMANDS_H 15 16 #include <linux/bits.h> 17 #include <linux/types.h> 18 19 #define BUILD_ASSERT(_cond) 20 21 /* 22 * Current version of this protocol 23 * 24 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is 25 * determined in other ways. Remove this once the kernel code no longer 26 * depends on it. 27 */ 28 #define EC_PROTO_VERSION 0x00000002 29 30 /* Command version mask */ 31 #define EC_VER_MASK(version) BIT(version) 32 33 /* I/O addresses for ACPI commands */ 34 #define EC_LPC_ADDR_ACPI_DATA 0x62 35 #define EC_LPC_ADDR_ACPI_CMD 0x66 36 37 /* I/O addresses for host command */ 38 #define EC_LPC_ADDR_HOST_DATA 0x200 39 #define EC_LPC_ADDR_HOST_CMD 0x204 40 41 /* I/O addresses for host command args and params */ 42 /* Protocol version 2 */ 43 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 44 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 45 * EC_PROTO2_MAX_PARAM_SIZE 46 */ 47 /* Protocol version 3 */ 48 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 49 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 50 51 /* 52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 53 * and they tell the kernel that so we have to think of it as two parts. 54 * 55 * Other BIOSes report only the I/O port region spanned by the Microchip 56 * MEC series EC; an attempt to address a larger region may fail. 57 */ 58 #define EC_HOST_CMD_REGION0 0x800 59 #define EC_HOST_CMD_REGION1 0x880 60 #define EC_HOST_CMD_REGION_SIZE 0x80 61 #define EC_HOST_CMD_MEC_REGION_SIZE 0x8 62 63 /* EC command register bit functions */ 64 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ 65 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 66 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ 67 #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ 68 #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ 69 #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ 70 #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ 71 72 #define EC_LPC_ADDR_MEMMAP 0x900 73 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 74 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 75 76 /* The offset address of each type of data in mapped memory. */ 77 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ 78 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ 79 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ 80 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ 81 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 82 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 83 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 84 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 85 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 86 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ 87 /* Unused 0x28 - 0x2f */ 88 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 89 /* Unused 0x31 - 0x33 */ 90 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ 91 /* Battery values are all 32 bits, unless otherwise noted. */ 92 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 93 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 94 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 95 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ 96 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ 97 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ 98 /* Unused 0x4f */ 99 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 100 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 101 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 102 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 103 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ 104 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 105 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 106 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 107 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 108 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ 109 /* Unused 0x84 - 0x8f */ 110 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 111 /* Unused 0x91 */ 112 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 113 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 114 /* 0x94 - 0x99: 1st Accelerometer */ 115 /* 0x9a - 0x9f: 2nd Accelerometer */ 116 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 117 /* Unused 0xa6 - 0xdf */ 118 119 /* 120 * ACPI is unable to access memory mapped data at or above this offset due to 121 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 122 * which might be needed by ACPI. 123 */ 124 #define EC_MEMMAP_NO_ACPI 0xe0 125 126 /* Define the format of the accelerometer mapped memory status byte. */ 127 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 128 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) 129 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) 130 131 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 132 #define EC_TEMP_SENSOR_ENTRIES 16 133 /* 134 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 135 * 136 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 137 */ 138 #define EC_TEMP_SENSOR_B_ENTRIES 8 139 140 /* Special values for mapped temperature sensors */ 141 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff 142 #define EC_TEMP_SENSOR_ERROR 0xfe 143 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd 144 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 145 /* 146 * The offset of temperature value stored in mapped memory. This allows 147 * reporting a temperature range of 200K to 454K = -73C to 181C. 148 */ 149 #define EC_TEMP_SENSOR_OFFSET 200 150 151 /* 152 * Number of ALS readings at EC_MEMMAP_ALS 153 */ 154 #define EC_ALS_ENTRIES 2 155 156 /* 157 * The default value a temperature sensor will return when it is present but 158 * has not been read this boot. This is a reasonable number to avoid 159 * triggering alarms on the host. 160 */ 161 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) 162 163 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 164 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 165 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 166 167 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 168 #define EC_BATT_FLAG_AC_PRESENT 0x01 169 #define EC_BATT_FLAG_BATT_PRESENT 0x02 170 #define EC_BATT_FLAG_DISCHARGING 0x04 171 #define EC_BATT_FLAG_CHARGING 0x08 172 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 173 /* Set if some of the static/dynamic data is invalid (or outdated). */ 174 #define EC_BATT_FLAG_INVALID_DATA 0x20 175 176 /* Switch flags at EC_MEMMAP_SWITCHES */ 177 #define EC_SWITCH_LID_OPEN 0x01 178 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 179 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 180 /* Was recovery requested via keyboard; now unused. */ 181 #define EC_SWITCH_IGNORE1 0x08 182 /* Recovery requested via dedicated signal (from servo board) */ 183 #define EC_SWITCH_DEDICATED_RECOVERY 0x10 184 /* Was fake developer mode switch; now unused. Remove in next refactor. */ 185 #define EC_SWITCH_IGNORE0 0x20 186 187 /* Host command interface flags */ 188 /* Host command interface supports LPC args (LPC interface only) */ 189 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 190 /* Host command interface supports version 3 protocol */ 191 #define EC_HOST_CMD_FLAG_VERSION_3 0x02 192 193 /* Wireless switch flags */ 194 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ 195 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ 196 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ 197 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 198 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 199 200 /*****************************************************************************/ 201 /* 202 * ACPI commands 203 * 204 * These are valid ONLY on the ACPI command/data port. 205 */ 206 207 /* 208 * ACPI Read Embedded Controller 209 * 210 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 211 * 212 * Use the following sequence: 213 * 214 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 215 * - Wait for EC_LPC_CMDR_PENDING bit to clear 216 * - Write address to EC_LPC_ADDR_ACPI_DATA 217 * - Wait for EC_LPC_CMDR_DATA bit to set 218 * - Read value from EC_LPC_ADDR_ACPI_DATA 219 */ 220 #define EC_CMD_ACPI_READ 0x0080 221 222 /* 223 * ACPI Write Embedded Controller 224 * 225 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 226 * 227 * Use the following sequence: 228 * 229 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 230 * - Wait for EC_LPC_CMDR_PENDING bit to clear 231 * - Write address to EC_LPC_ADDR_ACPI_DATA 232 * - Wait for EC_LPC_CMDR_PENDING bit to clear 233 * - Write value to EC_LPC_ADDR_ACPI_DATA 234 */ 235 #define EC_CMD_ACPI_WRITE 0x0081 236 237 /* 238 * ACPI Burst Enable Embedded Controller 239 * 240 * This enables burst mode on the EC to allow the host to issue several 241 * commands back-to-back. While in this mode, writes to mapped multi-byte 242 * data are locked out to ensure data consistency. 243 */ 244 #define EC_CMD_ACPI_BURST_ENABLE 0x0082 245 246 /* 247 * ACPI Burst Disable Embedded Controller 248 * 249 * This disables burst mode on the EC and stops preventing EC writes to mapped 250 * multi-byte data. 251 */ 252 #define EC_CMD_ACPI_BURST_DISABLE 0x0083 253 254 /* 255 * ACPI Query Embedded Controller 256 * 257 * This clears the lowest-order bit in the currently pending host events, and 258 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 259 * event 0x80000000 = 32), or 0 if no event was pending. 260 */ 261 #define EC_CMD_ACPI_QUERY_EVENT 0x0084 262 263 /* Valid addresses in ACPI memory space, for read/write commands */ 264 265 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 266 #define EC_ACPI_MEM_VERSION 0x00 267 /* 268 * Test location; writing value here updates test compliment byte to (0xff - 269 * value). 270 */ 271 #define EC_ACPI_MEM_TEST 0x01 272 /* Test compliment; writes here are ignored. */ 273 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 274 275 /* Keyboard backlight brightness percent (0 - 100) */ 276 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 277 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 278 #define EC_ACPI_MEM_FAN_DUTY 0x04 279 280 /* 281 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 282 * independent thresholds attached to them. The current value of the ID 283 * register determines which sensor is affected by the THRESHOLD and COMMIT 284 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 285 * as the memory-mapped sensors. The COMMIT register applies those settings. 286 * 287 * The spec does not mandate any way to read back the threshold settings 288 * themselves, but when a threshold is crossed the AP needs a way to determine 289 * which sensor(s) are responsible. Each reading of the ID register clears and 290 * returns one sensor ID that has crossed one of its threshold (in either 291 * direction) since the last read. A value of 0xFF means "no new thresholds 292 * have tripped". Setting or enabling the thresholds for a sensor will clear 293 * the unread event count for that sensor. 294 */ 295 #define EC_ACPI_MEM_TEMP_ID 0x05 296 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 297 #define EC_ACPI_MEM_TEMP_COMMIT 0x07 298 /* 299 * Here are the bits for the COMMIT register: 300 * bit 0 selects the threshold index for the chosen sensor (0/1) 301 * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 302 * Each write to the commit register affects one threshold. 303 */ 304 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) 305 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) 306 /* 307 * Example: 308 * 309 * Set the thresholds for sensor 2 to 50 C and 60 C: 310 * write 2 to [0x05] -- select temp sensor 2 311 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 312 * write 0x2 to [0x07] -- enable threshold 0 with this value 313 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 314 * write 0x3 to [0x07] -- enable threshold 1 with this value 315 * 316 * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 317 * write 2 to [0x05] -- select temp sensor 2 318 * write 0x1 to [0x07] -- disable threshold 1 319 */ 320 321 /* DPTF battery charging current limit */ 322 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 323 324 /* Charging limit is specified in 64 mA steps */ 325 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 326 /* Value to disable DPTF battery charging limit */ 327 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 328 329 /* 330 * Report device orientation 331 * Bits Definition 332 * 3:1 Device DPTF Profile Number (DDPN) 333 * 0 = Reserved for backward compatibility (indicates no valid 334 * profile number. Host should fall back to using TBMD). 335 * 1..7 = DPTF Profile number to indicate to host which table needs 336 * to be loaded. 337 * 0 Tablet Mode Device Indicator (TBMD) 338 */ 339 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 340 #define EC_ACPI_MEM_TBMD_SHIFT 0 341 #define EC_ACPI_MEM_TBMD_MASK 0x1 342 #define EC_ACPI_MEM_DDPN_SHIFT 1 343 #define EC_ACPI_MEM_DDPN_MASK 0x7 344 345 /* 346 * Report device features. Uses the same format as the host command, except: 347 * 348 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set 349 * of features", which is of limited interest when the system is already 350 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since 351 * these are supported, it defaults to 0. 352 * This allows detecting the presence of this field since older versions of 353 * the EC codebase would simply return 0xff to that unknown address. Check 354 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits 355 * are valid. 356 */ 357 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a 358 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b 359 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c 360 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d 361 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e 362 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f 363 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 364 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 365 366 #define EC_ACPI_MEM_BATTERY_INDEX 0x12 367 368 /* 369 * USB Port Power. Each bit indicates whether the corresponding USB ports' power 370 * is enabled (1) or disabled (0). 371 * bit 0 USB port ID 0 372 * ... 373 * bit 7 USB port ID 7 374 */ 375 #define EC_ACPI_MEM_USB_PORT_POWER 0x13 376 377 /* 378 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 379 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 380 */ 381 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 382 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 383 384 /* Current version of ACPI memory address space */ 385 #define EC_ACPI_MEM_VERSION_CURRENT 2 386 387 388 /* 389 * This header file is used in coreboot both in C and ACPI code. The ACPI code 390 * is pre-processed to handle constants but the ASL compiler is unable to 391 * handle actual C code so keep it separate. 392 */ 393 394 395 /* 396 * Attributes for EC request and response packets. Just defining __packed 397 * results in inefficient assembly code on ARM, if the structure is actually 398 * 32-bit aligned, as it should be for all buffers. 399 * 400 * Be very careful when adding these to existing structures. They will round 401 * up the structure size to the specified boundary. 402 * 403 * Also be very careful to make that if a structure is included in some other 404 * parent structure that the alignment will still be true given the packing of 405 * the parent structure. This is particularly important if the sub-structure 406 * will be passed as a pointer to another function, since that function will 407 * not know about the misaligment caused by the parent structure's packing. 408 * 409 * Also be very careful using __packed - particularly when nesting non-packed 410 * structures inside packed ones. In fact, DO NOT use __packed directly; 411 * always use one of these attributes. 412 * 413 * Once everything is annotated properly, the following search strings should 414 * not return ANY matches in this file other than right here: 415 * 416 * "__packed" - generates inefficient code; all sub-structs must also be packed 417 * 418 * "struct [^_]" - all structs should be annotated, except for structs that are 419 * members of other structs/unions (and their original declarations should be 420 * annotated). 421 */ 422 423 /* 424 * Packed structures make no assumption about alignment, so they do inefficient 425 * byte-wise reads. 426 */ 427 #define __ec_align1 __packed 428 #define __ec_align2 __packed 429 #define __ec_align4 __packed 430 #define __ec_align_size1 __packed 431 #define __ec_align_offset1 __packed 432 #define __ec_align_offset2 __packed 433 #define __ec_todo_packed __packed 434 #define __ec_todo_unpacked 435 436 437 /* LPC command status byte masks */ 438 /* EC has written a byte in the data register and host hasn't read it yet */ 439 #define EC_LPC_STATUS_TO_HOST 0x01 440 /* Host has written a command/data byte and the EC hasn't read it yet */ 441 #define EC_LPC_STATUS_FROM_HOST 0x02 442 /* EC is processing a command */ 443 #define EC_LPC_STATUS_PROCESSING 0x04 444 /* Last write to EC was a command, not data */ 445 #define EC_LPC_STATUS_LAST_CMD 0x08 446 /* EC is in burst mode */ 447 #define EC_LPC_STATUS_BURST_MODE 0x10 448 /* SCI event is pending (requesting SCI query) */ 449 #define EC_LPC_STATUS_SCI_PENDING 0x20 450 /* SMI event is pending (requesting SMI query) */ 451 #define EC_LPC_STATUS_SMI_PENDING 0x40 452 /* (reserved) */ 453 #define EC_LPC_STATUS_RESERVED 0x80 454 455 /* 456 * EC is busy. This covers both the EC processing a command, and the host has 457 * written a new command but the EC hasn't picked it up yet. 458 */ 459 #define EC_LPC_STATUS_BUSY_MASK \ 460 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 461 462 /* 463 * Host command response codes (16-bit). Note that response codes should be 464 * stored in a uint16_t rather than directly in a value of this type. 465 */ 466 enum ec_status { 467 EC_RES_SUCCESS = 0, 468 EC_RES_INVALID_COMMAND = 1, 469 EC_RES_ERROR = 2, 470 EC_RES_INVALID_PARAM = 3, 471 EC_RES_ACCESS_DENIED = 4, 472 EC_RES_INVALID_RESPONSE = 5, 473 EC_RES_INVALID_VERSION = 6, 474 EC_RES_INVALID_CHECKSUM = 7, 475 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 476 EC_RES_UNAVAILABLE = 9, /* No response available */ 477 EC_RES_TIMEOUT = 10, /* We got a timeout */ 478 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 479 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 480 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 481 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 482 EC_RES_BUS_ERROR = 15, /* Communications bus error */ 483 EC_RES_BUSY = 16, /* Up but too busy. Should retry */ 484 EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ 485 EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ 486 EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ 487 EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ 488 }; 489 490 /* 491 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 492 * EC command uses code 0 to mean "no event pending". We explicitly specify 493 * each value in the enum listing so they won't change if we delete/insert an 494 * item or rearrange the list (it needs to be stable across platforms, not 495 * just within a single compiled instance). 496 */ 497 enum host_event_code { 498 EC_HOST_EVENT_LID_CLOSED = 1, 499 EC_HOST_EVENT_LID_OPEN = 2, 500 EC_HOST_EVENT_POWER_BUTTON = 3, 501 EC_HOST_EVENT_AC_CONNECTED = 4, 502 EC_HOST_EVENT_AC_DISCONNECTED = 5, 503 EC_HOST_EVENT_BATTERY_LOW = 6, 504 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 505 EC_HOST_EVENT_BATTERY = 8, 506 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 507 /* Event generated by a device attached to the EC */ 508 EC_HOST_EVENT_DEVICE = 10, 509 EC_HOST_EVENT_THERMAL = 11, 510 EC_HOST_EVENT_USB_CHARGER = 12, 511 EC_HOST_EVENT_KEY_PRESSED = 13, 512 /* 513 * EC has finished initializing the host interface. The host can check 514 * for this event following sending a EC_CMD_REBOOT_EC command to 515 * determine when the EC is ready to accept subsequent commands. 516 */ 517 EC_HOST_EVENT_INTERFACE_READY = 14, 518 /* Keyboard recovery combo has been pressed */ 519 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 520 521 /* Shutdown due to thermal overload */ 522 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 523 /* Shutdown due to battery level too low */ 524 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 525 526 /* Suggest that the AP throttle itself */ 527 EC_HOST_EVENT_THROTTLE_START = 18, 528 /* Suggest that the AP resume normal speed */ 529 EC_HOST_EVENT_THROTTLE_STOP = 19, 530 531 /* Hang detect logic detected a hang and host event timeout expired */ 532 EC_HOST_EVENT_HANG_DETECT = 20, 533 /* Hang detect logic detected a hang and warm rebooted the AP */ 534 EC_HOST_EVENT_HANG_REBOOT = 21, 535 536 /* PD MCU triggering host event */ 537 EC_HOST_EVENT_PD_MCU = 22, 538 539 /* Battery Status flags have changed */ 540 EC_HOST_EVENT_BATTERY_STATUS = 23, 541 542 /* EC encountered a panic, triggering a reset */ 543 EC_HOST_EVENT_PANIC = 24, 544 545 /* Keyboard fastboot combo has been pressed */ 546 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 547 548 /* EC RTC event occurred */ 549 EC_HOST_EVENT_RTC = 26, 550 551 /* Emulate MKBP event */ 552 EC_HOST_EVENT_MKBP = 27, 553 554 /* EC desires to change state of host-controlled USB mux */ 555 EC_HOST_EVENT_USB_MUX = 28, 556 557 /* TABLET/LAPTOP mode or detachable base attach/detach event */ 558 EC_HOST_EVENT_MODE_CHANGE = 29, 559 560 /* Keyboard recovery combo with hardware reinitialization */ 561 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 562 563 /* WoV */ 564 EC_HOST_EVENT_WOV = 31, 565 566 /* 567 * The high bit of the event mask is not used as a host event code. If 568 * it reads back as set, then the entire event mask should be 569 * considered invalid by the host. This can happen when reading the 570 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 571 * not initialized on the EC, or improperly configured on the host. 572 */ 573 EC_HOST_EVENT_INVALID = 32 574 }; 575 /* Host event mask */ 576 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) 577 578 /** 579 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS 580 * @flags: The host argument flags. 581 * @command_version: Command version. 582 * @data_size: The length of data. 583 * @checksum: Checksum; sum of command + flags + command_version + data_size + 584 * all params/response data bytes. 585 */ 586 struct ec_lpc_host_args { 587 uint8_t flags; 588 uint8_t command_version; 589 uint8_t data_size; 590 uint8_t checksum; 591 } __ec_align4; 592 593 /* Flags for ec_lpc_host_args.flags */ 594 /* 595 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 596 * params. 597 * 598 * If EC gets a command and this flag is not set, this is an old-style command. 599 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 600 * unknown length. EC must respond with an old-style response (that is, 601 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 602 */ 603 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 604 /* 605 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 606 * 607 * If EC responds to a command and this flag is not set, this is an old-style 608 * response. Command version is 0 and response data from EC is at 609 * EC_LPC_ADDR_OLD_PARAM with unknown length. 610 */ 611 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 612 613 /*****************************************************************************/ 614 /* 615 * Byte codes returned by EC over SPI interface. 616 * 617 * These can be used by the AP to debug the EC interface, and to determine 618 * when the EC is not in a state where it will ever get around to responding 619 * to the AP. 620 * 621 * Example of sequence of bytes read from EC for a current good transfer: 622 * 1. - - AP asserts chip select (CS#) 623 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request 624 * 3. - - EC starts handling CS# interrupt 625 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request 626 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in 627 * bytes looking for EC_SPI_FRAME_START 628 * 6. - - EC finishes processing and sets up response 629 * 7. EC_SPI_FRAME_START - AP reads frame byte 630 * 8. (response packet) - AP reads response packet 631 * 9. EC_SPI_PAST_END - Any additional bytes read by AP 632 * 10 - - AP deasserts chip select 633 * 11 - - EC processes CS# interrupt and sets up DMA for 634 * next request 635 * 636 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than 637 * the following byte values: 638 * EC_SPI_OLD_READY 639 * EC_SPI_RX_READY 640 * EC_SPI_RECEIVING 641 * EC_SPI_PROCESSING 642 * 643 * Then the EC found an error in the request, or was not ready for the request 644 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, 645 * because the EC is unable to tell when the AP is done sending its request. 646 */ 647 648 /* 649 * Framing byte which precedes a response packet from the EC. After sending a 650 * request, the AP will clock in bytes until it sees the framing byte, then 651 * clock in the response packet. 652 */ 653 #define EC_SPI_FRAME_START 0xec 654 655 /* 656 * Padding bytes which are clocked out after the end of a response packet. 657 */ 658 #define EC_SPI_PAST_END 0xed 659 660 /* 661 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects 662 * that the AP will send a valid packet header (starting with 663 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. 664 */ 665 #define EC_SPI_RX_READY 0xf8 666 667 /* 668 * EC has started receiving the request from the AP, but hasn't started 669 * processing it yet. 670 */ 671 #define EC_SPI_RECEIVING 0xf9 672 673 /* EC has received the entire request from the AP and is processing it. */ 674 #define EC_SPI_PROCESSING 0xfa 675 676 /* 677 * EC received bad data from the AP, such as a packet header with an invalid 678 * length. EC will ignore all data until chip select deasserts. 679 */ 680 #define EC_SPI_RX_BAD_DATA 0xfb 681 682 /* 683 * EC received data from the AP before it was ready. That is, the AP asserted 684 * chip select and started clocking data before the EC was ready to receive it. 685 * EC will ignore all data until chip select deasserts. 686 */ 687 #define EC_SPI_NOT_READY 0xfc 688 689 /* 690 * EC was ready to receive a request from the AP. EC has treated the byte sent 691 * by the AP as part of a request packet, or (for old-style ECs) is processing 692 * a fully received packet but is not ready to respond yet. 693 */ 694 #define EC_SPI_OLD_READY 0xfd 695 696 /*****************************************************************************/ 697 698 /* 699 * Protocol version 2 for I2C and SPI send a request this way: 700 * 701 * 0 EC_CMD_VERSION0 + (command version) 702 * 1 Command number 703 * 2 Length of params = N 704 * 3..N+2 Params, if any 705 * N+3 8-bit checksum of bytes 0..N+2 706 * 707 * The corresponding response is: 708 * 709 * 0 Result code (EC_RES_*) 710 * 1 Length of params = M 711 * 2..M+1 Params, if any 712 * M+2 8-bit checksum of bytes 0..M+1 713 */ 714 #define EC_PROTO2_REQUEST_HEADER_BYTES 3 715 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 716 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ 717 EC_PROTO2_REQUEST_TRAILER_BYTES) 718 719 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2 720 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 721 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ 722 EC_PROTO2_RESPONSE_TRAILER_BYTES) 723 724 /* Parameter length was limited by the LPC interface */ 725 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc 726 727 /* Maximum request and response packet sizes for protocol version 2 */ 728 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ 729 EC_PROTO2_MAX_PARAM_SIZE) 730 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ 731 EC_PROTO2_MAX_PARAM_SIZE) 732 733 /*****************************************************************************/ 734 735 /* 736 * Value written to legacy command port / prefix byte to indicate protocol 737 * 3+ structs are being used. Usage is bus-dependent. 738 */ 739 #define EC_COMMAND_PROTOCOL_3 0xda 740 741 #define EC_HOST_REQUEST_VERSION 3 742 743 /** 744 * struct ec_host_request - Version 3 request from host. 745 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it 746 * receives a header with a version it doesn't know how to 747 * parse. 748 * @checksum: Checksum of request and data; sum of all bytes including checksum 749 * should total to 0. 750 * @command: Command to send (EC_CMD_...) 751 * @command_version: Command version. 752 * @reserved: Unused byte in current protocol version; set to 0. 753 * @data_len: Length of data which follows this header. 754 */ 755 struct ec_host_request { 756 uint8_t struct_version; 757 uint8_t checksum; 758 uint16_t command; 759 uint8_t command_version; 760 uint8_t reserved; 761 uint16_t data_len; 762 } __ec_align4; 763 764 #define EC_HOST_RESPONSE_VERSION 3 765 766 /** 767 * struct ec_host_response - Version 3 response from EC. 768 * @struct_version: Struct version (=3). 769 * @checksum: Checksum of response and data; sum of all bytes including 770 * checksum should total to 0. 771 * @result: EC's response to the command (separate from communication failure) 772 * @data_len: Length of data which follows this header. 773 * @reserved: Unused bytes in current protocol version; set to 0. 774 */ 775 struct ec_host_response { 776 uint8_t struct_version; 777 uint8_t checksum; 778 uint16_t result; 779 uint16_t data_len; 780 uint16_t reserved; 781 } __ec_align4; 782 783 /*****************************************************************************/ 784 785 /* 786 * Host command protocol V4. 787 * 788 * Packets always start with a request or response header. They are followed 789 * by data_len bytes of data. If the data_crc_present flag is set, the data 790 * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1 791 * polynomial. 792 * 793 * Host algorithm when sending a request q: 794 * 795 * 101) tries_left=(some value, e.g. 3); 796 * 102) q.seq_num++ 797 * 103) q.seq_dup=0 798 * 104) Calculate q.header_crc. 799 * 105) Send request q to EC. 800 * 106) Wait for response r. Go to 201 if received or 301 if timeout. 801 * 802 * 201) If r.struct_version != 4, go to 301. 803 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. 804 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. 805 * 204) If r.seq_num != q.seq_num, go to 301. 806 * 205) If r.seq_dup == q.seq_dup, return success. 807 * 207) If r.seq_dup == 1, go to 301. 808 * 208) Return error. 809 * 810 * 301) If --tries_left <= 0, return error. 811 * 302) If q.seq_dup == 1, go to 105. 812 * 303) q.seq_dup = 1 813 * 304) Go to 104. 814 * 815 * EC algorithm when receiving a request q. 816 * EC has response buffer r, error buffer e. 817 * 818 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION 819 * and go to 301 820 * 102) If q.header_crc mismatches calculated CRC, set e.result = 821 * EC_RES_INVALID_HEADER_CRC and go to 301 822 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC 823 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC 824 * and go to 301. 825 * 104) If q.seq_dup == 0, go to 201. 826 * 105) If q.seq_num != r.seq_num, go to 201. 827 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. 828 * 829 * 201) Process request q into response r. 830 * 202) r.seq_num = q.seq_num 831 * 203) r.seq_dup = q.seq_dup 832 * 204) Calculate r.header_crc 833 * 205) If r.data_len > 0 and data is no longer available, set e.result = 834 * EC_RES_DUP_UNAVAILABLE and go to 301. 835 * 206) Send response r. 836 * 837 * 301) e.seq_num = q.seq_num 838 * 302) e.seq_dup = q.seq_dup 839 * 303) Calculate e.header_crc. 840 * 304) Send error response e. 841 */ 842 843 /* Version 4 request from host */ 844 struct ec_host_request4 { 845 /* 846 * bits 0-3: struct_version: Structure version (=4) 847 * bit 4: is_response: Is response (=0) 848 * bits 5-6: seq_num: Sequence number 849 * bit 7: seq_dup: Sequence duplicate flag 850 */ 851 uint8_t fields0; 852 853 /* 854 * bits 0-4: command_version: Command version 855 * bits 5-6: Reserved (set 0, ignore on read) 856 * bit 7: data_crc_present: Is data CRC present after data 857 */ 858 uint8_t fields1; 859 860 /* Command code (EC_CMD_*) */ 861 uint16_t command; 862 863 /* Length of data which follows this header (not including data CRC) */ 864 uint16_t data_len; 865 866 /* Reserved (set 0, ignore on read) */ 867 uint8_t reserved; 868 869 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 870 uint8_t header_crc; 871 } __ec_align4; 872 873 /* Version 4 response from EC */ 874 struct ec_host_response4 { 875 /* 876 * bits 0-3: struct_version: Structure version (=4) 877 * bit 4: is_response: Is response (=1) 878 * bits 5-6: seq_num: Sequence number 879 * bit 7: seq_dup: Sequence duplicate flag 880 */ 881 uint8_t fields0; 882 883 /* 884 * bits 0-6: Reserved (set 0, ignore on read) 885 * bit 7: data_crc_present: Is data CRC present after data 886 */ 887 uint8_t fields1; 888 889 /* Result code (EC_RES_*) */ 890 uint16_t result; 891 892 /* Length of data which follows this header (not including data CRC) */ 893 uint16_t data_len; 894 895 /* Reserved (set 0, ignore on read) */ 896 uint8_t reserved; 897 898 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 899 uint8_t header_crc; 900 } __ec_align4; 901 902 /* Fields in fields0 byte */ 903 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f 904 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 905 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 906 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 907 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 908 909 /* Fields in fields1 byte */ 910 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ 911 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 912 913 /*****************************************************************************/ 914 /* 915 * Notes on commands: 916 * 917 * Each command is an 16-bit command value. Commands which take params or 918 * return response data specify structures for that data. If no structure is 919 * specified, the command does not input or output data, respectively. 920 * Parameter/response length is implicit in the structs. Some underlying 921 * communication protocols (I2C, SPI) may add length or checksum headers, but 922 * those are implementation-dependent and not defined here. 923 * 924 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 925 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 926 */ 927 928 /*****************************************************************************/ 929 /* General / test commands */ 930 931 /* 932 * Get protocol version, used to deal with non-backward compatible protocol 933 * changes. 934 */ 935 #define EC_CMD_PROTO_VERSION 0x0000 936 937 /** 938 * struct ec_response_proto_version - Response to the proto version command. 939 * @version: The protocol version. 940 */ 941 struct ec_response_proto_version { 942 uint32_t version; 943 } __ec_align4; 944 945 /* 946 * Hello. This is a simple command to test the EC is responsive to 947 * commands. 948 */ 949 #define EC_CMD_HELLO 0x0001 950 951 /** 952 * struct ec_params_hello - Parameters to the hello command. 953 * @in_data: Pass anything here. 954 */ 955 struct ec_params_hello { 956 uint32_t in_data; 957 } __ec_align4; 958 959 /** 960 * struct ec_response_hello - Response to the hello command. 961 * @out_data: Output will be in_data + 0x01020304. 962 */ 963 struct ec_response_hello { 964 uint32_t out_data; 965 } __ec_align4; 966 967 /* Get version number */ 968 #define EC_CMD_GET_VERSION 0x0002 969 970 enum ec_current_image { 971 EC_IMAGE_UNKNOWN = 0, 972 EC_IMAGE_RO, 973 EC_IMAGE_RW 974 }; 975 976 /** 977 * struct ec_response_get_version - Response to the get version command. 978 * @version_string_ro: Null-terminated RO firmware version string. 979 * @version_string_rw: Null-terminated RW firmware version string. 980 * @reserved: Unused bytes; was previously RW-B firmware version string. 981 * @current_image: One of ec_current_image. 982 */ 983 struct ec_response_get_version { 984 char version_string_ro[32]; 985 char version_string_rw[32]; 986 char reserved[32]; 987 uint32_t current_image; 988 } __ec_align4; 989 990 /* Read test */ 991 #define EC_CMD_READ_TEST 0x0003 992 993 /** 994 * struct ec_params_read_test - Parameters for the read test command. 995 * @offset: Starting value for read buffer. 996 * @size: Size to read in bytes. 997 */ 998 struct ec_params_read_test { 999 uint32_t offset; 1000 uint32_t size; 1001 } __ec_align4; 1002 1003 /** 1004 * struct ec_response_read_test - Response to the read test command. 1005 * @data: Data returned by the read test command. 1006 */ 1007 struct ec_response_read_test { 1008 uint32_t data[32]; 1009 } __ec_align4; 1010 1011 /* 1012 * Get build information 1013 * 1014 * Response is null-terminated string. 1015 */ 1016 #define EC_CMD_GET_BUILD_INFO 0x0004 1017 1018 /* Get chip info */ 1019 #define EC_CMD_GET_CHIP_INFO 0x0005 1020 1021 /** 1022 * struct ec_response_get_chip_info - Response to the get chip info command. 1023 * @vendor: Null-terminated string for chip vendor. 1024 * @name: Null-terminated string for chip name. 1025 * @revision: Null-terminated string for chip mask version. 1026 */ 1027 struct ec_response_get_chip_info { 1028 char vendor[32]; 1029 char name[32]; 1030 char revision[32]; 1031 } __ec_align4; 1032 1033 /* Get board HW version */ 1034 #define EC_CMD_GET_BOARD_VERSION 0x0006 1035 1036 /** 1037 * struct ec_response_board_version - Response to the board version command. 1038 * @board_version: A monotonously incrementing number. 1039 */ 1040 struct ec_response_board_version { 1041 uint16_t board_version; 1042 } __ec_align2; 1043 1044 /* 1045 * Read memory-mapped data. 1046 * 1047 * This is an alternate interface to memory-mapped data for bus protocols 1048 * which don't support direct-mapped memory - I2C, SPI, etc. 1049 * 1050 * Response is params.size bytes of data. 1051 */ 1052 #define EC_CMD_READ_MEMMAP 0x0007 1053 1054 /** 1055 * struct ec_params_read_memmap - Parameters for the read memory map command. 1056 * @offset: Offset in memmap (EC_MEMMAP_*). 1057 * @size: Size to read in bytes. 1058 */ 1059 struct ec_params_read_memmap { 1060 uint8_t offset; 1061 uint8_t size; 1062 } __ec_align1; 1063 1064 /* Read versions supported for a command */ 1065 #define EC_CMD_GET_CMD_VERSIONS 0x0008 1066 1067 /** 1068 * struct ec_params_get_cmd_versions - Parameters for the get command versions. 1069 * @cmd: Command to check. 1070 */ 1071 struct ec_params_get_cmd_versions { 1072 uint8_t cmd; 1073 } __ec_align1; 1074 1075 /** 1076 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command 1077 * versions (v1) 1078 * @cmd: Command to check. 1079 */ 1080 struct ec_params_get_cmd_versions_v1 { 1081 uint16_t cmd; 1082 } __ec_align2; 1083 1084 /** 1085 * struct ec_response_get_cmd_versions - Response to the get command versions. 1086 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with 1087 * a desired version. 1088 */ 1089 struct ec_response_get_cmd_versions { 1090 uint32_t version_mask; 1091 } __ec_align4; 1092 1093 /* 1094 * Check EC communications status (busy). This is needed on i2c/spi but not 1095 * on lpc since it has its own out-of-band busy indicator. 1096 * 1097 * lpc must read the status from the command register. Attempting this on 1098 * lpc will overwrite the args/parameter space and corrupt its data. 1099 */ 1100 #define EC_CMD_GET_COMMS_STATUS 0x0009 1101 1102 /* Avoid using ec_status which is for return values */ 1103 enum ec_comms_status { 1104 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ 1105 }; 1106 1107 /** 1108 * struct ec_response_get_comms_status - Response to the get comms status 1109 * command. 1110 * @flags: Mask of enum ec_comms_status. 1111 */ 1112 struct ec_response_get_comms_status { 1113 uint32_t flags; /* Mask of enum ec_comms_status */ 1114 } __ec_align4; 1115 1116 /* Fake a variety of responses, purely for testing purposes. */ 1117 #define EC_CMD_TEST_PROTOCOL 0x000A 1118 1119 /* Tell the EC what to send back to us. */ 1120 struct ec_params_test_protocol { 1121 uint32_t ec_result; 1122 uint32_t ret_len; 1123 uint8_t buf[32]; 1124 } __ec_align4; 1125 1126 /* Here it comes... */ 1127 struct ec_response_test_protocol { 1128 uint8_t buf[32]; 1129 } __ec_align4; 1130 1131 /* Get protocol information */ 1132 #define EC_CMD_GET_PROTOCOL_INFO 0x000B 1133 1134 /* Flags for ec_response_get_protocol_info.flags */ 1135 /* EC_RES_IN_PROGRESS may be returned if a command is slow */ 1136 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) 1137 1138 /** 1139 * struct ec_response_get_protocol_info - Response to the get protocol info. 1140 * @protocol_versions: Bitmask of protocol versions supported (1 << n means 1141 * version n). 1142 * @max_request_packet_size: Maximum request packet size in bytes. 1143 * @max_response_packet_size: Maximum response packet size in bytes. 1144 * @flags: see EC_PROTOCOL_INFO_* 1145 */ 1146 struct ec_response_get_protocol_info { 1147 /* Fields which exist if at least protocol version 3 supported */ 1148 uint32_t protocol_versions; 1149 uint16_t max_request_packet_size; 1150 uint16_t max_response_packet_size; 1151 uint32_t flags; 1152 } __ec_align4; 1153 1154 1155 /*****************************************************************************/ 1156 /* Get/Set miscellaneous values */ 1157 1158 /* The upper byte of .flags tells what to do (nothing means "get") */ 1159 #define EC_GSV_SET 0x80000000 1160 1161 /* 1162 * The lower three bytes of .flags identifies the parameter, if that has 1163 * meaning for an individual command. 1164 */ 1165 #define EC_GSV_PARAM_MASK 0x00ffffff 1166 1167 struct ec_params_get_set_value { 1168 uint32_t flags; 1169 uint32_t value; 1170 } __ec_align4; 1171 1172 struct ec_response_get_set_value { 1173 uint32_t flags; 1174 uint32_t value; 1175 } __ec_align4; 1176 1177 /* More than one command can use these structs to get/set parameters. */ 1178 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1179 1180 /*****************************************************************************/ 1181 /* List the features supported by the firmware */ 1182 #define EC_CMD_GET_FEATURES 0x000D 1183 1184 /* Supported features */ 1185 enum ec_feature_code { 1186 /* 1187 * This image contains a limited set of features. Another image 1188 * in RW partition may support more features. 1189 */ 1190 EC_FEATURE_LIMITED = 0, 1191 /* 1192 * Commands for probing/reading/writing/erasing the flash in the 1193 * EC are present. 1194 */ 1195 EC_FEATURE_FLASH = 1, 1196 /* 1197 * Can control the fan speed directly. 1198 */ 1199 EC_FEATURE_PWM_FAN = 2, 1200 /* 1201 * Can control the intensity of the keyboard backlight. 1202 */ 1203 EC_FEATURE_PWM_KEYB = 3, 1204 /* 1205 * Support Google lightbar, introduced on Pixel. 1206 */ 1207 EC_FEATURE_LIGHTBAR = 4, 1208 /* Control of LEDs */ 1209 EC_FEATURE_LED = 5, 1210 /* Exposes an interface to control gyro and sensors. 1211 * The host goes through the EC to access these sensors. 1212 * In addition, the EC may provide composite sensors, like lid angle. 1213 */ 1214 EC_FEATURE_MOTION_SENSE = 6, 1215 /* The keyboard is controlled by the EC */ 1216 EC_FEATURE_KEYB = 7, 1217 /* The AP can use part of the EC flash as persistent storage. */ 1218 EC_FEATURE_PSTORE = 8, 1219 /* The EC monitors BIOS port 80h, and can return POST codes. */ 1220 EC_FEATURE_PORT80 = 9, 1221 /* 1222 * Thermal management: include TMP specific commands. 1223 * Higher level than direct fan control. 1224 */ 1225 EC_FEATURE_THERMAL = 10, 1226 /* Can switch the screen backlight on/off */ 1227 EC_FEATURE_BKLIGHT_SWITCH = 11, 1228 /* Can switch the wifi module on/off */ 1229 EC_FEATURE_WIFI_SWITCH = 12, 1230 /* Monitor host events, through for example SMI or SCI */ 1231 EC_FEATURE_HOST_EVENTS = 13, 1232 /* The EC exposes GPIO commands to control/monitor connected devices. */ 1233 EC_FEATURE_GPIO = 14, 1234 /* The EC can send i2c messages to downstream devices. */ 1235 EC_FEATURE_I2C = 15, 1236 /* Command to control charger are included */ 1237 EC_FEATURE_CHARGER = 16, 1238 /* Simple battery support. */ 1239 EC_FEATURE_BATTERY = 17, 1240 /* 1241 * Support Smart battery protocol 1242 * (Common Smart Battery System Interface Specification) 1243 */ 1244 EC_FEATURE_SMART_BATTERY = 18, 1245 /* EC can detect when the host hangs. */ 1246 EC_FEATURE_HANG_DETECT = 19, 1247 /* Report power information, for pit only */ 1248 EC_FEATURE_PMU = 20, 1249 /* Another Cros EC device is present downstream of this one */ 1250 EC_FEATURE_SUB_MCU = 21, 1251 /* Support USB Power delivery (PD) commands */ 1252 EC_FEATURE_USB_PD = 22, 1253 /* Control USB multiplexer, for audio through USB port for instance. */ 1254 EC_FEATURE_USB_MUX = 23, 1255 /* Motion Sensor code has an internal software FIFO */ 1256 EC_FEATURE_MOTION_SENSE_FIFO = 24, 1257 /* Support temporary secure vstore */ 1258 EC_FEATURE_VSTORE = 25, 1259 /* EC decides on USB-C SS mux state, muxes configured by host */ 1260 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, 1261 /* EC has RTC feature that can be controlled by host commands */ 1262 EC_FEATURE_RTC = 27, 1263 /* The MCU exposes a Fingerprint sensor */ 1264 EC_FEATURE_FINGERPRINT = 28, 1265 /* The MCU exposes a Touchpad */ 1266 EC_FEATURE_TOUCHPAD = 29, 1267 /* The MCU has RWSIG task enabled */ 1268 EC_FEATURE_RWSIG = 30, 1269 /* EC has device events support */ 1270 EC_FEATURE_DEVICE_EVENT = 31, 1271 /* EC supports the unified wake masks for LPC/eSPI systems */ 1272 EC_FEATURE_UNIFIED_WAKE_MASKS = 32, 1273 /* EC supports 64-bit host events */ 1274 EC_FEATURE_HOST_EVENT64 = 33, 1275 /* EC runs code in RAM (not in place, a.k.a. XIP) */ 1276 EC_FEATURE_EXEC_IN_RAM = 34, 1277 /* EC supports CEC commands */ 1278 EC_FEATURE_CEC = 35, 1279 /* EC supports tight sensor timestamping. */ 1280 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, 1281 /* 1282 * EC supports tablet mode detection aligned to Chrome and allows 1283 * setting of threshold by host command using 1284 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. 1285 */ 1286 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, 1287 /* The MCU is a System Companion Processor (SCP). */ 1288 EC_FEATURE_SCP = 39, 1289 /* The MCU is an Integrated Sensor Hub */ 1290 EC_FEATURE_ISH = 40, 1291 /* New TCPMv2 TYPEC_ prefaced commands supported */ 1292 EC_FEATURE_TYPEC_CMD = 41, 1293 /* 1294 * The EC will wait for direction from the AP to enter Type-C alternate 1295 * modes or USB4. 1296 */ 1297 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, 1298 /* 1299 * The EC will wait for an acknowledge from the AP after setting the 1300 * mux. 1301 */ 1302 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, 1303 /* 1304 * The EC supports entering and residing in S4. 1305 */ 1306 EC_FEATURE_S4_RESIDENCY = 44, 1307 /* 1308 * The EC supports the AP directing mux sets for the board. 1309 */ 1310 EC_FEATURE_TYPEC_AP_MUX_SET = 45, 1311 /* 1312 * The EC supports the AP composing VDMs for us to send. 1313 */ 1314 EC_FEATURE_TYPEC_AP_VDM_SEND = 46, 1315 /* 1316 * The EC supports system safe mode panic recovery. 1317 */ 1318 EC_FEATURE_SYSTEM_SAFE_MODE = 47, 1319 /* 1320 * The EC will reboot on runtime assertion failures. 1321 */ 1322 EC_FEATURE_ASSERT_REBOOTS = 48, 1323 /* 1324 * The EC image is built with tokenized logging enabled. 1325 */ 1326 EC_FEATURE_TOKENIZED_LOGGING = 49, 1327 /* 1328 * The EC supports triggering an STB dump. 1329 */ 1330 EC_FEATURE_AMD_STB_DUMP = 50, 1331 /* 1332 * The EC supports memory dump commands. 1333 */ 1334 EC_FEATURE_MEMORY_DUMP = 51, 1335 /* 1336 * The EC supports DP2.1 capability 1337 */ 1338 EC_FEATURE_TYPEC_DP2_1 = 52, 1339 /* 1340 * The MCU is System Companion Processor Core 1 1341 */ 1342 EC_FEATURE_SCP_C1 = 53, 1343 /* 1344 * The EC supports UCSI PPM. 1345 */ 1346 EC_FEATURE_UCSI_PPM = 54, 1347 /* 1348 * The EC supports Strauss keyboard. 1349 */ 1350 EC_FEATURE_STRAUSS = 55, 1351 /* 1352 * The EC supports PoE. 1353 */ 1354 EC_FEATURE_POE = 56, 1355 /* 1356 * The EC supports a hybrid boost charger 1357 */ 1358 EC_FEATURE_CHARGER_HYBRID_POWER_BOOST = 57, 1359 /* 1360 * Support signaling new console logs via host event 1361 */ 1362 EC_FEATURE_CONSOLE_LOG_EVENT = 58, 1363 /* 1364 * The EC supports power monitoring 1365 */ 1366 EC_FEATURE_PWRMON = 59, 1367 }; 1368 1369 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) 1370 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) 1371 1372 struct ec_response_get_features { 1373 uint32_t flags[2]; 1374 } __ec_align4; 1375 1376 /*****************************************************************************/ 1377 /* Get the board's SKU ID from EC */ 1378 #define EC_CMD_GET_SKU_ID 0x000E 1379 1380 /* Set SKU ID from AP */ 1381 #define EC_CMD_SET_SKU_ID 0x000F 1382 1383 struct ec_sku_id_info { 1384 uint32_t sku_id; 1385 } __ec_align4; 1386 1387 /*****************************************************************************/ 1388 /* Flash commands */ 1389 1390 /* Get flash info */ 1391 #define EC_CMD_FLASH_INFO 0x0010 1392 #define EC_VER_FLASH_INFO 2 1393 1394 /** 1395 * struct ec_response_flash_info - Response to the flash info command. 1396 * @flash_size: Usable flash size in bytes. 1397 * @write_block_size: Write block size. Write offset and size must be a 1398 * multiple of this. 1399 * @erase_block_size: Erase block size. Erase offset and size must be a 1400 * multiple of this. 1401 * @protect_block_size: Protection block size. Protection offset and size 1402 * must be a multiple of this. 1403 * 1404 * Version 0 returns these fields. 1405 */ 1406 struct ec_response_flash_info { 1407 uint32_t flash_size; 1408 uint32_t write_block_size; 1409 uint32_t erase_block_size; 1410 uint32_t protect_block_size; 1411 } __ec_align4; 1412 1413 /* 1414 * Flags for version 1+ flash info command 1415 * EC flash erases bits to 0 instead of 1. 1416 */ 1417 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) 1418 1419 /* 1420 * Flash must be selected for read/write/erase operations to succeed. This may 1421 * be necessary on a chip where write/erase can be corrupted by other board 1422 * activity, or where the chip needs to enable some sort of programming voltage, 1423 * or where the read/write/erase operations require cleanly suspending other 1424 * chip functionality. 1425 */ 1426 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) 1427 1428 /** 1429 * struct ec_response_flash_info_1 - Response to the flash info v1 command. 1430 * @flash_size: Usable flash size in bytes. 1431 * @write_block_size: Write block size. Write offset and size must be a 1432 * multiple of this. 1433 * @erase_block_size: Erase block size. Erase offset and size must be a 1434 * multiple of this. 1435 * @protect_block_size: Protection block size. Protection offset and size 1436 * must be a multiple of this. 1437 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if 1438 * size is exactly this and offset is a multiple of this. 1439 * For example, an EC may have a write buffer which can do 1440 * half-page operations if data is aligned, and a slower 1441 * word-at-a-time write mode. 1442 * @flags: Flags; see EC_FLASH_INFO_* 1443 * 1444 * Version 1 returns the same initial fields as version 0, with additional 1445 * fields following. 1446 * 1447 * gcc anonymous structs don't seem to get along with the __packed directive; 1448 * if they did we'd define the version 0 structure as a sub-structure of this 1449 * one. 1450 * 1451 * Version 2 supports flash banks of different sizes: 1452 * The caller specified the number of banks it has preallocated 1453 * (num_banks_desc) 1454 * The EC returns the number of banks describing the flash memory. 1455 * It adds banks descriptions up to num_banks_desc. 1456 */ 1457 struct ec_response_flash_info_1 { 1458 /* Version 0 fields; see above for description */ 1459 uint32_t flash_size; 1460 uint32_t write_block_size; 1461 uint32_t erase_block_size; 1462 uint32_t protect_block_size; 1463 1464 /* Version 1 adds these fields: */ 1465 uint32_t write_ideal_size; 1466 uint32_t flags; 1467 } __ec_align4; 1468 1469 struct ec_params_flash_info_2 { 1470 /* Number of banks to describe */ 1471 uint16_t num_banks_desc; 1472 /* Reserved; set 0; ignore on read */ 1473 uint8_t reserved[2]; 1474 } __ec_align4; 1475 1476 struct ec_flash_bank { 1477 /* Number of sector is in this bank. */ 1478 uint16_t count; 1479 /* Size in power of 2 of each sector (8 --> 256 bytes) */ 1480 uint8_t size_exp; 1481 /* Minimal write size for the sectors in this bank */ 1482 uint8_t write_size_exp; 1483 /* Erase size for the sectors in this bank */ 1484 uint8_t erase_size_exp; 1485 /* Size for write protection, usually identical to erase size. */ 1486 uint8_t protect_size_exp; 1487 /* Reserved; set 0; ignore on read */ 1488 uint8_t reserved[2]; 1489 }; 1490 1491 struct ec_response_flash_info_2 { 1492 /* Total flash in the EC. */ 1493 uint32_t flash_size; 1494 /* Flags; see EC_FLASH_INFO_* */ 1495 uint32_t flags; 1496 /* Maximum size to use to send data to write to the EC. */ 1497 uint32_t write_ideal_size; 1498 /* Number of banks present in the EC. */ 1499 uint16_t num_banks_total; 1500 /* Number of banks described in banks array. */ 1501 uint16_t num_banks_desc; 1502 struct ec_flash_bank banks[]; 1503 } __ec_align4; 1504 1505 /* 1506 * Read flash 1507 * 1508 * Response is params.size bytes of data. 1509 */ 1510 #define EC_CMD_FLASH_READ 0x0011 1511 1512 /** 1513 * struct ec_params_flash_read - Parameters for the flash read command. 1514 * @offset: Byte offset to read. 1515 * @size: Size to read in bytes. 1516 */ 1517 struct ec_params_flash_read { 1518 uint32_t offset; 1519 uint32_t size; 1520 } __ec_align4; 1521 1522 /* Write flash */ 1523 #define EC_CMD_FLASH_WRITE 0x0012 1524 #define EC_VER_FLASH_WRITE 1 1525 1526 /* Version 0 of the flash command supported only 64 bytes of data */ 1527 #define EC_FLASH_WRITE_VER0_SIZE 64 1528 1529 /** 1530 * struct ec_params_flash_write - Parameters for the flash write command. 1531 * @offset: Byte offset to write. 1532 * @size: Size to write in bytes. 1533 */ 1534 struct ec_params_flash_write { 1535 uint32_t offset; 1536 uint32_t size; 1537 /* Followed by data to write */ 1538 } __ec_align4; 1539 1540 /* Erase flash */ 1541 #define EC_CMD_FLASH_ERASE 0x0013 1542 1543 /** 1544 * struct ec_params_flash_erase - Parameters for the flash erase command, v0. 1545 * @offset: Byte offset to erase. 1546 * @size: Size to erase in bytes. 1547 */ 1548 struct ec_params_flash_erase { 1549 uint32_t offset; 1550 uint32_t size; 1551 } __ec_align4; 1552 1553 /* 1554 * v1 add async erase: 1555 * subcommands can returns: 1556 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1557 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1558 * EC_RES_ERROR : other errors. 1559 * EC_RES_BUSY : an existing erase operation is in progress. 1560 * EC_RES_ACCESS_DENIED: Trying to erase running image. 1561 * 1562 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1563 * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1564 * the proper result. 1565 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1566 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1567 * ERASE_GET_RESULT command may timeout on EC where flash access is not 1568 * permitted while erasing. (For instance, STM32F4). 1569 */ 1570 enum ec_flash_erase_cmd { 1571 FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1572 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1573 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1574 }; 1575 1576 /** 1577 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. 1578 * @cmd: One of ec_flash_erase_cmd. 1579 * @reserved: Pad byte; currently always contains 0. 1580 * @flag: No flags defined yet; set to 0. 1581 * @params: Same as v0 parameters. 1582 */ 1583 struct ec_params_flash_erase_v1 { 1584 uint8_t cmd; 1585 uint8_t reserved; 1586 uint16_t flag; 1587 struct ec_params_flash_erase params; 1588 } __ec_align4; 1589 1590 /* 1591 * Get/set flash protection. 1592 * 1593 * If mask!=0, sets/clear the requested bits of flags. Depending on the 1594 * firmware write protect GPIO, not all flags will take effect immediately; 1595 * some flags require a subsequent hard reset to take effect. Check the 1596 * returned flags bits to see what actually happened. 1597 * 1598 * If mask=0, simply returns the current flags state. 1599 */ 1600 #define EC_CMD_FLASH_PROTECT 0x0015 1601 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1602 1603 /* Flags for flash protection */ 1604 /* RO flash code protected when the EC boots */ 1605 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) 1606 /* 1607 * RO flash code protected now. If this bit is set, at-boot status cannot 1608 * be changed. 1609 */ 1610 #define EC_FLASH_PROTECT_RO_NOW BIT(1) 1611 /* Entire flash code protected now, until reboot. */ 1612 #define EC_FLASH_PROTECT_ALL_NOW BIT(2) 1613 /* Flash write protect GPIO is asserted now */ 1614 #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) 1615 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1616 #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) 1617 /* 1618 * Error - flash protection is in inconsistent state. At least one bank of 1619 * flash which should be protected is not protected. Usually fixed by 1620 * re-requesting the desired flags, or by a hard reset if that fails. 1621 */ 1622 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) 1623 /* Entire flash code protected when the EC boots */ 1624 #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) 1625 /* RW flash code protected when the EC boots */ 1626 #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) 1627 /* RW flash code protected now. */ 1628 #define EC_FLASH_PROTECT_RW_NOW BIT(8) 1629 /* Rollback information flash region protected when the EC boots */ 1630 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) 1631 /* Rollback information flash region protected now */ 1632 #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) 1633 1634 1635 /** 1636 * struct ec_params_flash_protect - Parameters for the flash protect command. 1637 * @mask: Bits in flags to apply. 1638 * @flags: New flags to apply. 1639 */ 1640 struct ec_params_flash_protect { 1641 uint32_t mask; 1642 uint32_t flags; 1643 } __ec_align4; 1644 1645 /** 1646 * struct ec_response_flash_protect - Response to the flash protect command. 1647 * @flags: Current value of flash protect flags. 1648 * @valid_flags: Flags which are valid on this platform. This allows the 1649 * caller to distinguish between flags which aren't set vs. flags 1650 * which can't be set on this platform. 1651 * @writable_flags: Flags which can be changed given the current protection 1652 * state. 1653 */ 1654 struct ec_response_flash_protect { 1655 uint32_t flags; 1656 uint32_t valid_flags; 1657 uint32_t writable_flags; 1658 } __ec_align4; 1659 1660 /* 1661 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 1662 * write protect. These commands may be reused with version > 0. 1663 */ 1664 1665 /* Get the region offset/size */ 1666 #define EC_CMD_FLASH_REGION_INFO 0x0016 1667 #define EC_VER_FLASH_REGION_INFO 1 1668 1669 enum ec_flash_region { 1670 /* Region which holds read-only EC image */ 1671 EC_FLASH_REGION_RO = 0, 1672 /* 1673 * Region which holds active RW image. 'Active' is different from 1674 * 'running'. Active means 'scheduled-to-run'. Since RO image always 1675 * scheduled to run, active/non-active applies only to RW images (for 1676 * the same reason 'update' applies only to RW images. It's a state of 1677 * an image on a flash. Running image can be RO, RW_A, RW_B but active 1678 * image can only be RW_A or RW_B. In recovery mode, an active RW image 1679 * doesn't enter 'running' state but it's still active on a flash. 1680 */ 1681 EC_FLASH_REGION_ACTIVE, 1682 /* 1683 * Region which should be write-protected in the factory (a superset of 1684 * EC_FLASH_REGION_RO) 1685 */ 1686 EC_FLASH_REGION_WP_RO, 1687 /* Region which holds updatable (non-active) RW image */ 1688 EC_FLASH_REGION_UPDATE, 1689 /* Number of regions */ 1690 EC_FLASH_REGION_COUNT, 1691 }; 1692 /* 1693 * 'RW' is vague if there are multiple RW images; we mean the active one, 1694 * so the old constant is deprecated. 1695 */ 1696 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE 1697 1698 /** 1699 * struct ec_params_flash_region_info - Parameters for the flash region info 1700 * command. 1701 * @region: Flash region; see EC_FLASH_REGION_* 1702 */ 1703 struct ec_params_flash_region_info { 1704 uint32_t region; 1705 } __ec_align4; 1706 1707 struct ec_response_flash_region_info { 1708 uint32_t offset; 1709 uint32_t size; 1710 } __ec_align4; 1711 1712 /* Read/write VbNvContext */ 1713 #define EC_CMD_VBNV_CONTEXT 0x0017 1714 #define EC_VER_VBNV_CONTEXT 1 1715 #define EC_VBNV_BLOCK_SIZE 16 1716 1717 enum ec_vbnvcontext_op { 1718 EC_VBNV_CONTEXT_OP_READ, 1719 EC_VBNV_CONTEXT_OP_WRITE, 1720 }; 1721 1722 struct ec_params_vbnvcontext { 1723 uint32_t op; 1724 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1725 } __ec_align4; 1726 1727 struct ec_response_vbnvcontext { 1728 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1729 } __ec_align4; 1730 1731 1732 /* Get SPI flash information */ 1733 #define EC_CMD_FLASH_SPI_INFO 0x0018 1734 1735 struct ec_response_flash_spi_info { 1736 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1737 uint8_t jedec[3]; 1738 1739 /* Pad byte; currently always contains 0 */ 1740 uint8_t reserved0; 1741 1742 /* Manufacturer / device ID from command 0x90 */ 1743 uint8_t mfr_dev_id[2]; 1744 1745 /* Status registers from command 0x05 and 0x35 */ 1746 uint8_t sr1, sr2; 1747 } __ec_align1; 1748 1749 1750 /* Select flash during flash operations */ 1751 #define EC_CMD_FLASH_SELECT 0x0019 1752 1753 /** 1754 * struct ec_params_flash_select - Parameters for the flash select command. 1755 * @select: 1 to select flash, 0 to deselect flash 1756 */ 1757 struct ec_params_flash_select { 1758 uint8_t select; 1759 } __ec_align4; 1760 1761 1762 /*****************************************************************************/ 1763 /* PWM commands */ 1764 1765 /* Get fan target RPM */ 1766 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1767 1768 struct ec_response_pwm_get_fan_rpm { 1769 uint32_t rpm; 1770 } __ec_align4; 1771 1772 /* Set target fan RPM */ 1773 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1774 1775 /* Version 0 of input params */ 1776 struct ec_params_pwm_set_fan_target_rpm_v0 { 1777 uint32_t rpm; 1778 } __ec_align4; 1779 1780 /* Version 1 of input params */ 1781 struct ec_params_pwm_set_fan_target_rpm_v1 { 1782 uint32_t rpm; 1783 uint8_t fan_idx; 1784 } __ec_align_size1; 1785 1786 /* Get keyboard backlight */ 1787 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1788 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1789 1790 struct ec_response_pwm_get_keyboard_backlight { 1791 uint8_t percent; 1792 uint8_t enabled; 1793 } __ec_align1; 1794 1795 /* Set keyboard backlight */ 1796 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1797 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1798 1799 struct ec_params_pwm_set_keyboard_backlight { 1800 uint8_t percent; 1801 } __ec_align1; 1802 1803 /* Set target fan PWM duty cycle */ 1804 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1805 1806 /* Version 0 of input params */ 1807 struct ec_params_pwm_set_fan_duty_v0 { 1808 uint32_t percent; 1809 } __ec_align4; 1810 1811 /* Version 1 of input params */ 1812 struct ec_params_pwm_set_fan_duty_v1 { 1813 uint32_t percent; 1814 uint8_t fan_idx; 1815 } __ec_align_size1; 1816 1817 #define EC_CMD_PWM_SET_DUTY 0x0025 1818 /* 16 bit duty cycle, 0xffff = 100% */ 1819 #define EC_PWM_MAX_DUTY 0xffff 1820 1821 enum ec_pwm_type { 1822 /* All types, indexed by board-specific enum pwm_channel */ 1823 EC_PWM_TYPE_GENERIC = 0, 1824 /* Keyboard backlight */ 1825 EC_PWM_TYPE_KB_LIGHT, 1826 /* Display backlight */ 1827 EC_PWM_TYPE_DISPLAY_LIGHT, 1828 EC_PWM_TYPE_COUNT, 1829 }; 1830 1831 struct ec_params_pwm_set_duty { 1832 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1833 uint8_t pwm_type; /* ec_pwm_type */ 1834 uint8_t index; /* Type-specific index, or 0 if unique */ 1835 } __ec_align4; 1836 1837 #define EC_CMD_PWM_GET_DUTY 0x0026 1838 1839 struct ec_params_pwm_get_duty { 1840 uint8_t pwm_type; /* ec_pwm_type */ 1841 uint8_t index; /* Type-specific index, or 0 if unique */ 1842 } __ec_align1; 1843 1844 struct ec_response_pwm_get_duty { 1845 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1846 } __ec_align2; 1847 1848 #define EC_CMD_PWM_GET_FAN_DUTY 0x0027 1849 1850 struct ec_params_pwm_get_fan_duty { 1851 uint8_t fan_idx; 1852 } __ec_align1; 1853 1854 struct ec_response_pwm_get_fan_duty { 1855 uint32_t percent; /* Percentage of duty cycle, ranging from 0 ~ 100 */ 1856 } __ec_align4; 1857 1858 /*****************************************************************************/ 1859 /* 1860 * Lightbar commands. This looks worse than it is. Since we only use one HOST 1861 * command to say "talk to the lightbar", we put the "and tell it to do X" part 1862 * into a subcommand. We'll make separate structs for subcommands with 1863 * different input args, so that we know how much to expect. 1864 */ 1865 #define EC_CMD_LIGHTBAR_CMD 0x0028 1866 1867 struct rgb_s { 1868 uint8_t r, g, b; 1869 } __ec_todo_unpacked; 1870 1871 #define LB_BATTERY_LEVELS 4 1872 1873 /* 1874 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a 1875 * host command, but the alignment is the same regardless. Keep it that way. 1876 */ 1877 struct lightbar_params_v0 { 1878 /* Timing */ 1879 int32_t google_ramp_up; 1880 int32_t google_ramp_down; 1881 int32_t s3s0_ramp_up; 1882 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1883 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1884 int32_t s0s3_ramp_down; 1885 int32_t s3_sleep_for; 1886 int32_t s3_ramp_up; 1887 int32_t s3_ramp_down; 1888 1889 /* Oscillation */ 1890 uint8_t new_s0; 1891 uint8_t osc_min[2]; /* AC=0/1 */ 1892 uint8_t osc_max[2]; /* AC=0/1 */ 1893 uint8_t w_ofs[2]; /* AC=0/1 */ 1894 1895 /* Brightness limits based on the backlight and AC. */ 1896 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1897 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1898 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1899 1900 /* Battery level thresholds */ 1901 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1902 1903 /* Map [AC][battery_level] to color index */ 1904 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1905 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1906 1907 /* Color palette */ 1908 struct rgb_s color[8]; /* 0-3 are Google colors */ 1909 } __ec_todo_packed; 1910 1911 struct lightbar_params_v1 { 1912 /* Timing */ 1913 int32_t google_ramp_up; 1914 int32_t google_ramp_down; 1915 int32_t s3s0_ramp_up; 1916 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1917 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1918 int32_t s0s3_ramp_down; 1919 int32_t s3_sleep_for; 1920 int32_t s3_ramp_up; 1921 int32_t s3_ramp_down; 1922 int32_t s5_ramp_up; 1923 int32_t s5_ramp_down; 1924 int32_t tap_tick_delay; 1925 int32_t tap_gate_delay; 1926 int32_t tap_display_time; 1927 1928 /* Tap-for-battery params */ 1929 uint8_t tap_pct_red; 1930 uint8_t tap_pct_green; 1931 uint8_t tap_seg_min_on; 1932 uint8_t tap_seg_max_on; 1933 uint8_t tap_seg_osc; 1934 uint8_t tap_idx[3]; 1935 1936 /* Oscillation */ 1937 uint8_t osc_min[2]; /* AC=0/1 */ 1938 uint8_t osc_max[2]; /* AC=0/1 */ 1939 uint8_t w_ofs[2]; /* AC=0/1 */ 1940 1941 /* Brightness limits based on the backlight and AC. */ 1942 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1943 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1944 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1945 1946 /* Battery level thresholds */ 1947 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1948 1949 /* Map [AC][battery_level] to color index */ 1950 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1951 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1952 1953 /* s5: single color pulse on inhibited power-up */ 1954 uint8_t s5_idx; 1955 1956 /* Color palette */ 1957 struct rgb_s color[8]; /* 0-3 are Google colors */ 1958 } __ec_todo_packed; 1959 1960 /* Lightbar command params v2 1961 * crbug.com/467716 1962 * 1963 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1964 * logical groups to make it more manageable ( < 120 bytes). 1965 * 1966 * NOTE: Each of these groups must be less than 120 bytes. 1967 */ 1968 1969 struct lightbar_params_v2_timing { 1970 /* Timing */ 1971 int32_t google_ramp_up; 1972 int32_t google_ramp_down; 1973 int32_t s3s0_ramp_up; 1974 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1975 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1976 int32_t s0s3_ramp_down; 1977 int32_t s3_sleep_for; 1978 int32_t s3_ramp_up; 1979 int32_t s3_ramp_down; 1980 int32_t s5_ramp_up; 1981 int32_t s5_ramp_down; 1982 int32_t tap_tick_delay; 1983 int32_t tap_gate_delay; 1984 int32_t tap_display_time; 1985 } __ec_todo_packed; 1986 1987 struct lightbar_params_v2_tap { 1988 /* Tap-for-battery params */ 1989 uint8_t tap_pct_red; 1990 uint8_t tap_pct_green; 1991 uint8_t tap_seg_min_on; 1992 uint8_t tap_seg_max_on; 1993 uint8_t tap_seg_osc; 1994 uint8_t tap_idx[3]; 1995 } __ec_todo_packed; 1996 1997 struct lightbar_params_v2_oscillation { 1998 /* Oscillation */ 1999 uint8_t osc_min[2]; /* AC=0/1 */ 2000 uint8_t osc_max[2]; /* AC=0/1 */ 2001 uint8_t w_ofs[2]; /* AC=0/1 */ 2002 } __ec_todo_packed; 2003 2004 struct lightbar_params_v2_brightness { 2005 /* Brightness limits based on the backlight and AC. */ 2006 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 2007 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 2008 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 2009 } __ec_todo_packed; 2010 2011 struct lightbar_params_v2_thresholds { 2012 /* Battery level thresholds */ 2013 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 2014 } __ec_todo_packed; 2015 2016 struct lightbar_params_v2_colors { 2017 /* Map [AC][battery_level] to color index */ 2018 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 2019 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 2020 2021 /* s5: single color pulse on inhibited power-up */ 2022 uint8_t s5_idx; 2023 2024 /* Color palette */ 2025 struct rgb_s color[8]; /* 0-3 are Google colors */ 2026 } __ec_todo_packed; 2027 2028 struct lightbar_params_v3 { 2029 /* 2030 * Number of LEDs reported by the EC. 2031 * May be less than the actual number of LEDs in the lightbar. 2032 */ 2033 uint8_t reported_led_num; 2034 } __ec_todo_packed; 2035 2036 /* Lightbar program. */ 2037 #define EC_LB_PROG_LEN 192 2038 struct lightbar_program { 2039 uint8_t size; 2040 uint8_t data[EC_LB_PROG_LEN]; 2041 } __ec_todo_unpacked; 2042 2043 /* 2044 * Lightbar program for large sequences. Sequences are sent in pieces, with 2045 * increasing offset. The sequences are still limited by the amount reserved in 2046 * EC RAM. 2047 */ 2048 struct lightbar_program_ex { 2049 uint8_t size; 2050 uint16_t offset; 2051 uint8_t data[]; 2052 } __ec_todo_packed; 2053 2054 struct ec_params_lightbar { 2055 uint8_t cmd; /* Command (see enum lightbar_command) */ 2056 union { 2057 /* 2058 * The following commands have no args: 2059 * 2060 * dump, off, on, init, get_seq, get_params_v0, get_params_v1, 2061 * version, get_brightness, get_demo, suspend, resume, 2062 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, 2063 * get_params_v2_bright, get_params_v2_thlds, 2064 * get_params_v2_colors 2065 * 2066 * Don't use an empty struct, because C++ hates that. 2067 */ 2068 2069 struct __ec_todo_unpacked { 2070 uint8_t num; 2071 } set_brightness, seq, demo; 2072 2073 struct __ec_todo_unpacked { 2074 uint8_t ctrl, reg, value; 2075 } reg; 2076 2077 struct __ec_todo_unpacked { 2078 uint8_t led, red, green, blue; 2079 } set_rgb; 2080 2081 struct __ec_todo_unpacked { 2082 uint8_t led; 2083 } get_rgb; 2084 2085 struct __ec_todo_unpacked { 2086 uint8_t enable; 2087 } manual_suspend_ctrl; 2088 2089 struct lightbar_params_v0 set_params_v0; 2090 struct lightbar_params_v1 set_params_v1; 2091 2092 struct lightbar_params_v2_timing set_v2par_timing; 2093 struct lightbar_params_v2_tap set_v2par_tap; 2094 struct lightbar_params_v2_oscillation set_v2par_osc; 2095 struct lightbar_params_v2_brightness set_v2par_bright; 2096 struct lightbar_params_v2_thresholds set_v2par_thlds; 2097 struct lightbar_params_v2_colors set_v2par_colors; 2098 2099 struct lightbar_program set_program; 2100 struct lightbar_program_ex set_program_ex; 2101 }; 2102 } __ec_todo_packed; 2103 2104 struct ec_response_lightbar { 2105 union { 2106 struct __ec_todo_unpacked { 2107 struct __ec_todo_unpacked { 2108 uint8_t reg; 2109 uint8_t ic0; 2110 uint8_t ic1; 2111 } vals[23]; 2112 } dump; 2113 2114 struct __ec_todo_unpacked { 2115 uint8_t num; 2116 } get_seq, get_brightness, get_demo; 2117 2118 struct lightbar_params_v0 get_params_v0; 2119 struct lightbar_params_v1 get_params_v1; 2120 2121 2122 struct lightbar_params_v2_timing get_params_v2_timing; 2123 struct lightbar_params_v2_tap get_params_v2_tap; 2124 struct lightbar_params_v2_oscillation get_params_v2_osc; 2125 struct lightbar_params_v2_brightness get_params_v2_bright; 2126 struct lightbar_params_v2_thresholds get_params_v2_thlds; 2127 struct lightbar_params_v2_colors get_params_v2_colors; 2128 2129 struct lightbar_params_v3 get_params_v3; 2130 2131 struct __ec_todo_unpacked { 2132 uint32_t num; 2133 uint32_t flags; 2134 } version; 2135 2136 struct __ec_todo_unpacked { 2137 uint8_t red, green, blue; 2138 } get_rgb; 2139 2140 /* 2141 * The following commands have no response: 2142 * 2143 * off, on, init, set_brightness, seq, reg, set_rgb, demo, 2144 * set_params_v0, set_params_v1, set_program, 2145 * manual_suspend_ctrl, suspend, resume, set_v2par_timing, 2146 * set_v2par_tap, set_v2par_osc, set_v2par_bright, 2147 * set_v2par_thlds, set_v2par_colors 2148 */ 2149 }; 2150 } __ec_todo_packed; 2151 2152 /* Lightbar commands */ 2153 enum lightbar_command { 2154 LIGHTBAR_CMD_DUMP = 0, 2155 LIGHTBAR_CMD_OFF = 1, 2156 LIGHTBAR_CMD_ON = 2, 2157 LIGHTBAR_CMD_INIT = 3, 2158 LIGHTBAR_CMD_SET_BRIGHTNESS = 4, 2159 LIGHTBAR_CMD_SEQ = 5, 2160 LIGHTBAR_CMD_REG = 6, 2161 LIGHTBAR_CMD_SET_RGB = 7, 2162 LIGHTBAR_CMD_GET_SEQ = 8, 2163 LIGHTBAR_CMD_DEMO = 9, 2164 LIGHTBAR_CMD_GET_PARAMS_V0 = 10, 2165 LIGHTBAR_CMD_SET_PARAMS_V0 = 11, 2166 LIGHTBAR_CMD_VERSION = 12, 2167 LIGHTBAR_CMD_GET_BRIGHTNESS = 13, 2168 LIGHTBAR_CMD_GET_RGB = 14, 2169 LIGHTBAR_CMD_GET_DEMO = 15, 2170 LIGHTBAR_CMD_GET_PARAMS_V1 = 16, 2171 LIGHTBAR_CMD_SET_PARAMS_V1 = 17, 2172 LIGHTBAR_CMD_SET_PROGRAM = 18, 2173 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 2174 LIGHTBAR_CMD_SUSPEND = 20, 2175 LIGHTBAR_CMD_RESUME = 21, 2176 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 2177 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 2178 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 2179 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 2180 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 2181 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 2182 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 2183 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 2184 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 2185 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 2186 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 2187 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 2188 LIGHTBAR_CMD_GET_PARAMS_V3 = 34, 2189 LIGHTBAR_CMD_SET_PROGRAM_EX = 35, 2190 LIGHTBAR_NUM_CMDS 2191 }; 2192 2193 /*****************************************************************************/ 2194 /* LED control commands */ 2195 2196 #define EC_CMD_LED_CONTROL 0x0029 2197 2198 enum ec_led_id { 2199 /* LED to indicate battery state of charge */ 2200 EC_LED_ID_BATTERY_LED = 0, 2201 /* 2202 * LED to indicate system power state (on or in suspend). 2203 * May be on power button or on C-panel. 2204 */ 2205 EC_LED_ID_POWER_LED, 2206 /* LED on power adapter or its plug */ 2207 EC_LED_ID_ADAPTER_LED, 2208 /* LED to indicate left side */ 2209 EC_LED_ID_LEFT_LED, 2210 /* LED to indicate right side */ 2211 EC_LED_ID_RIGHT_LED, 2212 /* LED to indicate recovery mode with HW_REINIT */ 2213 EC_LED_ID_RECOVERY_HW_REINIT_LED, 2214 /* LED to indicate sysrq debug mode. */ 2215 EC_LED_ID_SYSRQ_DEBUG_LED, 2216 2217 EC_LED_ID_COUNT 2218 }; 2219 2220 /* LED control flags */ 2221 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ 2222 #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ 2223 2224 enum ec_led_colors { 2225 EC_LED_COLOR_RED = 0, 2226 EC_LED_COLOR_GREEN, 2227 EC_LED_COLOR_BLUE, 2228 EC_LED_COLOR_YELLOW, 2229 EC_LED_COLOR_WHITE, 2230 EC_LED_COLOR_AMBER, 2231 2232 EC_LED_COLOR_COUNT 2233 }; 2234 2235 struct ec_params_led_control { 2236 uint8_t led_id; /* Which LED to control */ 2237 uint8_t flags; /* Control flags */ 2238 2239 uint8_t brightness[EC_LED_COLOR_COUNT]; 2240 } __ec_align1; 2241 2242 struct ec_response_led_control { 2243 /* 2244 * Available brightness value range. 2245 * 2246 * Range 0 means color channel not present. 2247 * Range 1 means on/off control. 2248 * Other values means the LED is control by PWM. 2249 */ 2250 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 2251 } __ec_align1; 2252 2253 /*****************************************************************************/ 2254 /* Verified boot commands */ 2255 2256 /* 2257 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 2258 * reused for other purposes with version > 0. 2259 */ 2260 2261 /* Verified boot hash command */ 2262 #define EC_CMD_VBOOT_HASH 0x002A 2263 2264 struct ec_params_vboot_hash { 2265 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 2266 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2267 uint8_t nonce_size; /* Nonce size; may be 0 */ 2268 uint8_t reserved0; /* Reserved; set 0 */ 2269 uint32_t offset; /* Offset in flash to hash */ 2270 uint32_t size; /* Number of bytes to hash */ 2271 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 2272 } __ec_align4; 2273 2274 struct ec_response_vboot_hash { 2275 uint8_t status; /* enum ec_vboot_hash_status */ 2276 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2277 uint8_t digest_size; /* Size of hash digest in bytes */ 2278 uint8_t reserved0; /* Ignore; will be 0 */ 2279 uint32_t offset; /* Offset in flash which was hashed */ 2280 uint32_t size; /* Number of bytes hashed */ 2281 uint8_t hash_digest[64]; /* Hash digest data */ 2282 } __ec_align4; 2283 2284 enum ec_vboot_hash_cmd { 2285 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 2286 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 2287 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 2288 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 2289 }; 2290 2291 enum ec_vboot_hash_type { 2292 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 2293 }; 2294 2295 enum ec_vboot_hash_status { 2296 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 2297 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 2298 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 2299 }; 2300 2301 /* 2302 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 2303 * If one of these is specified, the EC will automatically update offset and 2304 * size to the correct values for the specified image (RO or RW). 2305 */ 2306 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 2307 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 2308 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 2309 2310 /* 2311 * 'RW' is vague if there are multiple RW images; we mean the active one, 2312 * so the old constant is deprecated. 2313 */ 2314 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE 2315 2316 /*****************************************************************************/ 2317 /* 2318 * Motion sense commands. We'll make separate structs for sub-commands with 2319 * different input args, so that we know how much to expect. 2320 */ 2321 #define EC_CMD_MOTION_SENSE_CMD 0x002B 2322 2323 /* Motion sense commands */ 2324 enum motionsense_command { 2325 /* 2326 * Dump command returns all motion sensor data including motion sense 2327 * module flags and individual sensor flags. 2328 */ 2329 MOTIONSENSE_CMD_DUMP = 0, 2330 2331 /* 2332 * Info command returns data describing the details of a given sensor, 2333 * including enum motionsensor_type, enum motionsensor_location, and 2334 * enum motionsensor_chip. 2335 */ 2336 MOTIONSENSE_CMD_INFO = 1, 2337 2338 /* 2339 * EC Rate command is a setter/getter command for the EC sampling rate 2340 * in milliseconds. 2341 * It is per sensor, the EC run sample task at the minimum of all 2342 * sensors EC_RATE. 2343 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 2344 * to collect all the sensor samples. 2345 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 2346 * to process of all motion sensors in milliseconds. 2347 */ 2348 MOTIONSENSE_CMD_EC_RATE = 2, 2349 2350 /* 2351 * Sensor ODR command is a setter/getter command for the output data 2352 * rate of a specific motion sensor in millihertz. 2353 */ 2354 MOTIONSENSE_CMD_SENSOR_ODR = 3, 2355 2356 /* 2357 * Sensor range command is a setter/getter command for the range of 2358 * a specified motion sensor in +/-G's or +/- deg/s. 2359 */ 2360 MOTIONSENSE_CMD_SENSOR_RANGE = 4, 2361 2362 /* 2363 * Setter/getter command for the keyboard wake angle. When the lid 2364 * angle is greater than this value, keyboard wake is disabled in S3, 2365 * and when the lid angle goes less than this value, keyboard wake is 2366 * enabled. Note, the lid angle measurement is an approximate, 2367 * un-calibrated value, hence the wake angle isn't exact. 2368 */ 2369 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, 2370 2371 /* 2372 * Returns a single sensor data. 2373 */ 2374 MOTIONSENSE_CMD_DATA = 6, 2375 2376 /* 2377 * Return sensor fifo info. 2378 */ 2379 MOTIONSENSE_CMD_FIFO_INFO = 7, 2380 2381 /* 2382 * Insert a flush element in the fifo and return sensor fifo info. 2383 * The host can use that element to synchronize its operation. 2384 */ 2385 MOTIONSENSE_CMD_FIFO_FLUSH = 8, 2386 2387 /* 2388 * Return a portion of the fifo. 2389 */ 2390 MOTIONSENSE_CMD_FIFO_READ = 9, 2391 2392 /* 2393 * Perform low level calibration. 2394 * On sensors that support it, ask to do offset calibration. 2395 */ 2396 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2397 2398 /* 2399 * Sensor Offset command is a setter/getter command for the offset 2400 * used for calibration. 2401 * The offsets can be calculated by the host, or via 2402 * PERFORM_CALIB command. 2403 */ 2404 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2405 2406 /* 2407 * List available activities for a MOTION sensor. 2408 * Indicates if they are enabled or disabled. 2409 */ 2410 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2411 2412 /* 2413 * Activity management 2414 * Enable/Disable activity recognition. 2415 */ 2416 MOTIONSENSE_CMD_SET_ACTIVITY = 13, 2417 2418 /* 2419 * Lid Angle 2420 */ 2421 MOTIONSENSE_CMD_LID_ANGLE = 14, 2422 2423 /* 2424 * Allow the FIFO to trigger interrupt via MKBP events. 2425 * By default the FIFO does not send interrupt to process the FIFO 2426 * until the AP is ready or it is coming from a wakeup sensor. 2427 */ 2428 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 2429 2430 /* 2431 * Spoof the readings of the sensors. The spoofed readings can be set 2432 * to arbitrary values, or will lock to the last read actual values. 2433 */ 2434 MOTIONSENSE_CMD_SPOOF = 16, 2435 2436 /* Set lid angle for tablet mode detection. */ 2437 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, 2438 2439 /* 2440 * Sensor Scale command is a setter/getter command for the calibration 2441 * scale. 2442 */ 2443 MOTIONSENSE_CMD_SENSOR_SCALE = 18, 2444 2445 /* 2446 * Activity management 2447 * Retrieve current status of given activity. 2448 */ 2449 MOTIONSENSE_CMD_GET_ACTIVITY = 20, 2450 2451 /* Number of motionsense sub-commands. */ 2452 MOTIONSENSE_NUM_CMDS 2453 }; 2454 2455 /* List of motion sensor types. */ 2456 enum motionsensor_type { 2457 MOTIONSENSE_TYPE_ACCEL = 0, 2458 MOTIONSENSE_TYPE_GYRO = 1, 2459 MOTIONSENSE_TYPE_MAG = 2, 2460 MOTIONSENSE_TYPE_PROX = 3, 2461 MOTIONSENSE_TYPE_LIGHT = 4, 2462 MOTIONSENSE_TYPE_ACTIVITY = 5, 2463 MOTIONSENSE_TYPE_BARO = 6, 2464 MOTIONSENSE_TYPE_SYNC = 7, 2465 MOTIONSENSE_TYPE_MAX, 2466 }; 2467 2468 /* List of motion sensor locations. */ 2469 enum motionsensor_location { 2470 MOTIONSENSE_LOC_BASE = 0, 2471 MOTIONSENSE_LOC_LID = 1, 2472 MOTIONSENSE_LOC_CAMERA = 2, 2473 MOTIONSENSE_LOC_MAX, 2474 }; 2475 2476 /* List of motion sensor chips. */ 2477 enum motionsensor_chip { 2478 MOTIONSENSE_CHIP_KXCJ9 = 0, 2479 MOTIONSENSE_CHIP_LSM6DS0 = 1, 2480 MOTIONSENSE_CHIP_BMI160 = 2, 2481 MOTIONSENSE_CHIP_SI1141 = 3, 2482 MOTIONSENSE_CHIP_SI1142 = 4, 2483 MOTIONSENSE_CHIP_SI1143 = 5, 2484 MOTIONSENSE_CHIP_KX022 = 6, 2485 MOTIONSENSE_CHIP_L3GD20H = 7, 2486 MOTIONSENSE_CHIP_BMA255 = 8, 2487 MOTIONSENSE_CHIP_BMP280 = 9, 2488 MOTIONSENSE_CHIP_OPT3001 = 10, 2489 MOTIONSENSE_CHIP_BH1730 = 11, 2490 MOTIONSENSE_CHIP_GPIO = 12, 2491 MOTIONSENSE_CHIP_LIS2DH = 13, 2492 MOTIONSENSE_CHIP_LSM6DSM = 14, 2493 MOTIONSENSE_CHIP_LIS2DE = 15, 2494 MOTIONSENSE_CHIP_LIS2MDL = 16, 2495 MOTIONSENSE_CHIP_LSM6DS3 = 17, 2496 MOTIONSENSE_CHIP_LSM6DSO = 18, 2497 MOTIONSENSE_CHIP_LNG2DM = 19, 2498 MOTIONSENSE_CHIP_MAX, 2499 }; 2500 2501 /* List of orientation positions */ 2502 enum motionsensor_orientation { 2503 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, 2504 MOTIONSENSE_ORIENTATION_PORTRAIT = 1, 2505 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, 2506 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, 2507 MOTIONSENSE_ORIENTATION_UNKNOWN = 4, 2508 }; 2509 2510 struct ec_response_activity_data { 2511 uint8_t activity; /* motionsensor_activity */ 2512 uint8_t state; 2513 } __ec_todo_packed; 2514 2515 struct ec_response_motion_sensor_data { 2516 /* Flags for each sensor. */ 2517 uint8_t flags; 2518 /* Sensor number the data comes from. */ 2519 uint8_t sensor_num; 2520 /* Each sensor is up to 3-axis. */ 2521 union { 2522 int16_t data[3]; 2523 struct __ec_todo_packed { 2524 uint16_t reserved; 2525 uint32_t timestamp; 2526 }; 2527 struct __ec_todo_unpacked { 2528 struct ec_response_activity_data activity_data; 2529 int16_t add_info[2]; 2530 }; 2531 }; 2532 } __ec_todo_packed; 2533 2534 /* Note: used in ec_response_get_next_data */ 2535 struct ec_response_motion_sense_fifo_info { 2536 /* Size of the fifo */ 2537 uint16_t size; 2538 /* Amount of space used in the fifo */ 2539 uint16_t count; 2540 /* Timestamp recorded in us. 2541 * aka accurate timestamp when host event was triggered. 2542 */ 2543 uint32_t timestamp; 2544 /* Total amount of vector lost */ 2545 uint16_t total_lost; 2546 /* Lost events since the last fifo_info, per sensors */ 2547 uint16_t lost[]; 2548 } __ec_todo_packed; 2549 2550 struct ec_response_motion_sense_fifo_data { 2551 uint32_t number_data; 2552 struct ec_response_motion_sensor_data data[]; 2553 } __ec_todo_packed; 2554 2555 /* List supported activity recognition */ 2556 enum motionsensor_activity { 2557 MOTIONSENSE_ACTIVITY_RESERVED = 0, 2558 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 2559 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 2560 MOTIONSENSE_ACTIVITY_ORIENTATION = 3, 2561 MOTIONSENSE_ACTIVITY_BODY_DETECTION = 4, 2562 }; 2563 2564 struct ec_motion_sense_activity { 2565 uint8_t sensor_num; 2566 uint8_t activity; /* one of enum motionsensor_activity */ 2567 uint8_t enable; /* 1: enable, 0: disable */ 2568 uint8_t reserved; 2569 uint16_t parameters[3]; /* activity dependent parameters */ 2570 } __ec_todo_unpacked; 2571 2572 /* Module flag masks used for the dump sub-command. */ 2573 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) 2574 2575 /* Sensor flag masks used for the dump sub-command. */ 2576 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) 2577 2578 /* 2579 * Flush entry for synchronization. 2580 * data contains time stamp 2581 */ 2582 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) 2583 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) 2584 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) 2585 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) 2586 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) 2587 2588 /* 2589 * Send this value for the data element to only perform a read. If you 2590 * send any other value, the EC will interpret it as data to set and will 2591 * return the actual value set. 2592 */ 2593 #define EC_MOTION_SENSE_NO_VALUE -1 2594 2595 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2596 2597 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2598 /* Set Calibration information */ 2599 #define MOTION_SENSE_SET_OFFSET BIT(0) 2600 2601 /* Default Scale value, factor 1. */ 2602 #define MOTION_SENSE_DEFAULT_SCALE BIT(15) 2603 2604 #define LID_ANGLE_UNRELIABLE 500 2605 2606 enum motionsense_spoof_mode { 2607 /* Disable spoof mode. */ 2608 MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 2609 2610 /* Enable spoof mode, but use provided component values. */ 2611 MOTIONSENSE_SPOOF_MODE_CUSTOM, 2612 2613 /* Enable spoof mode, but use the current sensor values. */ 2614 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 2615 2616 /* Query the current spoof mode status for the sensor. */ 2617 MOTIONSENSE_SPOOF_MODE_QUERY, 2618 }; 2619 2620 struct ec_params_motion_sense { 2621 uint8_t cmd; 2622 union { 2623 /* Used for MOTIONSENSE_CMD_DUMP. */ 2624 struct __ec_todo_unpacked { 2625 /* 2626 * Maximal number of sensor the host is expecting. 2627 * 0 means the host is only interested in the number 2628 * of sensors controlled by the EC. 2629 */ 2630 uint8_t max_sensor_count; 2631 } dump; 2632 2633 /* 2634 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2635 */ 2636 struct __ec_todo_unpacked { 2637 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 2638 * kb_wake_angle: angle to wakup AP. 2639 */ 2640 int16_t data; 2641 } kb_wake_angle; 2642 2643 /* 2644 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 2645 */ 2646 struct __ec_todo_unpacked { 2647 uint8_t sensor_num; 2648 } info, info_3, data, fifo_flush, list_activities; 2649 2650 /* 2651 * Used for MOTIONSENSE_CMD_PERFORM_CALIB: 2652 * Allow entering/exiting the calibration mode. 2653 */ 2654 struct __ec_todo_unpacked { 2655 uint8_t sensor_num; 2656 uint8_t enable; 2657 } perform_calib; 2658 /* 2659 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 2660 * and MOTIONSENSE_CMD_SENSOR_RANGE. 2661 */ 2662 struct __ec_todo_unpacked { 2663 uint8_t sensor_num; 2664 2665 /* Rounding flag, true for round-up, false for down. */ 2666 uint8_t roundup; 2667 2668 uint16_t reserved; 2669 2670 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2671 int32_t data; 2672 } ec_rate, sensor_odr, sensor_range; 2673 2674 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2675 struct __ec_todo_packed { 2676 uint8_t sensor_num; 2677 2678 /* 2679 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2680 * the calibration information in the EC. 2681 * If unset, just retrieve calibration information. 2682 */ 2683 uint16_t flags; 2684 2685 /* 2686 * Temperature at calibration, in units of 0.01 C 2687 * 0x8000: invalid / unknown. 2688 * 0x0: 0C 2689 * 0x7fff: +327.67C 2690 */ 2691 int16_t temp; 2692 2693 /* 2694 * Offset for calibration. 2695 * Unit: 2696 * Accelerometer: 1/1024 g 2697 * Gyro: 1/1024 deg/s 2698 * Compass: 1/16 uT 2699 */ 2700 int16_t offset[3]; 2701 } sensor_offset; 2702 2703 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2704 struct __ec_todo_packed { 2705 uint8_t sensor_num; 2706 2707 /* 2708 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2709 * the calibration information in the EC. 2710 * If unset, just retrieve calibration information. 2711 */ 2712 uint16_t flags; 2713 2714 /* 2715 * Temperature at calibration, in units of 0.01 C 2716 * 0x8000: invalid / unknown. 2717 * 0x0: 0C 2718 * 0x7fff: +327.67C 2719 */ 2720 int16_t temp; 2721 2722 /* 2723 * Scale for calibration: 2724 * By default scale is 1, it is encoded on 16bits: 2725 * 1 = BIT(15) 2726 * ~2 = 0xFFFF 2727 * ~0 = 0. 2728 */ 2729 uint16_t scale[3]; 2730 } sensor_scale; 2731 2732 2733 /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 2734 /* (no params) */ 2735 2736 /* Used for MOTIONSENSE_CMD_FIFO_READ */ 2737 struct __ec_todo_unpacked { 2738 /* 2739 * Number of expected vector to return. 2740 * EC may return less or 0 if none available. 2741 */ 2742 uint32_t max_data_vector; 2743 } fifo_read; 2744 2745 /* Used for MOTIONSENSE_CMD_SET_ACTIVITY */ 2746 struct ec_motion_sense_activity set_activity; 2747 2748 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2749 /* (no params) */ 2750 2751 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 2752 struct __ec_todo_unpacked { 2753 /* 2754 * 1: enable, 0 disable fifo, 2755 * EC_MOTION_SENSE_NO_VALUE return value. 2756 */ 2757 int8_t enable; 2758 } fifo_int_enable; 2759 2760 /* Used for MOTIONSENSE_CMD_SPOOF */ 2761 struct __ec_todo_packed { 2762 uint8_t sensor_id; 2763 2764 /* See enum motionsense_spoof_mode. */ 2765 uint8_t spoof_enable; 2766 2767 /* Ignored, used for alignment. */ 2768 uint8_t reserved; 2769 2770 /* Individual component values to spoof. */ 2771 int16_t components[3]; 2772 } spoof; 2773 2774 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2775 struct __ec_todo_unpacked { 2776 /* 2777 * Lid angle threshold for switching between tablet and 2778 * clamshell mode. 2779 */ 2780 int16_t lid_angle; 2781 2782 /* 2783 * Hysteresis degree to prevent fluctuations between 2784 * clamshell and tablet mode if lid angle keeps 2785 * changing around the threshold. Lid motion driver will 2786 * use lid_angle + hys_degree to trigger tablet mode and 2787 * lid_angle - hys_degree to trigger clamshell mode. 2788 */ 2789 int16_t hys_degree; 2790 } tablet_mode_threshold; 2791 2792 /* Used for MOTIONSENSE_CMD_GET_ACTIVITY */ 2793 struct __ec_todo_unpacked { 2794 uint8_t sensor_num; 2795 uint8_t activity; /* enum motionsensor_activity */ 2796 } get_activity; 2797 }; 2798 } __ec_todo_packed; 2799 2800 struct ec_response_motion_sense { 2801 union { 2802 /* Used for MOTIONSENSE_CMD_DUMP */ 2803 struct __ec_todo_unpacked { 2804 /* Flags representing the motion sensor module. */ 2805 uint8_t module_flags; 2806 2807 /* Number of sensors managed directly by the EC. */ 2808 uint8_t sensor_count; 2809 2810 /* 2811 * Sensor data is truncated if response_max is too small 2812 * for holding all the data. 2813 */ 2814 DECLARE_FLEX_ARRAY(struct ec_response_motion_sensor_data, sensor); 2815 } dump; 2816 2817 /* Used for MOTIONSENSE_CMD_INFO. */ 2818 struct __ec_todo_unpacked { 2819 /* Should be element of enum motionsensor_type. */ 2820 uint8_t type; 2821 2822 /* Should be element of enum motionsensor_location. */ 2823 uint8_t location; 2824 2825 /* Should be element of enum motionsensor_chip. */ 2826 uint8_t chip; 2827 } info; 2828 2829 /* Used for MOTIONSENSE_CMD_INFO version 3 */ 2830 struct __ec_todo_unpacked { 2831 /* Should be element of enum motionsensor_type. */ 2832 uint8_t type; 2833 2834 /* Should be element of enum motionsensor_location. */ 2835 uint8_t location; 2836 2837 /* Should be element of enum motionsensor_chip. */ 2838 uint8_t chip; 2839 2840 /* Minimum sensor sampling frequency */ 2841 uint32_t min_frequency; 2842 2843 /* Maximum sensor sampling frequency */ 2844 uint32_t max_frequency; 2845 2846 /* Max number of sensor events that could be in fifo */ 2847 uint32_t fifo_max_event_count; 2848 } info_3; 2849 2850 /* Used for MOTIONSENSE_CMD_DATA */ 2851 struct ec_response_motion_sensor_data data; 2852 2853 /* 2854 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2855 * MOTIONSENSE_CMD_SENSOR_RANGE, 2856 * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 2857 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 2858 * MOTIONSENSE_CMD_SPOOF. 2859 */ 2860 struct __ec_todo_unpacked { 2861 /* Current value of the parameter queried. */ 2862 int32_t ret; 2863 } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 2864 fifo_int_enable, spoof; 2865 2866 /* 2867 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, 2868 * PERFORM_CALIB. 2869 */ 2870 struct __ec_todo_unpacked { 2871 int16_t temp; 2872 int16_t offset[3]; 2873 } sensor_offset, perform_calib; 2874 2875 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2876 struct __ec_todo_unpacked { 2877 int16_t temp; 2878 uint16_t scale[3]; 2879 } sensor_scale; 2880 2881 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 2882 2883 struct ec_response_motion_sense_fifo_data fifo_read; 2884 2885 struct __ec_todo_packed { 2886 uint16_t reserved; 2887 uint32_t enabled; 2888 uint32_t disabled; 2889 } list_activities; 2890 2891 /* No params for set activity */ 2892 2893 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2894 struct __ec_todo_unpacked { 2895 /* 2896 * Angle between 0 and 360 degree if available, 2897 * LID_ANGLE_UNRELIABLE otherwise. 2898 */ 2899 uint16_t value; 2900 } lid_angle; 2901 2902 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2903 struct __ec_todo_unpacked { 2904 /* 2905 * Lid angle threshold for switching between tablet and 2906 * clamshell mode. 2907 */ 2908 uint16_t lid_angle; 2909 2910 /* Hysteresis degree. */ 2911 uint16_t hys_degree; 2912 } tablet_mode_threshold; 2913 2914 /* USED for MOTIONSENSE_CMD_GET_ACTIVITY. */ 2915 struct __ec_todo_unpacked { 2916 uint8_t state; 2917 } get_activity; 2918 }; 2919 } __ec_todo_packed; 2920 2921 /*****************************************************************************/ 2922 /* Force lid open command */ 2923 2924 /* Make lid event always open */ 2925 #define EC_CMD_FORCE_LID_OPEN 0x002C 2926 2927 struct ec_params_force_lid_open { 2928 uint8_t enabled; 2929 } __ec_align1; 2930 2931 /*****************************************************************************/ 2932 /* Configure the behavior of the power button */ 2933 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D 2934 2935 enum ec_config_power_button_flags { 2936 /* Enable/Disable power button pulses for x86 devices */ 2937 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), 2938 }; 2939 2940 struct ec_params_config_power_button { 2941 /* See enum ec_config_power_button_flags */ 2942 uint8_t flags; 2943 } __ec_align1; 2944 2945 /*****************************************************************************/ 2946 /* USB charging control commands */ 2947 2948 /* Set USB port charging mode */ 2949 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2950 2951 struct ec_params_usb_charge_set_mode { 2952 uint8_t usb_port_id; 2953 uint8_t mode:7; 2954 uint8_t inhibit_charge:1; 2955 } __ec_align1; 2956 2957 /*****************************************************************************/ 2958 /* Persistent storage for host */ 2959 2960 /* Maximum bytes that can be read/written in a single command */ 2961 #define EC_PSTORE_SIZE_MAX 64 2962 2963 /* Get persistent storage info */ 2964 #define EC_CMD_PSTORE_INFO 0x0040 2965 2966 struct ec_response_pstore_info { 2967 /* Persistent storage size, in bytes */ 2968 uint32_t pstore_size; 2969 /* Access size; read/write offset and size must be a multiple of this */ 2970 uint32_t access_size; 2971 } __ec_align4; 2972 2973 /* 2974 * Read persistent storage 2975 * 2976 * Response is params.size bytes of data. 2977 */ 2978 #define EC_CMD_PSTORE_READ 0x0041 2979 2980 struct ec_params_pstore_read { 2981 uint32_t offset; /* Byte offset to read */ 2982 uint32_t size; /* Size to read in bytes */ 2983 } __ec_align4; 2984 2985 /* Write persistent storage */ 2986 #define EC_CMD_PSTORE_WRITE 0x0042 2987 2988 struct ec_params_pstore_write { 2989 uint32_t offset; /* Byte offset to write */ 2990 uint32_t size; /* Size to write in bytes */ 2991 uint8_t data[EC_PSTORE_SIZE_MAX]; 2992 } __ec_align4; 2993 2994 /*****************************************************************************/ 2995 /* Real-time clock */ 2996 2997 /* RTC params and response structures */ 2998 struct ec_params_rtc { 2999 uint32_t time; 3000 } __ec_align4; 3001 3002 struct ec_response_rtc { 3003 uint32_t time; 3004 } __ec_align4; 3005 3006 /* These use ec_response_rtc */ 3007 #define EC_CMD_RTC_GET_VALUE 0x0044 3008 #define EC_CMD_RTC_GET_ALARM 0x0045 3009 3010 /* These all use ec_params_rtc */ 3011 #define EC_CMD_RTC_SET_VALUE 0x0046 3012 #define EC_CMD_RTC_SET_ALARM 0x0047 3013 3014 /* Pass as time param to SET_ALARM to clear the current alarm */ 3015 #define EC_RTC_ALARM_CLEAR 0 3016 3017 /*****************************************************************************/ 3018 /* Port80 log access */ 3019 3020 /* Maximum entries that can be read/written in a single command */ 3021 #define EC_PORT80_SIZE_MAX 32 3022 3023 /* Get last port80 code from previous boot */ 3024 #define EC_CMD_PORT80_LAST_BOOT 0x0048 3025 #define EC_CMD_PORT80_READ 0x0048 3026 3027 enum ec_port80_subcmd { 3028 EC_PORT80_GET_INFO = 0, 3029 EC_PORT80_READ_BUFFER, 3030 }; 3031 3032 struct ec_params_port80_read { 3033 uint16_t subcmd; 3034 union { 3035 struct __ec_todo_unpacked { 3036 uint32_t offset; 3037 uint32_t num_entries; 3038 } read_buffer; 3039 }; 3040 } __ec_todo_packed; 3041 3042 struct ec_response_port80_read { 3043 union { 3044 struct __ec_todo_unpacked { 3045 uint32_t writes; 3046 uint32_t history_size; 3047 uint32_t last_boot; 3048 } get_info; 3049 struct __ec_todo_unpacked { 3050 uint16_t codes[EC_PORT80_SIZE_MAX]; 3051 } data; 3052 }; 3053 } __ec_todo_packed; 3054 3055 struct ec_response_port80_last_boot { 3056 uint16_t code; 3057 } __ec_align2; 3058 3059 /*****************************************************************************/ 3060 /* Temporary secure storage for host verified boot use */ 3061 3062 /* Number of bytes in a vstore slot */ 3063 #define EC_VSTORE_SLOT_SIZE 64 3064 3065 /* Maximum number of vstore slots */ 3066 #define EC_VSTORE_SLOT_MAX 32 3067 3068 /* Get persistent storage info */ 3069 #define EC_CMD_VSTORE_INFO 0x0049 3070 struct ec_response_vstore_info { 3071 /* Indicates which slots are locked */ 3072 uint32_t slot_locked; 3073 /* Total number of slots available */ 3074 uint8_t slot_count; 3075 } __ec_align_size1; 3076 3077 /* 3078 * Read temporary secure storage 3079 * 3080 * Response is EC_VSTORE_SLOT_SIZE bytes of data. 3081 */ 3082 #define EC_CMD_VSTORE_READ 0x004A 3083 3084 struct ec_params_vstore_read { 3085 uint8_t slot; /* Slot to read from */ 3086 } __ec_align1; 3087 3088 struct ec_response_vstore_read { 3089 uint8_t data[EC_VSTORE_SLOT_SIZE]; 3090 } __ec_align1; 3091 3092 /* 3093 * Write temporary secure storage and lock it. 3094 */ 3095 #define EC_CMD_VSTORE_WRITE 0x004B 3096 3097 struct ec_params_vstore_write { 3098 uint8_t slot; /* Slot to write to */ 3099 uint8_t data[EC_VSTORE_SLOT_SIZE]; 3100 } __ec_align1; 3101 3102 /*****************************************************************************/ 3103 /* Thermal engine commands. Note that there are two implementations. We'll 3104 * reuse the command number, but the data and behavior is incompatible. 3105 * Version 0 is what originally shipped on Link. 3106 * Version 1 separates the CPU thermal limits from the fan control. 3107 */ 3108 3109 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 3110 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 3111 3112 /* The version 0 structs are opaque. You have to know what they are for 3113 * the get/set commands to make any sense. 3114 */ 3115 3116 /* Version 0 - set */ 3117 struct ec_params_thermal_set_threshold { 3118 uint8_t sensor_type; 3119 uint8_t threshold_id; 3120 uint16_t value; 3121 } __ec_align2; 3122 3123 /* Version 0 - get */ 3124 struct ec_params_thermal_get_threshold { 3125 uint8_t sensor_type; 3126 uint8_t threshold_id; 3127 } __ec_align1; 3128 3129 struct ec_response_thermal_get_threshold { 3130 uint16_t value; 3131 } __ec_align2; 3132 3133 3134 /* The version 1 structs are visible. */ 3135 enum ec_temp_thresholds { 3136 EC_TEMP_THRESH_WARN = 0, 3137 EC_TEMP_THRESH_HIGH, 3138 EC_TEMP_THRESH_HALT, 3139 3140 EC_TEMP_THRESH_COUNT 3141 }; 3142 3143 /* 3144 * Thermal configuration for one temperature sensor. Temps are in degrees K. 3145 * Zero values will be silently ignored by the thermal task. 3146 * 3147 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree 3148 * hysteresis. 3149 * For example, 3150 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3151 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K 3152 * EC will throttle ap when temperature >= 301 K, and release throttling when 3153 * temperature <= 299 K. 3154 * 3155 * Set 'temp_host_release' value allows thermal task has a custom hysteresis. 3156 * For example, 3157 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3158 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K 3159 * EC will throttle ap when temperature >= 301 K, and release throttling when 3160 * temperature <= 294 K. 3161 * 3162 * Note that this structure is a sub-structure of 3163 * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 3164 */ 3165 struct ec_thermal_config { 3166 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 3167 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ 3168 uint32_t temp_fan_off; /* no active cooling needed */ 3169 uint32_t temp_fan_max; /* max active cooling needed */ 3170 } __ec_align4; 3171 3172 /* Version 1 - get config for one sensor. */ 3173 struct ec_params_thermal_get_threshold_v1 { 3174 uint32_t sensor_num; 3175 } __ec_align4; 3176 /* This returns a struct ec_thermal_config */ 3177 3178 /* 3179 * Version 1 - set config for one sensor. 3180 * Use read-modify-write for best results! 3181 */ 3182 struct ec_params_thermal_set_threshold_v1 { 3183 uint32_t sensor_num; 3184 struct ec_thermal_config cfg; 3185 } __ec_align4; 3186 /* This returns no data */ 3187 3188 /****************************************************************************/ 3189 3190 /* Set or get fan control mode */ 3191 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 3192 3193 enum ec_auto_fan_ctrl_cmd { 3194 EC_AUTO_FAN_CONTROL_CMD_SET = 0, 3195 EC_AUTO_FAN_CONTROL_CMD_GET, 3196 }; 3197 3198 /* Version 1 of input params */ 3199 struct ec_params_auto_fan_ctrl_v1 { 3200 uint8_t fan_idx; 3201 } __ec_align1; 3202 3203 /* Version 2 of input params */ 3204 struct ec_params_auto_fan_ctrl_v2 { 3205 uint8_t fan_idx; 3206 uint8_t cmd; /* enum ec_auto_fan_ctrl_cmd */ 3207 uint8_t set_auto; /* only used with EC_AUTO_FAN_CONTROL_CMD_SET - bool 3208 */ 3209 } __ec_align4; 3210 3211 struct ec_response_auto_fan_control { 3212 uint8_t is_auto; /* bool */ 3213 } __ec_align1; 3214 3215 /* Get/Set TMP006 calibration data */ 3216 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 3217 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 3218 3219 /* 3220 * The original TMP006 calibration only needed four params, but now we need 3221 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 3222 * the params opaque. The v1 "get" response will include the algorithm number 3223 * and how many params it requires. That way we can change the EC code without 3224 * needing to update this file. We can also use a different algorithm on each 3225 * sensor. 3226 */ 3227 3228 /* This is the same struct for both v0 and v1. */ 3229 struct ec_params_tmp006_get_calibration { 3230 uint8_t index; 3231 } __ec_align1; 3232 3233 /* Version 0 */ 3234 struct ec_response_tmp006_get_calibration_v0 { 3235 float s0; 3236 float b0; 3237 float b1; 3238 float b2; 3239 } __ec_align4; 3240 3241 struct ec_params_tmp006_set_calibration_v0 { 3242 uint8_t index; 3243 uint8_t reserved[3]; 3244 float s0; 3245 float b0; 3246 float b1; 3247 float b2; 3248 } __ec_align4; 3249 3250 /* Version 1 */ 3251 struct ec_response_tmp006_get_calibration_v1 { 3252 uint8_t algorithm; 3253 uint8_t num_params; 3254 uint8_t reserved[2]; 3255 float val[]; 3256 } __ec_align4; 3257 3258 struct ec_params_tmp006_set_calibration_v1 { 3259 uint8_t index; 3260 uint8_t algorithm; 3261 uint8_t num_params; 3262 uint8_t reserved; 3263 float val[]; 3264 } __ec_align4; 3265 3266 3267 /* Read raw TMP006 data */ 3268 #define EC_CMD_TMP006_GET_RAW 0x0055 3269 3270 struct ec_params_tmp006_get_raw { 3271 uint8_t index; 3272 } __ec_align1; 3273 3274 struct ec_response_tmp006_get_raw { 3275 int32_t t; /* In 1/100 K */ 3276 int32_t v; /* In nV */ 3277 } __ec_align4; 3278 3279 /*****************************************************************************/ 3280 /* MKBP - Matrix KeyBoard Protocol */ 3281 3282 /* 3283 * Read key state 3284 * 3285 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for 3286 * expected response size. 3287 * 3288 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish 3289 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 3290 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 3291 */ 3292 #define EC_CMD_MKBP_STATE 0x0060 3293 3294 /* 3295 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 3296 */ 3297 #define EC_CMD_MKBP_INFO 0x0061 3298 3299 struct ec_response_mkbp_info { 3300 uint32_t rows; 3301 uint32_t cols; 3302 /* Formerly "switches", which was 0. */ 3303 uint8_t reserved; 3304 } __ec_align_size1; 3305 3306 struct ec_params_mkbp_info { 3307 uint8_t info_type; 3308 uint8_t event_type; 3309 } __ec_align1; 3310 3311 enum ec_mkbp_info_type { 3312 /* 3313 * Info about the keyboard matrix: number of rows and columns. 3314 * 3315 * Returns struct ec_response_mkbp_info. 3316 */ 3317 EC_MKBP_INFO_KBD = 0, 3318 3319 /* 3320 * For buttons and switches, info about which specifically are 3321 * supported. event_type must be set to one of the values in enum 3322 * ec_mkbp_event. 3323 * 3324 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte 3325 * bitmask indicating which buttons or switches are present. See the 3326 * bit inidices below. 3327 */ 3328 EC_MKBP_INFO_SUPPORTED = 1, 3329 3330 /* 3331 * Instantaneous state of buttons and switches. 3332 * 3333 * event_type must be set to one of the values in enum ec_mkbp_event. 3334 * 3335 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] 3336 * indicating the current state of the keyboard matrix. 3337 * 3338 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw 3339 * event state. 3340 * 3341 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the 3342 * state of supported buttons. 3343 * 3344 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the 3345 * state of supported switches. 3346 */ 3347 EC_MKBP_INFO_CURRENT = 2, 3348 }; 3349 3350 /* Simulate key press */ 3351 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 3352 3353 struct ec_params_mkbp_simulate_key { 3354 uint8_t col; 3355 uint8_t row; 3356 uint8_t pressed; 3357 } __ec_align1; 3358 3359 #define EC_CMD_GET_KEYBOARD_ID 0x0063 3360 3361 struct ec_response_keyboard_id { 3362 uint32_t keyboard_id; 3363 } __ec_align4; 3364 3365 enum keyboard_id { 3366 KEYBOARD_ID_UNSUPPORTED = 0, 3367 KEYBOARD_ID_UNREADABLE = 0xffffffff, 3368 }; 3369 3370 /* Configure keyboard scanning */ 3371 #define EC_CMD_MKBP_SET_CONFIG 0x0064 3372 #define EC_CMD_MKBP_GET_CONFIG 0x0065 3373 3374 /* flags */ 3375 enum mkbp_config_flags { 3376 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 3377 }; 3378 3379 enum mkbp_config_valid { 3380 EC_MKBP_VALID_SCAN_PERIOD = BIT(0), 3381 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), 3382 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), 3383 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), 3384 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), 3385 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), 3386 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), 3387 }; 3388 3389 /* 3390 * Configuration for our key scanning algorithm. 3391 * 3392 * Note that this is used as a sub-structure of 3393 * ec_{params/response}_mkbp_get_config. 3394 */ 3395 struct ec_mkbp_config { 3396 uint32_t valid_mask; /* valid fields */ 3397 uint8_t flags; /* some flags (enum mkbp_config_flags) */ 3398 uint8_t valid_flags; /* which flags are valid */ 3399 uint16_t scan_period_us; /* period between start of scans */ 3400 /* revert to interrupt mode after no activity for this long */ 3401 uint32_t poll_timeout_us; 3402 /* 3403 * minimum post-scan relax time. Once we finish a scan we check 3404 * the time until we are due to start the next one. If this time is 3405 * shorter this field, we use this instead. 3406 */ 3407 uint16_t min_post_scan_delay_us; 3408 /* delay between setting up output and waiting for it to settle */ 3409 uint16_t output_settle_us; 3410 uint16_t debounce_down_us; /* time for debounce on key down */ 3411 uint16_t debounce_up_us; /* time for debounce on key up */ 3412 /* maximum depth to allow for fifo (0 = no keyscan output) */ 3413 uint8_t fifo_max_depth; 3414 } __ec_align_size1; 3415 3416 struct ec_params_mkbp_set_config { 3417 struct ec_mkbp_config config; 3418 } __ec_align_size1; 3419 3420 struct ec_response_mkbp_get_config { 3421 struct ec_mkbp_config config; 3422 } __ec_align_size1; 3423 3424 /* Run the key scan emulation */ 3425 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 3426 3427 enum ec_keyscan_seq_cmd { 3428 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 3429 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 3430 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 3431 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 3432 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 3433 }; 3434 3435 enum ec_collect_flags { 3436 /* 3437 * Indicates this scan was processed by the EC. Due to timing, some 3438 * scans may be skipped. 3439 */ 3440 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), 3441 }; 3442 3443 struct ec_collect_item { 3444 uint8_t flags; /* some flags (enum ec_collect_flags) */ 3445 } __ec_align1; 3446 3447 struct ec_params_keyscan_seq_ctrl { 3448 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 3449 union { 3450 struct __ec_align1 { 3451 uint8_t active; /* still active */ 3452 uint8_t num_items; /* number of items */ 3453 /* Current item being presented */ 3454 uint8_t cur_item; 3455 } status; 3456 struct __ec_todo_unpacked { 3457 /* 3458 * Absolute time for this scan, measured from the 3459 * start of the sequence. 3460 */ 3461 uint32_t time_us; 3462 uint8_t scan[0]; /* keyscan data */ 3463 } add; 3464 struct __ec_align1 { 3465 uint8_t start_item; /* First item to return */ 3466 uint8_t num_items; /* Number of items to return */ 3467 } collect; 3468 }; 3469 } __ec_todo_packed; 3470 3471 struct ec_result_keyscan_seq_ctrl { 3472 union { 3473 struct __ec_todo_unpacked { 3474 uint8_t num_items; /* Number of items */ 3475 /* Data for each item */ 3476 struct ec_collect_item item[0]; 3477 } collect; 3478 }; 3479 } __ec_todo_packed; 3480 3481 /* 3482 * Get the next pending MKBP event. 3483 * 3484 * Returns EC_RES_UNAVAILABLE if there is no event pending. 3485 */ 3486 #define EC_CMD_GET_NEXT_EVENT 0x0067 3487 3488 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 3489 3490 /* 3491 * We use the most significant bit of the event type to indicate to the host 3492 * that the EC has more MKBP events available to provide. 3493 */ 3494 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) 3495 3496 /* The mask to apply to get the raw event type */ 3497 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) 3498 3499 enum ec_mkbp_event { 3500 /* Keyboard matrix changed. The event data is the new matrix state. */ 3501 EC_MKBP_EVENT_KEY_MATRIX = 0, 3502 3503 /* New host event. The event data is 4 bytes of host event flags. */ 3504 EC_MKBP_EVENT_HOST_EVENT = 1, 3505 3506 /* New Sensor FIFO data. The event data is fifo_info structure. */ 3507 EC_MKBP_EVENT_SENSOR_FIFO = 2, 3508 3509 /* The state of the non-matrixed buttons have changed. */ 3510 EC_MKBP_EVENT_BUTTON = 3, 3511 3512 /* The state of the switches have changed. */ 3513 EC_MKBP_EVENT_SWITCH = 4, 3514 3515 /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 3516 EC_MKBP_EVENT_FINGERPRINT = 5, 3517 3518 /* 3519 * Sysrq event: send emulated sysrq. The event data is sysrq, 3520 * corresponding to the key to be pressed. 3521 */ 3522 EC_MKBP_EVENT_SYSRQ = 6, 3523 3524 /* 3525 * New 64-bit host event. 3526 * The event data is 8 bytes of host event flags. 3527 */ 3528 EC_MKBP_EVENT_HOST_EVENT64 = 7, 3529 3530 /* Notify the AP that something happened on CEC */ 3531 EC_MKBP_EVENT_CEC_EVENT = 8, 3532 3533 /* Send an incoming CEC message to the AP */ 3534 EC_MKBP_EVENT_CEC_MESSAGE = 9, 3535 3536 /* Peripheral device charger event */ 3537 EC_MKBP_EVENT_PCHG = 12, 3538 3539 /* Power monitor telemetry event */ 3540 EC_MKBP_EVENT_PWRMON = 13, 3541 3542 /* Number of MKBP events */ 3543 EC_MKBP_EVENT_COUNT, 3544 }; 3545 BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); 3546 3547 union __ec_align_offset1 ec_response_get_next_data { 3548 uint8_t key_matrix[13]; 3549 3550 /* Unaligned */ 3551 uint32_t host_event; 3552 uint64_t host_event64; 3553 3554 struct __ec_todo_unpacked { 3555 /* For aligning the fifo_info */ 3556 uint8_t reserved[3]; 3557 struct ec_response_motion_sense_fifo_info info; 3558 } sensor_fifo; 3559 3560 uint32_t buttons; 3561 3562 uint32_t switches; 3563 3564 uint32_t fp_events; 3565 3566 uint32_t sysrq; 3567 3568 /* CEC events from enum mkbp_cec_event */ 3569 uint32_t cec_events; 3570 }; 3571 3572 union __ec_align_offset1 ec_response_get_next_data_v1 { 3573 uint8_t key_matrix[16]; 3574 3575 /* Unaligned */ 3576 uint32_t host_event; 3577 uint64_t host_event64; 3578 3579 struct __ec_todo_unpacked { 3580 /* For aligning the fifo_info */ 3581 uint8_t reserved[3]; 3582 struct ec_response_motion_sense_fifo_info info; 3583 } sensor_fifo; 3584 3585 uint32_t buttons; 3586 3587 uint32_t switches; 3588 3589 uint32_t fp_events; 3590 3591 uint32_t sysrq; 3592 3593 /* CEC events from enum mkbp_cec_event */ 3594 uint32_t cec_events; 3595 3596 uint8_t cec_message[16]; 3597 }; 3598 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); 3599 3600 union __ec_align_offset1 ec_response_get_next_data_v3 { 3601 uint8_t key_matrix[18]; 3602 3603 /* Unaligned */ 3604 uint32_t host_event; 3605 uint64_t host_event64; 3606 3607 struct __ec_todo_unpacked { 3608 /* For aligning the fifo_info */ 3609 uint8_t reserved[3]; 3610 struct ec_response_motion_sense_fifo_info info; 3611 } sensor_fifo; 3612 3613 uint32_t buttons; 3614 3615 uint32_t switches; 3616 3617 uint32_t fp_events; 3618 3619 uint32_t sysrq; 3620 3621 /* CEC events from enum mkbp_cec_event */ 3622 uint32_t cec_events; 3623 3624 uint8_t cec_message[16]; 3625 3626 struct __ec_todo_packed { 3627 int64_t value; 3628 uint32_t samples; 3629 uint8_t channel_id; 3630 } pwrmon_data; 3631 }; 3632 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v3) == 18); 3633 3634 struct ec_response_get_next_event { 3635 uint8_t event_type; 3636 /* Followed by event data if any */ 3637 union ec_response_get_next_data data; 3638 } __ec_align1; 3639 3640 struct ec_response_get_next_event_v1 { 3641 uint8_t event_type; 3642 /* Followed by event data if any */ 3643 union ec_response_get_next_data_v1 data; 3644 } __ec_align1; 3645 3646 struct ec_response_get_next_event_v3 { 3647 uint8_t event_type; 3648 /* Followed by event data if any */ 3649 union ec_response_get_next_data_v3 data; 3650 } __ec_align1; 3651 3652 /* Bit indices for buttons and switches.*/ 3653 /* Buttons */ 3654 #define EC_MKBP_POWER_BUTTON 0 3655 #define EC_MKBP_VOL_UP 1 3656 #define EC_MKBP_VOL_DOWN 2 3657 #define EC_MKBP_RECOVERY 3 3658 #define EC_MKBP_BRI_UP 4 3659 #define EC_MKBP_BRI_DOWN 5 3660 #define EC_MKBP_SCREEN_LOCK 6 3661 3662 /* Switches */ 3663 #define EC_MKBP_LID_OPEN 0 3664 #define EC_MKBP_TABLET_MODE 1 3665 #define EC_MKBP_BASE_ATTACHED 2 3666 #define EC_MKBP_FRONT_PROXIMITY 3 3667 3668 /* Run keyboard factory test scanning */ 3669 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 3670 3671 struct ec_response_keyboard_factory_test { 3672 uint16_t shorted; /* Keyboard pins are shorted */ 3673 } __ec_align2; 3674 3675 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 3676 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 3677 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) 3678 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 3679 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ 3680 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) 3681 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 3682 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 3683 #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ 3684 >> EC_MKBP_FP_MATCH_IDX_OFFSET) 3685 #define EC_MKBP_FP_ENROLL BIT(27) 3686 #define EC_MKBP_FP_MATCH BIT(28) 3687 #define EC_MKBP_FP_FINGER_DOWN BIT(29) 3688 #define EC_MKBP_FP_FINGER_UP BIT(30) 3689 #define EC_MKBP_FP_IMAGE_READY BIT(31) 3690 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ 3691 #define EC_MKBP_FP_ERR_ENROLL_OK 0 3692 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 3693 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 3694 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 3695 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 3696 /* Can be used to detect if image was usable for enrollment or not. */ 3697 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 3698 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ 3699 #define EC_MKBP_FP_ERR_MATCH_NO 0 3700 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 3701 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 3702 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 3703 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 3704 #define EC_MKBP_FP_ERR_MATCH_YES 1 3705 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 3706 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 3707 3708 3709 /*****************************************************************************/ 3710 /* Temperature sensor commands */ 3711 3712 /* Read temperature sensor info */ 3713 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3714 3715 struct ec_params_temp_sensor_get_info { 3716 uint8_t id; 3717 } __ec_align1; 3718 3719 struct ec_response_temp_sensor_get_info { 3720 char sensor_name[32]; 3721 uint8_t sensor_type; 3722 } __ec_align1; 3723 3724 /*****************************************************************************/ 3725 3726 /* 3727 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 3728 * commands accidentally sent to the wrong interface. See the ACPI section 3729 * below. 3730 */ 3731 3732 /*****************************************************************************/ 3733 /* Host event commands */ 3734 3735 3736 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ 3737 /* 3738 * Host event mask params and response structures, shared by all of the host 3739 * event commands below. 3740 */ 3741 struct ec_params_host_event_mask { 3742 uint32_t mask; 3743 } __ec_align4; 3744 3745 struct ec_response_host_event_mask { 3746 uint32_t mask; 3747 } __ec_align4; 3748 3749 /* These all use ec_response_host_event_mask */ 3750 #define EC_CMD_HOST_EVENT_GET_B 0x0087 3751 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 3752 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 3753 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3754 3755 /* These all use ec_params_host_event_mask */ 3756 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 3757 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 3758 #define EC_CMD_HOST_EVENT_CLEAR 0x008C 3759 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 3760 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 3761 3762 /* 3763 * Unified host event programming interface - Should be used by newer versions 3764 * of BIOS/OS to program host events and masks 3765 */ 3766 3767 struct ec_params_host_event { 3768 3769 /* Action requested by host - one of enum ec_host_event_action. */ 3770 uint8_t action; 3771 3772 /* 3773 * Mask type that the host requested the action on - one of 3774 * enum ec_host_event_mask_type. 3775 */ 3776 uint8_t mask_type; 3777 3778 /* Set to 0, ignore on read */ 3779 uint16_t reserved; 3780 3781 /* Value to be used in case of set operations. */ 3782 uint64_t value; 3783 } __ec_align4; 3784 3785 /* 3786 * Response structure returned by EC_CMD_HOST_EVENT. 3787 * Update the value on a GET request. Set to 0 on GET/CLEAR 3788 */ 3789 3790 struct ec_response_host_event { 3791 3792 /* Mask value in case of get operation */ 3793 uint64_t value; 3794 } __ec_align4; 3795 3796 enum ec_host_event_action { 3797 /* 3798 * params.value is ignored. Value of mask_type populated 3799 * in response.value 3800 */ 3801 EC_HOST_EVENT_GET, 3802 3803 /* Bits in params.value are set */ 3804 EC_HOST_EVENT_SET, 3805 3806 /* Bits in params.value are cleared */ 3807 EC_HOST_EVENT_CLEAR, 3808 }; 3809 3810 enum ec_host_event_mask_type { 3811 3812 /* Main host event copy */ 3813 EC_HOST_EVENT_MAIN, 3814 3815 /* Copy B of host events */ 3816 EC_HOST_EVENT_B, 3817 3818 /* SCI Mask */ 3819 EC_HOST_EVENT_SCI_MASK, 3820 3821 /* SMI Mask */ 3822 EC_HOST_EVENT_SMI_MASK, 3823 3824 /* Mask of events that should be always reported in hostevents */ 3825 EC_HOST_EVENT_ALWAYS_REPORT_MASK, 3826 3827 /* Active wake mask */ 3828 EC_HOST_EVENT_ACTIVE_WAKE_MASK, 3829 3830 /* Lazy wake mask for S0ix */ 3831 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 3832 3833 /* Lazy wake mask for S3 */ 3834 EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 3835 3836 /* Lazy wake mask for S5 */ 3837 EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 3838 }; 3839 3840 #define EC_CMD_HOST_EVENT 0x00A4 3841 3842 /*****************************************************************************/ 3843 /* Switch commands */ 3844 3845 /* Enable/disable LCD backlight */ 3846 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3847 3848 struct ec_params_switch_enable_backlight { 3849 uint8_t enabled; 3850 } __ec_align1; 3851 3852 /* Enable/disable WLAN/Bluetooth */ 3853 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3854 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 3855 3856 /* Version 0 params; no response */ 3857 struct ec_params_switch_enable_wireless_v0 { 3858 uint8_t enabled; 3859 } __ec_align1; 3860 3861 /* Version 1 params */ 3862 struct ec_params_switch_enable_wireless_v1 { 3863 /* Flags to enable now */ 3864 uint8_t now_flags; 3865 3866 /* Which flags to copy from now_flags */ 3867 uint8_t now_mask; 3868 3869 /* 3870 * Flags to leave enabled in S3, if they're on at the S0->S3 3871 * transition. (Other flags will be disabled by the S0->S3 3872 * transition.) 3873 */ 3874 uint8_t suspend_flags; 3875 3876 /* Which flags to copy from suspend_flags */ 3877 uint8_t suspend_mask; 3878 } __ec_align1; 3879 3880 /* Version 1 response */ 3881 struct ec_response_switch_enable_wireless_v1 { 3882 /* Flags to enable now */ 3883 uint8_t now_flags; 3884 3885 /* Flags to leave enabled in S3 */ 3886 uint8_t suspend_flags; 3887 } __ec_align1; 3888 3889 /*****************************************************************************/ 3890 /* GPIO commands. Only available on EC if write protect has been disabled. */ 3891 3892 /* Set GPIO output value */ 3893 #define EC_CMD_GPIO_SET 0x0092 3894 3895 struct ec_params_gpio_set { 3896 char name[32]; 3897 uint8_t val; 3898 } __ec_align1; 3899 3900 /* Get GPIO value */ 3901 #define EC_CMD_GPIO_GET 0x0093 3902 3903 /* Version 0 of input params and response */ 3904 struct ec_params_gpio_get { 3905 char name[32]; 3906 } __ec_align1; 3907 3908 struct ec_response_gpio_get { 3909 uint8_t val; 3910 } __ec_align1; 3911 3912 /* Version 1 of input params and response */ 3913 struct ec_params_gpio_get_v1 { 3914 uint8_t subcmd; 3915 union { 3916 struct __ec_align1 { 3917 char name[32]; 3918 } get_value_by_name; 3919 struct __ec_align1 { 3920 uint8_t index; 3921 } get_info; 3922 }; 3923 } __ec_align1; 3924 3925 struct ec_response_gpio_get_v1 { 3926 union { 3927 struct __ec_align1 { 3928 uint8_t val; 3929 } get_value_by_name, get_count; 3930 struct __ec_todo_unpacked { 3931 uint8_t val; 3932 char name[32]; 3933 uint32_t flags; 3934 } get_info; 3935 }; 3936 } __ec_todo_packed; 3937 3938 enum gpio_get_subcmd { 3939 EC_GPIO_GET_BY_NAME = 0, 3940 EC_GPIO_GET_COUNT = 1, 3941 EC_GPIO_GET_INFO = 2, 3942 }; 3943 3944 /*****************************************************************************/ 3945 /* I2C commands. Only available when flash write protect is unlocked. */ 3946 3947 /* 3948 * CAUTION: These commands are deprecated, and are not supported anymore in EC 3949 * builds >= 8398.0.0 (see crosbug.com/p/23570). 3950 * 3951 * Use EC_CMD_I2C_PASSTHRU instead. 3952 */ 3953 3954 /* Read I2C bus */ 3955 #define EC_CMD_I2C_READ 0x0094 3956 3957 struct ec_params_i2c_read { 3958 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3959 uint8_t read_size; /* Either 8 or 16. */ 3960 uint8_t port; 3961 uint8_t offset; 3962 } __ec_align_size1; 3963 3964 struct ec_response_i2c_read { 3965 uint16_t data; 3966 } __ec_align2; 3967 3968 /* Write I2C bus */ 3969 #define EC_CMD_I2C_WRITE 0x0095 3970 3971 struct ec_params_i2c_write { 3972 uint16_t data; 3973 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3974 uint8_t write_size; /* Either 8 or 16. */ 3975 uint8_t port; 3976 uint8_t offset; 3977 } __ec_align_size1; 3978 3979 /*****************************************************************************/ 3980 /* Charge state commands. Only available when flash write protect unlocked. */ 3981 3982 /* Force charge state machine to stop charging the battery or force it to 3983 * discharge the battery. 3984 */ 3985 #define EC_CMD_CHARGE_CONTROL 0x0096 3986 #define EC_VER_CHARGE_CONTROL 3 3987 3988 enum ec_charge_control_mode { 3989 CHARGE_CONTROL_NORMAL = 0, 3990 CHARGE_CONTROL_IDLE, 3991 CHARGE_CONTROL_DISCHARGE, 3992 /* Add no more entry below. */ 3993 CHARGE_CONTROL_COUNT, 3994 }; 3995 3996 #define EC_CHARGE_MODE_TEXT \ 3997 { \ 3998 [CHARGE_CONTROL_NORMAL] = "NORMAL", \ 3999 [CHARGE_CONTROL_IDLE] = "IDLE", \ 4000 [CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \ 4001 } 4002 4003 enum ec_charge_control_cmd { 4004 EC_CHARGE_CONTROL_CMD_SET = 0, 4005 EC_CHARGE_CONTROL_CMD_GET, 4006 }; 4007 4008 enum ec_charge_control_flag { 4009 EC_CHARGE_CONTROL_FLAG_NO_IDLE = BIT(0), 4010 }; 4011 4012 struct ec_params_charge_control { 4013 uint32_t mode; /* enum charge_control_mode */ 4014 4015 /* Below are the fields added in V2. */ 4016 uint8_t cmd; /* enum ec_charge_control_cmd. */ 4017 uint8_t flags; /* enum ec_charge_control_flag (v3+) */ 4018 /* 4019 * Lower and upper thresholds for battery sustainer. This struct isn't 4020 * named to avoid tainting foreign projects' name spaces. 4021 * 4022 * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer 4023 * will be disabled. To disable battery sustainer, set mode=NORMAL, 4024 * lower=-1, upper=-1. 4025 */ 4026 struct { 4027 int8_t lower; /* Display SoC in percentage. */ 4028 int8_t upper; /* Display SoC in percentage. */ 4029 } sustain_soc; 4030 } __ec_align4; 4031 4032 /* Added in v2 */ 4033 struct ec_response_charge_control { 4034 uint32_t mode; /* enum charge_control_mode */ 4035 struct { /* Battery sustainer thresholds */ 4036 int8_t lower; 4037 int8_t upper; 4038 } sustain_soc; 4039 uint8_t flags; /* enum ec_charge_control_flag (v3+) */ 4040 uint8_t reserved; 4041 } __ec_align4; 4042 4043 /*****************************************************************************/ 4044 4045 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 4046 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 4047 4048 /* 4049 * Read data from the saved snapshot. If the subcmd parameter is 4050 * CONSOLE_READ_NEXT, this will return data starting from the beginning of 4051 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the 4052 * end of the previous snapshot. 4053 * 4054 * The params are only looked at in version >= 1 of this command. Prior 4055 * versions will just default to CONSOLE_READ_NEXT behavior. 4056 * 4057 * Response is null-terminated string. Empty string, if there is no more 4058 * remaining output. 4059 */ 4060 #define EC_CMD_CONSOLE_READ 0x0098 4061 4062 enum ec_console_read_subcmd { 4063 CONSOLE_READ_NEXT = 0, 4064 CONSOLE_READ_RECENT 4065 }; 4066 4067 struct ec_params_console_read_v1 { 4068 uint8_t subcmd; /* enum ec_console_read_subcmd */ 4069 } __ec_align1; 4070 4071 /*****************************************************************************/ 4072 4073 /* 4074 * Cut off battery power immediately or after the host has shut down. 4075 * 4076 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. 4077 * EC_RES_SUCCESS if the command was successful. 4078 * EC_RES_ERROR if the cut off command failed. 4079 */ 4080 #define EC_CMD_BATTERY_CUT_OFF 0x0099 4081 4082 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) 4083 4084 struct ec_params_battery_cutoff { 4085 uint8_t flags; 4086 } __ec_align1; 4087 4088 /*****************************************************************************/ 4089 /* USB port mux control. */ 4090 4091 /* 4092 * Switch USB mux or return to automatic switching. 4093 */ 4094 #define EC_CMD_USB_MUX 0x009A 4095 4096 struct ec_params_usb_mux { 4097 uint8_t mux; 4098 } __ec_align1; 4099 4100 /*****************************************************************************/ 4101 /* LDOs / FETs control. */ 4102 4103 enum ec_ldo_state { 4104 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 4105 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 4106 }; 4107 4108 /* 4109 * Switch on/off a LDO. 4110 */ 4111 #define EC_CMD_LDO_SET 0x009B 4112 4113 struct ec_params_ldo_set { 4114 uint8_t index; 4115 uint8_t state; 4116 } __ec_align1; 4117 4118 /* 4119 * Get LDO state. 4120 */ 4121 #define EC_CMD_LDO_GET 0x009C 4122 4123 struct ec_params_ldo_get { 4124 uint8_t index; 4125 } __ec_align1; 4126 4127 struct ec_response_ldo_get { 4128 uint8_t state; 4129 } __ec_align1; 4130 4131 /*****************************************************************************/ 4132 /* Power info. */ 4133 4134 /* 4135 * Get power info. 4136 */ 4137 #define EC_CMD_POWER_INFO 0x009D 4138 4139 struct ec_response_power_info { 4140 uint32_t usb_dev_type; 4141 uint16_t voltage_ac; 4142 uint16_t voltage_system; 4143 uint16_t current_system; 4144 uint16_t usb_current_limit; 4145 } __ec_align4; 4146 4147 /*****************************************************************************/ 4148 /* I2C passthru command */ 4149 4150 #define EC_CMD_I2C_PASSTHRU 0x009E 4151 4152 /* Read data; if not present, message is a write */ 4153 #define EC_I2C_FLAG_READ BIT(15) 4154 4155 /* Mask for address */ 4156 #define EC_I2C_ADDR_MASK 0x3ff 4157 4158 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ 4159 #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ 4160 4161 /* Any error */ 4162 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 4163 4164 struct ec_params_i2c_passthru_msg { 4165 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 4166 uint16_t len; /* Number of bytes to read or write */ 4167 } __ec_align2; 4168 4169 struct ec_params_i2c_passthru { 4170 uint8_t port; /* I2C port number */ 4171 uint8_t num_msgs; /* Number of messages */ 4172 struct ec_params_i2c_passthru_msg msg[]; 4173 /* Data to write for all messages is concatenated here */ 4174 } __ec_align2; 4175 4176 struct ec_response_i2c_passthru { 4177 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 4178 uint8_t num_msgs; /* Number of messages processed */ 4179 uint8_t data[]; /* Data read by messages concatenated here */ 4180 } __ec_align1; 4181 4182 /*****************************************************************************/ 4183 /* AP hang detect */ 4184 #define EC_CMD_HANG_DETECT 0x009F 4185 4186 #define EC_HANG_DETECT_MIN_TIMEOUT 5 4187 #define EC_HANG_DETECT_MAX_TIMEOUT 65535 4188 4189 /* EC hang detect commands */ 4190 enum ec_hang_detect_cmds { 4191 /* Reload AP hang detect timer. */ 4192 EC_HANG_DETECT_CMD_RELOAD = 0x0, 4193 4194 /* Stop AP hang detect timer. */ 4195 EC_HANG_DETECT_CMD_CANCEL = 0x1, 4196 4197 /* Configure watchdog with given reboot timeout and 4198 * cancel currently running AP hang detect timer. 4199 */ 4200 EC_HANG_DETECT_CMD_SET_TIMEOUT = 0x2, 4201 4202 /* Get last hang status - whether the AP boot was clear or not */ 4203 EC_HANG_DETECT_CMD_GET_STATUS = 0x3, 4204 4205 /* Clear last hang status. Called when AP is rebooting/shutting down 4206 * gracefully. 4207 */ 4208 EC_HANG_DETECT_CMD_CLEAR_STATUS = 0x4 4209 }; 4210 4211 struct ec_params_hang_detect { 4212 uint16_t command; /* enum ec_hang_detect_cmds */ 4213 /* Timeout in seconds before generating reboot */ 4214 uint16_t reboot_timeout_sec; 4215 } __ec_align2; 4216 4217 /* Status codes that describe whether AP has boot normally or the hang has been 4218 * detected and EC has reset AP 4219 */ 4220 enum ec_hang_detect_status { 4221 EC_HANG_DETECT_AP_BOOT_NORMAL = 0x0, 4222 EC_HANG_DETECT_AP_BOOT_EC_WDT = 0x1, 4223 EC_HANG_DETECT_AP_BOOT_COUNT, 4224 }; 4225 4226 struct ec_response_hang_detect { 4227 uint8_t status; /* enum ec_hang_detect_status */ 4228 } __ec_align1; 4229 /*****************************************************************************/ 4230 /* Commands for battery charging */ 4231 4232 /* 4233 * This is the single catch-all host command to exchange data regarding the 4234 * charge state machine (v2 and up). 4235 */ 4236 #define EC_CMD_CHARGE_STATE 0x00A0 4237 4238 /* Subcommands for this host command */ 4239 enum charge_state_command { 4240 CHARGE_STATE_CMD_GET_STATE, 4241 CHARGE_STATE_CMD_GET_PARAM, 4242 CHARGE_STATE_CMD_SET_PARAM, 4243 CHARGE_STATE_NUM_CMDS 4244 }; 4245 4246 /* 4247 * Known param numbers are defined here. Ranges are reserved for board-specific 4248 * params, which are handled by the particular implementations. 4249 */ 4250 enum charge_state_params { 4251 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ 4252 CS_PARAM_CHG_CURRENT, /* charger current limit */ 4253 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 4254 CS_PARAM_CHG_STATUS, /* charger-specific status */ 4255 CS_PARAM_CHG_OPTION, /* charger-specific options */ 4256 CS_PARAM_LIMIT_POWER, /* 4257 * Check if power is limited due to 4258 * low battery and / or a weak external 4259 * charger. READ ONLY. 4260 */ 4261 /* How many so far? */ 4262 CS_NUM_BASE_PARAMS, 4263 4264 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ 4265 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 4266 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 4267 4268 /* Range for CONFIG_CHARGE_STATE_DEBUG params */ 4269 CS_PARAM_DEBUG_MIN = 0x20000, 4270 CS_PARAM_DEBUG_CTL_MODE = 0x20000, 4271 CS_PARAM_DEBUG_MANUAL_MODE, 4272 CS_PARAM_DEBUG_SEEMS_DEAD, 4273 CS_PARAM_DEBUG_SEEMS_DISCONNECTED, 4274 CS_PARAM_DEBUG_BATT_REMOVED, 4275 CS_PARAM_DEBUG_MANUAL_CURRENT, 4276 CS_PARAM_DEBUG_MANUAL_VOLTAGE, 4277 CS_PARAM_DEBUG_MAX = 0x2ffff, 4278 4279 /* Other custom param ranges go here... */ 4280 }; 4281 4282 struct ec_params_charge_state { 4283 uint8_t cmd; /* enum charge_state_command */ 4284 union { 4285 /* get_state has no args */ 4286 4287 struct __ec_todo_unpacked { 4288 uint32_t param; /* enum charge_state_param */ 4289 } get_param; 4290 4291 struct __ec_todo_unpacked { 4292 uint32_t param; /* param to set */ 4293 uint32_t value; /* value to set */ 4294 } set_param; 4295 }; 4296 } __ec_todo_packed; 4297 4298 struct ec_response_charge_state { 4299 union { 4300 struct __ec_align4 { 4301 int ac; 4302 int chg_voltage; 4303 int chg_current; 4304 int chg_input_current; 4305 int batt_state_of_charge; 4306 } get_state; 4307 4308 struct __ec_align4 { 4309 uint32_t value; 4310 } get_param; 4311 4312 /* set_param returns no args */ 4313 }; 4314 } __ec_align4; 4315 4316 4317 /* 4318 * Set maximum battery charging current. 4319 */ 4320 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 4321 4322 struct ec_params_current_limit { 4323 uint32_t limit; /* in mA */ 4324 } __ec_align4; 4325 4326 /* 4327 * Set maximum external voltage / current. 4328 */ 4329 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 4330 4331 /* Command v0 is used only on Spring and is obsolete + unsupported */ 4332 struct ec_params_external_power_limit_v1 { 4333 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 4334 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 4335 } __ec_align2; 4336 4337 #define EC_POWER_LIMIT_NONE 0xffff 4338 4339 /* 4340 * Set maximum voltage & current of a dedicated charge port 4341 */ 4342 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 4343 4344 struct ec_params_dedicated_charger_limit { 4345 uint16_t current_lim; /* in mA */ 4346 uint16_t voltage_lim; /* in mV */ 4347 } __ec_align2; 4348 4349 /*****************************************************************************/ 4350 /* Hibernate/Deep Sleep Commands */ 4351 4352 /* Set the delay before going into hibernation. */ 4353 #define EC_CMD_HIBERNATION_DELAY 0x00A8 4354 4355 struct ec_params_hibernation_delay { 4356 /* 4357 * Seconds to wait in G3 before hibernate. Pass in 0 to read the 4358 * current settings without changing them. 4359 */ 4360 uint32_t seconds; 4361 } __ec_align4; 4362 4363 struct ec_response_hibernation_delay { 4364 /* 4365 * The current time in seconds in which the system has been in the G3 4366 * state. This value is reset if the EC transitions out of G3. 4367 */ 4368 uint32_t time_g3; 4369 4370 /* 4371 * The current time remaining in seconds until the EC should hibernate. 4372 * This value is also reset if the EC transitions out of G3. 4373 */ 4374 uint32_t time_remaining; 4375 4376 /* 4377 * The current time in seconds that the EC should wait in G3 before 4378 * hibernating. 4379 */ 4380 uint32_t hibernate_delay; 4381 } __ec_align4; 4382 4383 /* Inform the EC when entering a sleep state */ 4384 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 4385 4386 enum host_sleep_event { 4387 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 4388 HOST_SLEEP_EVENT_S3_RESUME = 2, 4389 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 4390 HOST_SLEEP_EVENT_S0IX_RESUME = 4, 4391 /* S3 suspend with additional enabled wake sources */ 4392 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, 4393 }; 4394 4395 struct ec_params_host_sleep_event { 4396 uint8_t sleep_event; 4397 } __ec_align1; 4398 4399 /* 4400 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep 4401 * transition failures 4402 */ 4403 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 4404 4405 /* Disable timeout detection for this sleep transition */ 4406 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF 4407 4408 struct ec_params_host_sleep_event_v1 { 4409 /* The type of sleep being entered or exited. */ 4410 uint8_t sleep_event; 4411 4412 /* Padding */ 4413 uint8_t reserved; 4414 union { 4415 /* Parameters that apply for suspend messages. */ 4416 struct { 4417 /* 4418 * The timeout in milliseconds between when this message 4419 * is received and when the EC will declare sleep 4420 * transition failure if the sleep signal is not 4421 * asserted. 4422 */ 4423 uint16_t sleep_timeout_ms; 4424 } suspend_params; 4425 4426 /* No parameters for non-suspend messages. */ 4427 }; 4428 } __ec_align2; 4429 4430 /* A timeout occurred when this bit is set */ 4431 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 4432 4433 /* 4434 * The mask defining which bits correspond to the number of sleep transitions, 4435 * as well as the maximum number of suspend line transitions that will be 4436 * reported back to the host. 4437 */ 4438 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF 4439 4440 struct ec_response_host_sleep_event_v1 { 4441 union { 4442 /* Response fields that apply for resume messages. */ 4443 struct { 4444 /* 4445 * The number of sleep power signal transitions that 4446 * occurred since the suspend message. The high bit 4447 * indicates a timeout occurred. 4448 */ 4449 uint32_t sleep_transitions; 4450 } resume_response; 4451 4452 /* No response fields for non-resume messages. */ 4453 }; 4454 } __ec_align4; 4455 4456 /*****************************************************************************/ 4457 /* Device events */ 4458 #define EC_CMD_DEVICE_EVENT 0x00AA 4459 4460 enum ec_device_event { 4461 EC_DEVICE_EVENT_TRACKPAD, 4462 EC_DEVICE_EVENT_DSP, 4463 EC_DEVICE_EVENT_WIFI, 4464 EC_DEVICE_EVENT_WLC, 4465 }; 4466 4467 enum ec_device_event_param { 4468 /* Get and clear pending device events */ 4469 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 4470 /* Get device event mask */ 4471 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 4472 /* Set device event mask */ 4473 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 4474 }; 4475 4476 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) 4477 4478 struct ec_params_device_event { 4479 uint32_t event_mask; 4480 uint8_t param; 4481 } __ec_align_size1; 4482 4483 struct ec_response_device_event { 4484 uint32_t event_mask; 4485 } __ec_align4; 4486 4487 /*****************************************************************************/ 4488 /* Smart battery pass-through */ 4489 4490 /* Get / Set 16-bit smart battery registers */ 4491 #define EC_CMD_SB_READ_WORD 0x00B0 4492 #define EC_CMD_SB_WRITE_WORD 0x00B1 4493 4494 /* Get / Set string smart battery parameters 4495 * formatted as SMBUS "block". 4496 */ 4497 #define EC_CMD_SB_READ_BLOCK 0x00B2 4498 #define EC_CMD_SB_WRITE_BLOCK 0x00B3 4499 4500 struct ec_params_sb_rd { 4501 uint8_t reg; 4502 } __ec_align1; 4503 4504 struct ec_response_sb_rd_word { 4505 uint16_t value; 4506 } __ec_align2; 4507 4508 struct ec_params_sb_wr_word { 4509 uint8_t reg; 4510 uint16_t value; 4511 } __ec_align1; 4512 4513 struct ec_response_sb_rd_block { 4514 uint8_t data[32]; 4515 } __ec_align1; 4516 4517 struct ec_params_sb_wr_block { 4518 uint8_t reg; 4519 uint16_t data[32]; 4520 } __ec_align1; 4521 4522 /*****************************************************************************/ 4523 /* Battery vendor parameters 4524 * 4525 * Get or set vendor-specific parameters in the battery. Implementations may 4526 * differ between boards or batteries. On a set operation, the response 4527 * contains the actual value set, which may be rounded or clipped from the 4528 * requested value. 4529 */ 4530 4531 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 4532 4533 enum ec_battery_vendor_param_mode { 4534 BATTERY_VENDOR_PARAM_MODE_GET = 0, 4535 BATTERY_VENDOR_PARAM_MODE_SET, 4536 }; 4537 4538 struct ec_params_battery_vendor_param { 4539 uint32_t param; 4540 uint32_t value; 4541 uint8_t mode; 4542 } __ec_align_size1; 4543 4544 struct ec_response_battery_vendor_param { 4545 uint32_t value; 4546 } __ec_align4; 4547 4548 /*****************************************************************************/ 4549 /* 4550 * Smart Battery Firmware Update Commands 4551 */ 4552 #define EC_CMD_SB_FW_UPDATE 0x00B5 4553 4554 enum ec_sb_fw_update_subcmd { 4555 EC_SB_FW_UPDATE_PREPARE = 0x0, 4556 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 4557 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 4558 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 4559 EC_SB_FW_UPDATE_END = 0x4, 4560 EC_SB_FW_UPDATE_STATUS = 0x5, 4561 EC_SB_FW_UPDATE_PROTECT = 0x6, 4562 EC_SB_FW_UPDATE_MAX = 0x7, 4563 }; 4564 4565 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 4566 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 4567 #define SB_FW_UPDATE_CMD_INFO_SIZE 8 4568 4569 struct ec_sb_fw_update_header { 4570 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 4571 uint16_t fw_id; /* firmware id */ 4572 } __ec_align4; 4573 4574 struct ec_params_sb_fw_update { 4575 struct ec_sb_fw_update_header hdr; 4576 union { 4577 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 4578 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4579 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 4580 /* EC_SB_FW_UPDATE_END = 0x4 */ 4581 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4582 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 4583 /* Those have no args */ 4584 4585 /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 4586 struct __ec_align4 { 4587 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 4588 } write; 4589 }; 4590 } __ec_align4; 4591 4592 struct ec_response_sb_fw_update { 4593 union { 4594 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4595 struct __ec_align1 { 4596 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 4597 } info; 4598 4599 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4600 struct __ec_align1 { 4601 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 4602 } status; 4603 }; 4604 } __ec_align1; 4605 4606 /* 4607 * Entering Verified Boot Mode Command 4608 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 4609 * Valid Modes are: normal, developer, and recovery. 4610 */ 4611 #define EC_CMD_ENTERING_MODE 0x00B6 4612 4613 struct ec_params_entering_mode { 4614 int vboot_mode; 4615 } __ec_align4; 4616 4617 #define VBOOT_MODE_NORMAL 0 4618 #define VBOOT_MODE_DEVELOPER 1 4619 #define VBOOT_MODE_RECOVERY 2 4620 4621 /*****************************************************************************/ 4622 /* 4623 * I2C passthru protection command: Protects I2C tunnels against access on 4624 * certain addresses (board-specific). 4625 */ 4626 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 4627 4628 enum ec_i2c_passthru_protect_subcmd { 4629 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 4630 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 4631 }; 4632 4633 struct ec_params_i2c_passthru_protect { 4634 uint8_t subcmd; 4635 uint8_t port; /* I2C port number */ 4636 } __ec_align1; 4637 4638 struct ec_response_i2c_passthru_protect { 4639 uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 4640 } __ec_align1; 4641 4642 4643 /*****************************************************************************/ 4644 /* 4645 * HDMI CEC commands 4646 * 4647 * These commands are for sending and receiving message via HDMI CEC 4648 */ 4649 4650 #define EC_CEC_MAX_PORTS 16 4651 4652 #define MAX_CEC_MSG_LEN 16 4653 4654 /* 4655 * Helper macros for packing/unpacking cec_events. 4656 * bits[27:0] : bitmask of events from enum mkbp_cec_event 4657 * bits[31:28]: port number 4658 */ 4659 #define EC_MKBP_EVENT_CEC_PACK(events, port) \ 4660 (((events) & GENMASK(27, 0)) | (((port) & 0xf) << 28)) 4661 #define EC_MKBP_EVENT_CEC_GET_EVENTS(event) ((event) & GENMASK(27, 0)) 4662 #define EC_MKBP_EVENT_CEC_GET_PORT(event) (((event) >> 28) & 0xf) 4663 4664 /* CEC message from the AP to be written on the CEC bus */ 4665 #define EC_CMD_CEC_WRITE_MSG 0x00B8 4666 4667 /** 4668 * struct ec_params_cec_write - Message to write to the CEC bus 4669 * @msg: message content to write to the CEC bus 4670 */ 4671 struct ec_params_cec_write { 4672 uint8_t msg[MAX_CEC_MSG_LEN]; 4673 } __ec_align1; 4674 4675 /** 4676 * struct ec_params_cec_write_v1 - Message to write to the CEC bus 4677 * @port: CEC port to write the message on 4678 * @msg_len: length of msg in bytes 4679 * @msg: message content to write to the CEC bus 4680 */ 4681 struct ec_params_cec_write_v1 { 4682 uint8_t port; 4683 uint8_t msg_len; 4684 uint8_t msg[MAX_CEC_MSG_LEN]; 4685 } __ec_align1; 4686 4687 /* CEC message read from a CEC bus reported back to the AP */ 4688 #define EC_CMD_CEC_READ_MSG 0x00B9 4689 4690 /** 4691 * struct ec_params_cec_read - Read a message from the CEC bus 4692 * @port: CEC port to read a message on 4693 */ 4694 struct ec_params_cec_read { 4695 uint8_t port; 4696 } __ec_align1; 4697 4698 /** 4699 * struct ec_response_cec_read - Message read from the CEC bus 4700 * @msg_len: length of msg in bytes 4701 * @msg: message content read from the CEC bus 4702 */ 4703 struct ec_response_cec_read { 4704 uint8_t msg_len; 4705 uint8_t msg[MAX_CEC_MSG_LEN]; 4706 } __ec_align1; 4707 4708 /* Set various CEC parameters */ 4709 #define EC_CMD_CEC_SET 0x00BA 4710 4711 /** 4712 * struct ec_params_cec_set - CEC parameters set 4713 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4714 * @port: CEC port to set the parameter on 4715 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC 4716 * or 1 to enable CEC functionality, in case cmd is 4717 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical 4718 * address between 0 and 15 or 0xff to unregister 4719 */ 4720 struct ec_params_cec_set { 4721 uint8_t cmd : 4; /* enum cec_command */ 4722 uint8_t port : 4; 4723 uint8_t val; 4724 } __ec_align1; 4725 4726 /* Read various CEC parameters */ 4727 #define EC_CMD_CEC_GET 0x00BB 4728 4729 /** 4730 * struct ec_params_cec_get - CEC parameters get 4731 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4732 * @port: CEC port to get the parameter on 4733 */ 4734 struct ec_params_cec_get { 4735 uint8_t cmd : 4; /* enum cec_command */ 4736 uint8_t port : 4; 4737 } __ec_align1; 4738 4739 /** 4740 * struct ec_response_cec_get - CEC parameters get response 4741 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is 4742 * disabled or 1 if CEC functionality is enabled, 4743 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the 4744 * configured logical address between 0 and 15 or 0xff if unregistered 4745 */ 4746 struct ec_response_cec_get { 4747 uint8_t val; 4748 } __ec_align1; 4749 4750 /* Get the number of CEC ports */ 4751 #define EC_CMD_CEC_PORT_COUNT 0x00C1 4752 4753 /** 4754 * struct ec_response_cec_port_count - CEC port count response 4755 * @port_count: number of CEC ports 4756 */ 4757 struct ec_response_cec_port_count { 4758 uint8_t port_count; 4759 } __ec_align1; 4760 4761 /* CEC parameters command */ 4762 enum cec_command { 4763 /* CEC reading, writing and events enable */ 4764 CEC_CMD_ENABLE, 4765 /* CEC logical address */ 4766 CEC_CMD_LOGICAL_ADDRESS, 4767 }; 4768 4769 /* Events from CEC to AP */ 4770 enum mkbp_cec_event { 4771 /* Outgoing message was acknowledged by a follower */ 4772 EC_MKBP_CEC_SEND_OK = BIT(0), 4773 /* Outgoing message was not acknowledged */ 4774 EC_MKBP_CEC_SEND_FAILED = BIT(1), 4775 /* Incoming message can be read out by AP */ 4776 EC_MKBP_CEC_HAVE_DATA = BIT(2), 4777 }; 4778 4779 /*****************************************************************************/ 4780 4781 /* Commands for audio codec. */ 4782 #define EC_CMD_EC_CODEC 0x00BC 4783 4784 enum ec_codec_subcmd { 4785 EC_CODEC_GET_CAPABILITIES = 0x0, 4786 EC_CODEC_GET_SHM_ADDR = 0x1, 4787 EC_CODEC_SET_SHM_ADDR = 0x2, 4788 EC_CODEC_SUBCMD_COUNT, 4789 }; 4790 4791 enum ec_codec_cap { 4792 EC_CODEC_CAP_WOV_AUDIO_SHM = 0, 4793 EC_CODEC_CAP_WOV_LANG_SHM = 1, 4794 EC_CODEC_CAP_LAST = 32, 4795 }; 4796 4797 enum ec_codec_shm_id { 4798 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0, 4799 EC_CODEC_SHM_ID_WOV_LANG = 0x1, 4800 EC_CODEC_SHM_ID_LAST, 4801 }; 4802 4803 enum ec_codec_shm_type { 4804 EC_CODEC_SHM_TYPE_EC_RAM = 0x0, 4805 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1, 4806 }; 4807 4808 struct __ec_align1 ec_param_ec_codec_get_shm_addr { 4809 uint8_t shm_id; 4810 uint8_t reserved[3]; 4811 }; 4812 4813 struct __ec_align4 ec_param_ec_codec_set_shm_addr { 4814 uint64_t phys_addr; 4815 uint32_t len; 4816 uint8_t shm_id; 4817 uint8_t reserved[3]; 4818 }; 4819 4820 struct __ec_align4 ec_param_ec_codec { 4821 uint8_t cmd; /* enum ec_codec_subcmd */ 4822 uint8_t reserved[3]; 4823 4824 union { 4825 struct ec_param_ec_codec_get_shm_addr 4826 get_shm_addr_param; 4827 struct ec_param_ec_codec_set_shm_addr 4828 set_shm_addr_param; 4829 }; 4830 }; 4831 4832 struct __ec_align4 ec_response_ec_codec_get_capabilities { 4833 uint32_t capabilities; 4834 }; 4835 4836 struct __ec_align4 ec_response_ec_codec_get_shm_addr { 4837 uint64_t phys_addr; 4838 uint32_t len; 4839 uint8_t type; 4840 uint8_t reserved[3]; 4841 }; 4842 4843 /*****************************************************************************/ 4844 4845 /* Commands for DMIC on audio codec. */ 4846 #define EC_CMD_EC_CODEC_DMIC 0x00BD 4847 4848 enum ec_codec_dmic_subcmd { 4849 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0, 4850 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1, 4851 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2, 4852 EC_CODEC_DMIC_SUBCMD_COUNT, 4853 }; 4854 4855 enum ec_codec_dmic_channel { 4856 EC_CODEC_DMIC_CHANNEL_0 = 0x0, 4857 EC_CODEC_DMIC_CHANNEL_1 = 0x1, 4858 EC_CODEC_DMIC_CHANNEL_2 = 0x2, 4859 EC_CODEC_DMIC_CHANNEL_3 = 0x3, 4860 EC_CODEC_DMIC_CHANNEL_4 = 0x4, 4861 EC_CODEC_DMIC_CHANNEL_5 = 0x5, 4862 EC_CODEC_DMIC_CHANNEL_6 = 0x6, 4863 EC_CODEC_DMIC_CHANNEL_7 = 0x7, 4864 EC_CODEC_DMIC_CHANNEL_COUNT, 4865 }; 4866 4867 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx { 4868 uint8_t channel; /* enum ec_codec_dmic_channel */ 4869 uint8_t gain; 4870 uint8_t reserved[2]; 4871 }; 4872 4873 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx { 4874 uint8_t channel; /* enum ec_codec_dmic_channel */ 4875 uint8_t reserved[3]; 4876 }; 4877 4878 struct __ec_align4 ec_param_ec_codec_dmic { 4879 uint8_t cmd; /* enum ec_codec_dmic_subcmd */ 4880 uint8_t reserved[3]; 4881 4882 union { 4883 struct ec_param_ec_codec_dmic_set_gain_idx 4884 set_gain_idx_param; 4885 struct ec_param_ec_codec_dmic_get_gain_idx 4886 get_gain_idx_param; 4887 }; 4888 }; 4889 4890 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain { 4891 uint8_t max_gain; 4892 }; 4893 4894 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx { 4895 uint8_t gain; 4896 }; 4897 4898 /*****************************************************************************/ 4899 4900 /* Commands for I2S RX on audio codec. */ 4901 4902 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE 4903 4904 enum ec_codec_i2s_rx_subcmd { 4905 EC_CODEC_I2S_RX_ENABLE = 0x0, 4906 EC_CODEC_I2S_RX_DISABLE = 0x1, 4907 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2, 4908 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3, 4909 EC_CODEC_I2S_RX_SET_BCLK = 0x4, 4910 EC_CODEC_I2S_RX_RESET = 0x5, 4911 EC_CODEC_I2S_RX_SUBCMD_COUNT, 4912 }; 4913 4914 enum ec_codec_i2s_rx_sample_depth { 4915 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0, 4916 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1, 4917 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT, 4918 }; 4919 4920 enum ec_codec_i2s_rx_daifmt { 4921 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0, 4922 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1, 4923 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2, 4924 EC_CODEC_I2S_RX_DAIFMT_COUNT, 4925 }; 4926 4927 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth { 4928 uint8_t depth; 4929 uint8_t reserved[3]; 4930 }; 4931 4932 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain { 4933 uint8_t left; 4934 uint8_t right; 4935 uint8_t reserved[2]; 4936 }; 4937 4938 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt { 4939 uint8_t daifmt; 4940 uint8_t reserved[3]; 4941 }; 4942 4943 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk { 4944 uint32_t bclk; 4945 }; 4946 4947 struct __ec_align4 ec_param_ec_codec_i2s_rx { 4948 uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */ 4949 uint8_t reserved[3]; 4950 4951 union { 4952 struct ec_param_ec_codec_i2s_rx_set_sample_depth 4953 set_sample_depth_param; 4954 struct ec_param_ec_codec_i2s_rx_set_daifmt 4955 set_daifmt_param; 4956 struct ec_param_ec_codec_i2s_rx_set_bclk 4957 set_bclk_param; 4958 }; 4959 }; 4960 4961 /*****************************************************************************/ 4962 /* Commands for WoV on audio codec. */ 4963 4964 #define EC_CMD_EC_CODEC_WOV 0x00BF 4965 4966 enum ec_codec_wov_subcmd { 4967 EC_CODEC_WOV_SET_LANG = 0x0, 4968 EC_CODEC_WOV_SET_LANG_SHM = 0x1, 4969 EC_CODEC_WOV_GET_LANG = 0x2, 4970 EC_CODEC_WOV_ENABLE = 0x3, 4971 EC_CODEC_WOV_DISABLE = 0x4, 4972 EC_CODEC_WOV_READ_AUDIO = 0x5, 4973 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6, 4974 EC_CODEC_WOV_SUBCMD_COUNT, 4975 }; 4976 4977 /* 4978 * @hash is SHA256 of the whole language model. 4979 * @total_len indicates the length of whole language model. 4980 * @offset is the cursor from the beginning of the model. 4981 * @buf is the packet buffer. 4982 * @len denotes how many bytes in the buf. 4983 */ 4984 struct __ec_align4 ec_param_ec_codec_wov_set_lang { 4985 uint8_t hash[32]; 4986 uint32_t total_len; 4987 uint32_t offset; 4988 uint8_t buf[128]; 4989 uint32_t len; 4990 }; 4991 4992 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm { 4993 uint8_t hash[32]; 4994 uint32_t total_len; 4995 }; 4996 4997 struct __ec_align4 ec_param_ec_codec_wov { 4998 uint8_t cmd; /* enum ec_codec_wov_subcmd */ 4999 uint8_t reserved[3]; 5000 5001 union { 5002 struct ec_param_ec_codec_wov_set_lang 5003 set_lang_param; 5004 struct ec_param_ec_codec_wov_set_lang_shm 5005 set_lang_shm_param; 5006 }; 5007 }; 5008 5009 struct __ec_align4 ec_response_ec_codec_wov_get_lang { 5010 uint8_t hash[32]; 5011 }; 5012 5013 struct __ec_align4 ec_response_ec_codec_wov_read_audio { 5014 uint8_t buf[128]; 5015 uint32_t len; 5016 }; 5017 5018 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm { 5019 uint32_t offset; 5020 uint32_t len; 5021 }; 5022 5023 /*****************************************************************************/ 5024 /* System commands */ 5025 5026 /* 5027 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 5028 * necessarily reboot the EC. Rename to "image" or something similar? 5029 */ 5030 #define EC_CMD_REBOOT_EC 0x00D2 5031 5032 /* Command */ 5033 enum ec_reboot_cmd { 5034 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 5035 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 5036 EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ 5037 /* (command 3 was jump to RW-B) */ 5038 EC_REBOOT_COLD = 4, /* Cold-reboot */ 5039 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 5040 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 5041 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 5042 EC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */ 5043 }; 5044 5045 /* Flags for ec_params_reboot_ec.reboot_flags */ 5046 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ 5047 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ 5048 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ 5049 5050 struct ec_params_reboot_ec { 5051 uint8_t cmd; /* enum ec_reboot_cmd */ 5052 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 5053 } __ec_align1; 5054 5055 /* 5056 * Get information on last EC panic. 5057 * 5058 * Returns variable-length platform-dependent panic information. See panic.h 5059 * for details. 5060 */ 5061 #define EC_CMD_GET_PANIC_INFO 0x00D3 5062 5063 /*****************************************************************************/ 5064 /* 5065 * Special commands 5066 * 5067 * These do not follow the normal rules for commands. See each command for 5068 * details. 5069 */ 5070 5071 /* 5072 * Reboot NOW 5073 * 5074 * This command will work even when the EC LPC interface is busy, because the 5075 * reboot command is processed at interrupt level. Note that when the EC 5076 * reboots, the host will reboot too, so there is no response to this command. 5077 * 5078 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 5079 */ 5080 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 5081 5082 /* 5083 * Resend last response (not supported on LPC). 5084 * 5085 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 5086 * there was no previous command, or the previous command's response was too 5087 * big to save. 5088 */ 5089 #define EC_CMD_RESEND_RESPONSE 0x00DB 5090 5091 /* 5092 * This header byte on a command indicate version 0. Any header byte less 5093 * than this means that we are talking to an old EC which doesn't support 5094 * versioning. In that case, we assume version 0. 5095 * 5096 * Header bytes greater than this indicate a later version. For example, 5097 * EC_CMD_VERSION0 + 1 means we are using version 1. 5098 * 5099 * The old EC interface must not use commands 0xdc or higher. 5100 */ 5101 #define EC_CMD_VERSION0 0x00DC 5102 5103 /*****************************************************************************/ 5104 /* 5105 * PD commands 5106 * 5107 * These commands are for PD MCU communication. 5108 */ 5109 5110 /* EC to PD MCU exchange status command */ 5111 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 5112 #define EC_VER_PD_EXCHANGE_STATUS 2 5113 5114 enum pd_charge_state { 5115 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 5116 PD_CHARGE_NONE, /* No charging allowed */ 5117 PD_CHARGE_5V, /* 5V charging only */ 5118 PD_CHARGE_MAX /* Charge at max voltage */ 5119 }; 5120 5121 /* Status of EC being sent to PD */ 5122 #define EC_STATUS_HIBERNATING BIT(0) 5123 5124 struct ec_params_pd_status { 5125 uint8_t status; /* EC status */ 5126 int8_t batt_soc; /* battery state of charge */ 5127 uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 5128 } __ec_align1; 5129 5130 /* Status of PD being sent back to EC */ 5131 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ 5132 #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ 5133 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ 5134 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ 5135 #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ 5136 #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ 5137 #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ 5138 #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 5139 PD_STATUS_TCPC_ALERT_1 | \ 5140 PD_STATUS_HOST_EVENT) 5141 struct ec_response_pd_status { 5142 uint32_t curr_lim_ma; /* input current limit */ 5143 uint16_t status; /* PD MCU status */ 5144 int8_t active_charge_port; /* active charging port */ 5145 } __ec_align_size1; 5146 5147 /* AP to PD MCU host event status command, cleared on read */ 5148 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 5149 5150 /* PD MCU host event status bits */ 5151 #define PD_EVENT_UPDATE_DEVICE BIT(0) 5152 #define PD_EVENT_POWER_CHANGE BIT(1) 5153 #define PD_EVENT_IDENTITY_RECEIVED BIT(2) 5154 #define PD_EVENT_DATA_SWAP BIT(3) 5155 #define PD_EVENT_TYPEC BIT(4) 5156 #define PD_EVENT_PPM BIT(5) 5157 #define PD_EVENT_INIT BIT(6) 5158 5159 struct ec_response_host_event_status { 5160 uint32_t status; /* PD MCU host event status */ 5161 } __ec_align4; 5162 5163 /* Set USB type-C port role and muxes */ 5164 #define EC_CMD_USB_PD_CONTROL 0x0101 5165 5166 enum usb_pd_control_role { 5167 USB_PD_CTRL_ROLE_NO_CHANGE = 0, 5168 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ 5169 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 5170 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 5171 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 5172 USB_PD_CTRL_ROLE_FREEZE = 5, 5173 USB_PD_CTRL_ROLE_COUNT 5174 }; 5175 5176 enum usb_pd_control_mux { 5177 USB_PD_CTRL_MUX_NO_CHANGE = 0, 5178 USB_PD_CTRL_MUX_NONE = 1, 5179 USB_PD_CTRL_MUX_USB = 2, 5180 USB_PD_CTRL_MUX_DP = 3, 5181 USB_PD_CTRL_MUX_DOCK = 4, 5182 USB_PD_CTRL_MUX_AUTO = 5, 5183 USB_PD_CTRL_MUX_COUNT 5184 }; 5185 5186 enum usb_pd_control_swap { 5187 USB_PD_CTRL_SWAP_NONE = 0, 5188 USB_PD_CTRL_SWAP_DATA = 1, 5189 USB_PD_CTRL_SWAP_POWER = 2, 5190 USB_PD_CTRL_SWAP_VCONN = 3, 5191 USB_PD_CTRL_SWAP_COUNT 5192 }; 5193 5194 struct ec_params_usb_pd_control { 5195 uint8_t port; 5196 uint8_t role; 5197 uint8_t mux; 5198 uint8_t swap; 5199 } __ec_align1; 5200 5201 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ 5202 #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ 5203 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ 5204 5205 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ 5206 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ 5207 #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ 5208 #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ 5209 #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ 5210 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ 5211 #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ 5212 5213 struct ec_response_usb_pd_control { 5214 uint8_t enabled; 5215 uint8_t role; 5216 uint8_t polarity; 5217 uint8_t state; 5218 } __ec_align1; 5219 5220 struct ec_response_usb_pd_control_v1 { 5221 uint8_t enabled; 5222 uint8_t role; 5223 uint8_t polarity; 5224 char state[32]; 5225 } __ec_align1; 5226 5227 /* Values representing usbc PD CC state */ 5228 #define USBC_PD_CC_NONE 0 /* No accessory connected */ 5229 #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ 5230 #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ 5231 #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ 5232 #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ 5233 #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ 5234 5235 /* Active/Passive Cable */ 5236 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0) 5237 /* Optical/Non-optical cable */ 5238 #define USB_PD_CTRL_OPTICAL_CABLE BIT(1) 5239 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */ 5240 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2) 5241 /* Active Link Uni-Direction */ 5242 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3) 5243 5244 struct ec_response_usb_pd_control_v2 { 5245 uint8_t enabled; 5246 uint8_t role; 5247 uint8_t polarity; 5248 char state[32]; 5249 uint8_t cc_state; /* enum pd_cc_states representing cc state */ 5250 uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ 5251 uint8_t reserved; /* Reserved for future use */ 5252 uint8_t control_flags; /* USB_PD_CTRL_*flags */ 5253 uint8_t cable_speed; /* TBT_SS_* cable speed */ 5254 uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */ 5255 } __ec_align1; 5256 5257 #define EC_CMD_USB_PD_PORTS 0x0102 5258 5259 /* Maximum number of PD ports on a device, num_ports will be <= this */ 5260 #define EC_USB_PD_MAX_PORTS 8 5261 5262 struct ec_response_usb_pd_ports { 5263 uint8_t num_ports; 5264 } __ec_align1; 5265 5266 #define EC_CMD_USB_PD_POWER_INFO 0x0103 5267 5268 #define PD_POWER_CHARGING_PORT 0xff 5269 struct ec_params_usb_pd_power_info { 5270 uint8_t port; 5271 } __ec_align1; 5272 5273 enum usb_chg_type { 5274 USB_CHG_TYPE_NONE, 5275 USB_CHG_TYPE_PD, 5276 USB_CHG_TYPE_C, 5277 USB_CHG_TYPE_PROPRIETARY, 5278 USB_CHG_TYPE_BC12_DCP, 5279 USB_CHG_TYPE_BC12_CDP, 5280 USB_CHG_TYPE_BC12_SDP, 5281 USB_CHG_TYPE_OTHER, 5282 USB_CHG_TYPE_VBUS, 5283 USB_CHG_TYPE_UNKNOWN, 5284 USB_CHG_TYPE_DEDICATED, 5285 }; 5286 enum usb_power_roles { 5287 USB_PD_PORT_POWER_DISCONNECTED, 5288 USB_PD_PORT_POWER_SOURCE, 5289 USB_PD_PORT_POWER_SINK, 5290 USB_PD_PORT_POWER_SINK_NOT_CHARGING, 5291 }; 5292 5293 struct usb_chg_measures { 5294 uint16_t voltage_max; 5295 uint16_t voltage_now; 5296 uint16_t current_max; 5297 uint16_t current_lim; 5298 } __ec_align2; 5299 5300 struct ec_response_usb_pd_power_info { 5301 uint8_t role; 5302 uint8_t type; 5303 uint8_t dualrole; 5304 uint8_t reserved1; 5305 struct usb_chg_measures meas; 5306 uint32_t max_power; 5307 } __ec_align4; 5308 5309 5310 /* 5311 * This command will return the number of USB PD charge port + the number 5312 * of dedicated port present. 5313 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports 5314 */ 5315 #define EC_CMD_CHARGE_PORT_COUNT 0x0105 5316 struct ec_response_charge_port_count { 5317 uint8_t port_count; 5318 } __ec_align1; 5319 5320 /* Write USB-PD device FW */ 5321 #define EC_CMD_USB_PD_FW_UPDATE 0x0110 5322 5323 enum usb_pd_fw_update_cmds { 5324 USB_PD_FW_REBOOT, 5325 USB_PD_FW_FLASH_ERASE, 5326 USB_PD_FW_FLASH_WRITE, 5327 USB_PD_FW_ERASE_SIG, 5328 }; 5329 5330 struct ec_params_usb_pd_fw_update { 5331 uint16_t dev_id; 5332 uint8_t cmd; 5333 uint8_t port; 5334 uint32_t size; /* Size to write in bytes */ 5335 /* Followed by data to write */ 5336 } __ec_align4; 5337 5338 /* Write USB-PD Accessory RW_HASH table entry */ 5339 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 5340 /* RW hash is first 20 bytes of SHA-256 of RW section */ 5341 #define PD_RW_HASH_SIZE 20 5342 struct ec_params_usb_pd_rw_hash_entry { 5343 uint16_t dev_id; 5344 uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 5345 uint8_t reserved; /* 5346 * For alignment of current_image 5347 * TODO(rspangler) but it's not aligned! 5348 * Should have been reserved[2]. 5349 */ 5350 uint32_t current_image; /* One of ec_current_image */ 5351 } __ec_align1; 5352 5353 /* Read USB-PD Accessory info */ 5354 #define EC_CMD_USB_PD_DEV_INFO 0x0112 5355 5356 struct ec_params_usb_pd_info_request { 5357 uint8_t port; 5358 } __ec_align1; 5359 5360 /* Read USB-PD Device discovery info */ 5361 #define EC_CMD_USB_PD_DISCOVERY 0x0113 5362 struct ec_params_usb_pd_discovery_entry { 5363 uint16_t vid; /* USB-IF VID */ 5364 uint16_t pid; /* USB-IF PID */ 5365 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 5366 } __ec_align_size1; 5367 5368 /* Override default charge behavior */ 5369 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 5370 5371 /* Negative port parameters have special meaning */ 5372 enum usb_pd_override_ports { 5373 OVERRIDE_DONT_CHARGE = -2, 5374 OVERRIDE_OFF = -1, 5375 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ 5376 }; 5377 5378 struct ec_params_charge_port_override { 5379 int16_t override_port; /* Override port# */ 5380 } __ec_align2; 5381 5382 /* 5383 * Read (and delete) one entry of PD event log. 5384 * TODO(crbug.com/751742): Make this host command more generic to accommodate 5385 * future non-PD logs that use the same internal EC event_log. 5386 */ 5387 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 5388 5389 struct ec_response_pd_log { 5390 uint32_t timestamp; /* relative timestamp in milliseconds */ 5391 uint8_t type; /* event type : see PD_EVENT_xx below */ 5392 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 5393 uint16_t data; /* type-defined data payload */ 5394 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */ 5395 } __ec_align4; 5396 5397 /* The timestamp is the microsecond counter shifted to get about a ms. */ 5398 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ 5399 5400 #define PD_LOG_SIZE_MASK 0x1f 5401 #define PD_LOG_PORT_MASK 0xe0 5402 #define PD_LOG_PORT_SHIFT 5 5403 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ 5404 ((size) & PD_LOG_SIZE_MASK)) 5405 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) 5406 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) 5407 5408 /* PD event log : entry types */ 5409 /* PD MCU events */ 5410 #define PD_EVENT_MCU_BASE 0x00 5411 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) 5412 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) 5413 /* Reserved for custom board event */ 5414 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) 5415 /* PD generic accessory events */ 5416 #define PD_EVENT_ACC_BASE 0x20 5417 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) 5418 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) 5419 /* PD power supply events */ 5420 #define PD_EVENT_PS_BASE 0x40 5421 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) 5422 /* PD video dongles events */ 5423 #define PD_EVENT_VIDEO_BASE 0x60 5424 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) 5425 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) 5426 /* Returned in the "type" field, when there is no entry available */ 5427 #define PD_EVENT_NO_ENTRY 0xff 5428 5429 /* 5430 * PD_EVENT_MCU_CHARGE event definition : 5431 * the payload is "struct usb_chg_measures" 5432 * the data field contains the port state flags as defined below : 5433 */ 5434 /* Port partner is a dual role device */ 5435 #define CHARGE_FLAGS_DUAL_ROLE BIT(15) 5436 /* Port is the pending override port */ 5437 #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) 5438 /* Port is the override port */ 5439 #define CHARGE_FLAGS_OVERRIDE BIT(13) 5440 /* Charger type */ 5441 #define CHARGE_FLAGS_TYPE_SHIFT 3 5442 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) 5443 /* Power delivery role */ 5444 #define CHARGE_FLAGS_ROLE_MASK (7 << 0) 5445 5446 /* 5447 * PD_EVENT_PS_FAULT data field flags definition : 5448 */ 5449 #define PS_FAULT_OCP 1 5450 #define PS_FAULT_FAST_OCP 2 5451 #define PS_FAULT_OVP 3 5452 #define PS_FAULT_DISCH 4 5453 5454 /* 5455 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". 5456 */ 5457 struct mcdp_version { 5458 uint8_t major; 5459 uint8_t minor; 5460 uint16_t build; 5461 } __ec_align4; 5462 5463 struct mcdp_info { 5464 uint8_t family[2]; 5465 uint8_t chipid[2]; 5466 struct mcdp_version irom; 5467 struct mcdp_version fw; 5468 } __ec_align4; 5469 5470 /* struct mcdp_info field decoding */ 5471 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 5472 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 5473 5474 /* Get/Set USB-PD Alternate mode info */ 5475 #define EC_CMD_USB_PD_GET_AMODE 0x0116 5476 struct ec_params_usb_pd_get_mode_request { 5477 uint16_t svid_idx; /* SVID index to get */ 5478 uint8_t port; /* port */ 5479 } __ec_align_size1; 5480 5481 struct ec_params_usb_pd_get_mode_response { 5482 uint16_t svid; /* SVID */ 5483 uint16_t opos; /* Object Position */ 5484 uint32_t vdo[6]; /* Mode VDOs */ 5485 } __ec_align4; 5486 5487 #define EC_CMD_USB_PD_SET_AMODE 0x0117 5488 5489 enum pd_mode_cmd { 5490 PD_EXIT_MODE = 0, 5491 PD_ENTER_MODE = 1, 5492 /* Not a command. Do NOT remove. */ 5493 PD_MODE_CMD_COUNT, 5494 }; 5495 5496 struct ec_params_usb_pd_set_mode_request { 5497 uint32_t cmd; /* enum pd_mode_cmd */ 5498 uint16_t svid; /* SVID to set */ 5499 uint8_t opos; /* Object Position */ 5500 uint8_t port; /* port */ 5501 } __ec_align4; 5502 5503 /* Ask the PD MCU to record a log of a requested type */ 5504 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 5505 5506 struct ec_params_pd_write_log_entry { 5507 uint8_t type; /* event type : see PD_EVENT_xx above */ 5508 uint8_t port; /* port#, or 0 for events unrelated to a given port */ 5509 } __ec_align1; 5510 5511 5512 /* Control USB-PD chip */ 5513 #define EC_CMD_PD_CONTROL 0x0119 5514 5515 enum ec_pd_control_cmd { 5516 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 5517 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 5518 PD_RESET, /* Force reset the PD chip */ 5519 PD_CONTROL_DISABLE, /* Disable further calls to this command */ 5520 PD_CHIP_ON, /* Power on the PD chip */ 5521 }; 5522 5523 struct ec_params_pd_control { 5524 uint8_t chip; /* chip id */ 5525 uint8_t subcmd; 5526 } __ec_align1; 5527 5528 /* Get info about USB-C SS muxes */ 5529 #define EC_CMD_USB_PD_MUX_INFO 0x011A 5530 5531 struct ec_params_usb_pd_mux_info { 5532 uint8_t port; /* USB-C port number */ 5533 } __ec_align1; 5534 5535 /* Flags representing mux state */ 5536 #define USB_PD_MUX_NONE 0 /* Open switch */ 5537 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ 5538 #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ 5539 #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ 5540 #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ 5541 #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ 5542 #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ 5543 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ 5544 #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ 5545 5546 struct ec_response_usb_pd_mux_info { 5547 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 5548 } __ec_align1; 5549 5550 #define EC_CMD_PD_CHIP_INFO 0x011B 5551 5552 struct ec_params_pd_chip_info { 5553 uint8_t port; /* USB-C port number */ 5554 uint8_t renew; /* Force renewal */ 5555 } __ec_align1; 5556 5557 struct ec_response_pd_chip_info { 5558 uint16_t vendor_id; 5559 uint16_t product_id; 5560 uint16_t device_id; 5561 union { 5562 uint8_t fw_version_string[8]; 5563 uint64_t fw_version_number; 5564 }; 5565 } __ec_align2; 5566 5567 struct ec_response_pd_chip_info_v1 { 5568 uint16_t vendor_id; 5569 uint16_t product_id; 5570 uint16_t device_id; 5571 union { 5572 uint8_t fw_version_string[8]; 5573 uint64_t fw_version_number; 5574 }; 5575 union { 5576 uint8_t min_req_fw_version_string[8]; 5577 uint64_t min_req_fw_version_number; 5578 }; 5579 } __ec_align2; 5580 5581 /* Run RW signature verification and get status */ 5582 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C 5583 5584 struct ec_response_rwsig_check_status { 5585 uint32_t status; 5586 } __ec_align4; 5587 5588 /* For controlling RWSIG task */ 5589 #define EC_CMD_RWSIG_ACTION 0x011D 5590 5591 enum rwsig_action { 5592 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 5593 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 5594 }; 5595 5596 struct ec_params_rwsig_action { 5597 uint32_t action; 5598 } __ec_align4; 5599 5600 /* Run verification on a slot */ 5601 #define EC_CMD_EFS_VERIFY 0x011E 5602 5603 struct ec_params_efs_verify { 5604 uint8_t region; /* enum ec_flash_region */ 5605 } __ec_align1; 5606 5607 /* 5608 * Retrieve info from Cros Board Info store. Response is based on the data 5609 * type. Integers return a uint32. Strings return a string, using the response 5610 * size to determine how big it is. 5611 */ 5612 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F 5613 /* 5614 * Write info into Cros Board Info on EEPROM. Write fails if the board has 5615 * hardware write-protect enabled. 5616 */ 5617 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 5618 5619 enum cbi_data_tag { 5620 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ 5621 CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ 5622 CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ 5623 CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ 5624 CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ 5625 CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ 5626 CBI_TAG_COUNT, 5627 }; 5628 5629 /* 5630 * Flags to control read operation 5631 * 5632 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 5633 * write was successful without reboot. 5634 */ 5635 #define CBI_GET_RELOAD BIT(0) 5636 5637 struct ec_params_get_cbi { 5638 uint32_t tag; /* enum cbi_data_tag */ 5639 uint32_t flag; /* CBI_GET_* */ 5640 } __ec_align4; 5641 5642 /* 5643 * Flags to control write behavior. 5644 * 5645 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 5646 * useful when writing multiple fields in a row. 5647 * INIT: Need to be set when creating a new CBI from scratch. All fields 5648 * will be initialized to zero first. 5649 */ 5650 #define CBI_SET_NO_SYNC BIT(0) 5651 #define CBI_SET_INIT BIT(1) 5652 5653 struct ec_params_set_cbi { 5654 uint32_t tag; /* enum cbi_data_tag */ 5655 uint32_t flag; /* CBI_SET_* */ 5656 uint32_t size; /* Data size */ 5657 uint8_t data[]; /* For string and raw data */ 5658 } __ec_align1; 5659 5660 /* 5661 * Information about resets of the AP by the EC and the EC's own uptime. 5662 */ 5663 #define EC_CMD_GET_UPTIME_INFO 0x0121 5664 5665 struct ec_response_uptime_info { 5666 /* 5667 * Number of milliseconds since the last EC boot. Sysjump resets 5668 * typically do not restart the EC's time_since_boot epoch. 5669 * 5670 * WARNING: The EC's sense of time is much less accurate than the AP's 5671 * sense of time, in both phase and frequency. This timebase is similar 5672 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. 5673 */ 5674 uint32_t time_since_ec_boot_ms; 5675 5676 /* 5677 * Number of times the AP was reset by the EC since the last EC boot. 5678 * Note that the AP may be held in reset by the EC during the initial 5679 * boot sequence, such that the very first AP boot may count as more 5680 * than one here. 5681 */ 5682 uint32_t ap_resets_since_ec_boot; 5683 5684 /* 5685 * The set of flags which describe the EC's most recent reset. See 5686 * include/system.h RESET_FLAG_* for details. 5687 */ 5688 uint32_t ec_reset_flags; 5689 5690 /* Empty log entries have both the cause and timestamp set to zero. */ 5691 struct ap_reset_log_entry { 5692 /* 5693 * See include/chipset.h: enum chipset_{reset,shutdown}_reason 5694 * for details. 5695 */ 5696 uint16_t reset_cause; 5697 5698 /* Reserved for protocol growth. */ 5699 uint16_t reserved; 5700 5701 /* 5702 * The time of the reset's assertion, in milliseconds since the 5703 * last EC boot, in the same epoch as time_since_ec_boot_ms. 5704 * Set to zero if the log entry is empty. 5705 */ 5706 uint32_t reset_time_ms; 5707 } recent_ap_reset[4]; 5708 } __ec_align4; 5709 5710 /* 5711 * Add entropy to the device secret (stored in the rollback region). 5712 * 5713 * Depending on the chip, the operation may take a long time (e.g. to erase 5714 * flash), so the commands are asynchronous. 5715 */ 5716 #define EC_CMD_ADD_ENTROPY 0x0122 5717 5718 enum add_entropy_action { 5719 /* Add entropy to the current secret. */ 5720 ADD_ENTROPY_ASYNC = 0, 5721 /* 5722 * Add entropy, and also make sure that the previous secret is erased. 5723 * (this can be implemented by adding entropy multiple times until 5724 * all rolback blocks have been overwritten). 5725 */ 5726 ADD_ENTROPY_RESET_ASYNC = 1, 5727 /* Read back result from the previous operation. */ 5728 ADD_ENTROPY_GET_RESULT = 2, 5729 }; 5730 5731 struct ec_params_rollback_add_entropy { 5732 uint8_t action; 5733 } __ec_align1; 5734 5735 /* 5736 * Perform a single read of a given ADC channel. 5737 */ 5738 #define EC_CMD_ADC_READ 0x0123 5739 5740 struct ec_params_adc_read { 5741 uint8_t adc_channel; 5742 } __ec_align1; 5743 5744 struct ec_response_adc_read { 5745 int32_t adc_value; 5746 } __ec_align4; 5747 5748 /* 5749 * Read back rollback info 5750 */ 5751 #define EC_CMD_ROLLBACK_INFO 0x0124 5752 5753 struct ec_response_rollback_info { 5754 int32_t id; /* Incrementing number to indicate which region to use. */ 5755 int32_t rollback_min_version; 5756 int32_t rw_rollback_version; 5757 } __ec_align4; 5758 5759 5760 /* Issue AP reset */ 5761 #define EC_CMD_AP_RESET 0x0125 5762 5763 /* 5764 * Get the number of peripheral charge ports 5765 */ 5766 #define EC_CMD_PCHG_COUNT 0x0134 5767 5768 #define EC_PCHG_MAX_PORTS 8 5769 5770 struct ec_response_pchg_count { 5771 uint8_t port_count; 5772 } __ec_align1; 5773 5774 /* 5775 * Get the status of a peripheral charge port 5776 */ 5777 #define EC_CMD_PCHG 0x0135 5778 5779 struct ec_params_pchg { 5780 uint8_t port; 5781 } __ec_align1; 5782 5783 struct ec_response_pchg { 5784 uint32_t error; /* enum pchg_error */ 5785 uint8_t state; /* enum pchg_state state */ 5786 uint8_t battery_percentage; 5787 uint8_t unused0; 5788 uint8_t unused1; 5789 /* Fields added in version 1 */ 5790 uint32_t fw_version; 5791 uint32_t dropped_event_count; 5792 } __ec_align2; 5793 5794 enum pchg_state { 5795 /* Charger is reset and not initialized. */ 5796 PCHG_STATE_RESET = 0, 5797 /* Charger is initialized or disabled. */ 5798 PCHG_STATE_INITIALIZED, 5799 /* Charger is enabled and ready to detect a device. */ 5800 PCHG_STATE_ENABLED, 5801 /* Device is in proximity. */ 5802 PCHG_STATE_DETECTED, 5803 /* Device is being charged. */ 5804 PCHG_STATE_CHARGING, 5805 /* Device is fully charged. It implies DETECTED (& not charging). */ 5806 PCHG_STATE_FULL, 5807 /* In download (a.k.a. firmware update) mode */ 5808 PCHG_STATE_DOWNLOAD, 5809 /* In download mode. Ready for receiving data. */ 5810 PCHG_STATE_DOWNLOADING, 5811 /* Device is ready for data communication. */ 5812 PCHG_STATE_CONNECTED, 5813 /* Put no more entry below */ 5814 PCHG_STATE_COUNT, 5815 }; 5816 5817 #define EC_PCHG_STATE_TEXT { \ 5818 [PCHG_STATE_RESET] = "RESET", \ 5819 [PCHG_STATE_INITIALIZED] = "INITIALIZED", \ 5820 [PCHG_STATE_ENABLED] = "ENABLED", \ 5821 [PCHG_STATE_DETECTED] = "DETECTED", \ 5822 [PCHG_STATE_CHARGING] = "CHARGING", \ 5823 [PCHG_STATE_FULL] = "FULL", \ 5824 [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \ 5825 [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \ 5826 [PCHG_STATE_CONNECTED] = "CONNECTED", \ 5827 } 5828 5829 /* 5830 * Update firmware of peripheral chip 5831 */ 5832 #define EC_CMD_PCHG_UPDATE 0x0136 5833 5834 /* Port number is encoded in bit[28:31]. */ 5835 #define EC_MKBP_PCHG_PORT_SHIFT 28 5836 /* Utility macro for converting MKBP event to port number. */ 5837 #define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf) 5838 /* Utility macro for extracting event bits. */ 5839 #define EC_MKBP_PCHG_EVENT_MASK(e) ((e) \ 5840 & GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0)) 5841 5842 #define EC_MKBP_PCHG_UPDATE_OPENED BIT(0) 5843 #define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1) 5844 #define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2) 5845 #define EC_MKBP_PCHG_UPDATE_ERROR BIT(3) 5846 #define EC_MKBP_PCHG_DEVICE_EVENT BIT(4) 5847 5848 enum ec_pchg_update_cmd { 5849 /* Reset chip to normal mode. */ 5850 EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0, 5851 /* Reset and put a chip in update (a.k.a. download) mode. */ 5852 EC_PCHG_UPDATE_CMD_OPEN, 5853 /* Write a block of data containing FW image. */ 5854 EC_PCHG_UPDATE_CMD_WRITE, 5855 /* Close update session. */ 5856 EC_PCHG_UPDATE_CMD_CLOSE, 5857 /* End of commands */ 5858 EC_PCHG_UPDATE_CMD_COUNT, 5859 }; 5860 5861 struct ec_params_pchg_update { 5862 /* PCHG port number */ 5863 uint8_t port; 5864 /* enum ec_pchg_update_cmd */ 5865 uint8_t cmd; 5866 /* Padding */ 5867 uint8_t reserved0; 5868 uint8_t reserved1; 5869 /* Version of new firmware */ 5870 uint32_t version; 5871 /* CRC32 of new firmware */ 5872 uint32_t crc32; 5873 /* Address in chip memory where <data> is written to */ 5874 uint32_t addr; 5875 /* Size of <data> */ 5876 uint32_t size; 5877 /* Partial data of new firmware */ 5878 uint8_t data[]; 5879 } __ec_align4; 5880 5881 BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT 5882 < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8)); 5883 5884 struct ec_response_pchg_update { 5885 /* Block size */ 5886 uint32_t block_size; 5887 } __ec_align4; 5888 5889 5890 /*****************************************************************************/ 5891 /* Voltage regulator controls */ 5892 5893 /* 5894 * Get basic info of voltage regulator for given index. 5895 * 5896 * Returns the regulator name and supported voltage list in mV. 5897 */ 5898 #define EC_CMD_REGULATOR_GET_INFO 0x012C 5899 5900 /* Maximum length of regulator name */ 5901 #define EC_REGULATOR_NAME_MAX_LEN 16 5902 5903 /* Maximum length of the supported voltage list. */ 5904 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16 5905 5906 struct ec_params_regulator_get_info { 5907 uint32_t index; 5908 } __ec_align4; 5909 5910 struct ec_response_regulator_get_info { 5911 char name[EC_REGULATOR_NAME_MAX_LEN]; 5912 uint16_t num_voltages; 5913 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT]; 5914 } __ec_align2; 5915 5916 /* 5917 * Configure the regulator as enabled / disabled. 5918 */ 5919 #define EC_CMD_REGULATOR_ENABLE 0x012D 5920 5921 struct ec_params_regulator_enable { 5922 uint32_t index; 5923 uint8_t enable; 5924 } __ec_align4; 5925 5926 /* 5927 * Query if the regulator is enabled. 5928 * 5929 * Returns 1 if the regulator is enabled, 0 if not. 5930 */ 5931 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E 5932 5933 struct ec_params_regulator_is_enabled { 5934 uint32_t index; 5935 } __ec_align4; 5936 5937 struct ec_response_regulator_is_enabled { 5938 uint8_t enabled; 5939 } __ec_align1; 5940 5941 /* 5942 * Set voltage for the voltage regulator within the range specified. 5943 * 5944 * The driver should select the voltage in range closest to min_mv. 5945 * 5946 * Also note that this might be called before the regulator is enabled, and the 5947 * setting should be in effect after the regulator is enabled. 5948 */ 5949 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F 5950 5951 struct ec_params_regulator_set_voltage { 5952 uint32_t index; 5953 uint32_t min_mv; 5954 uint32_t max_mv; 5955 } __ec_align4; 5956 5957 /* 5958 * Get the currently configured voltage for the voltage regulator. 5959 * 5960 * Note that this might be called before the regulator is enabled, and this 5961 * should return the configured output voltage if the regulator is enabled. 5962 */ 5963 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130 5964 5965 struct ec_params_regulator_get_voltage { 5966 uint32_t index; 5967 } __ec_align4; 5968 5969 struct ec_response_regulator_get_voltage { 5970 uint32_t voltage_mv; 5971 } __ec_align4; 5972 5973 /* 5974 * Gather all discovery information for the given port and partner type. 5975 * 5976 * Note that if discovery has not yet completed, only the currently completed 5977 * responses will be filled in. If the discovery data structures are changed 5978 * in the process of the command running, BUSY will be returned. 5979 * 5980 * VDO field sizes are set to the maximum possible number of VDOs a VDM may 5981 * contain, while the number of SVIDs here is selected to fit within the PROTO2 5982 * maximum parameter size. 5983 */ 5984 #define EC_CMD_TYPEC_DISCOVERY 0x0131 5985 5986 enum typec_partner_type { 5987 TYPEC_PARTNER_SOP = 0, 5988 TYPEC_PARTNER_SOP_PRIME = 1, 5989 }; 5990 5991 struct ec_params_typec_discovery { 5992 uint8_t port; 5993 uint8_t partner_type; /* enum typec_partner_type */ 5994 } __ec_align1; 5995 5996 struct svid_mode_info { 5997 uint16_t svid; 5998 uint16_t mode_count; /* Number of modes partner sent */ 5999 uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 6000 }; 6001 6002 struct ec_response_typec_discovery { 6003 uint8_t identity_count; /* Number of identity VDOs partner sent */ 6004 uint8_t svid_count; /* Number of SVIDs partner sent */ 6005 uint16_t reserved; 6006 uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 6007 struct svid_mode_info svids[]; 6008 } __ec_align1; 6009 6010 /* USB Type-C commands for AP-controlled device policy. */ 6011 #define EC_CMD_TYPEC_CONTROL 0x0132 6012 6013 enum typec_control_command { 6014 TYPEC_CONTROL_COMMAND_EXIT_MODES, 6015 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, 6016 TYPEC_CONTROL_COMMAND_ENTER_MODE, 6017 TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY, 6018 TYPEC_CONTROL_COMMAND_USB_MUX_SET, 6019 TYPEC_CONTROL_COMMAND_BIST_SHARE_MODE, 6020 TYPEC_CONTROL_COMMAND_SEND_VDM_REQ, 6021 }; 6022 6023 /* Replies the AP may specify to the TBT EnterMode command as a UFP */ 6024 enum typec_tbt_ufp_reply { 6025 TYPEC_TBT_UFP_REPLY_NAK, 6026 TYPEC_TBT_UFP_REPLY_ACK, 6027 }; 6028 6029 struct typec_usb_mux_set { 6030 uint8_t mux_index; /* Index of the mux to set in the chain */ 6031 uint8_t mux_flags; /* USB_PD_MUX_*-encoded USB mux state to set */ 6032 } __ec_align1; 6033 6034 #define VDO_MAX_SIZE 7 6035 6036 struct typec_vdm_req { 6037 /* VDM data, including VDM header */ 6038 uint32_t vdm_data[VDO_MAX_SIZE]; 6039 /* Number of 32-bit fields filled in */ 6040 uint8_t vdm_data_objects; 6041 /* Partner to address - see enum typec_partner_type */ 6042 uint8_t partner_type; 6043 } __ec_align1; 6044 6045 struct ec_params_typec_control { 6046 uint8_t port; 6047 uint8_t command; /* enum typec_control_command */ 6048 uint16_t reserved; 6049 6050 /* 6051 * This section will be interpreted based on |command|. Define a 6052 * placeholder structure to avoid having to increase the size and bump 6053 * the command version when adding new sub-commands. 6054 */ 6055 union { 6056 uint32_t clear_events_mask; 6057 uint8_t mode_to_enter; /* enum typec_mode */ 6058 uint8_t tbt_ufp_reply; /* enum typec_tbt_ufp_reply */ 6059 struct typec_usb_mux_set mux_params; 6060 /* Used for VMD_REQ */ 6061 struct typec_vdm_req vdm_req_params; 6062 uint8_t placeholder[128]; 6063 }; 6064 } __ec_align1; 6065 6066 /* 6067 * Gather all status information for a port. 6068 * 6069 * Note: this covers many of the return fields from the deprecated 6070 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the 6071 * discovery data. The "enum pd_cc_states" is defined with the deprecated 6072 * EC_CMD_USB_PD_CONTROL command. 6073 * 6074 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags. 6075 */ 6076 #define EC_CMD_TYPEC_STATUS 0x0133 6077 6078 /* 6079 * Power role. 6080 * 6081 * Note this is also used for PD header creation, and values align to those in 6082 * the Power Delivery Specification Revision 3.0 (See 6083 * 6.2.1.1.4 Port Power Role). 6084 */ 6085 enum pd_power_role { 6086 PD_ROLE_SINK = 0, 6087 PD_ROLE_SOURCE = 1 6088 }; 6089 6090 /* 6091 * Data role. 6092 * 6093 * Note this is also used for PD header creation, and the first two values 6094 * align to those in the Power Delivery Specification Revision 3.0 (See 6095 * 6.2.1.1.6 Port Data Role). 6096 */ 6097 enum pd_data_role { 6098 PD_ROLE_UFP = 0, 6099 PD_ROLE_DFP = 1, 6100 PD_ROLE_DISCONNECTED = 2, 6101 }; 6102 6103 enum pd_vconn_role { 6104 PD_ROLE_VCONN_OFF = 0, 6105 PD_ROLE_VCONN_SRC = 1, 6106 }; 6107 6108 /* 6109 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2, 6110 * regardless of whether a debug accessory is connected. 6111 */ 6112 enum tcpc_cc_polarity { 6113 /* 6114 * _CCx: is used to indicate the polarity while not connected to 6115 * a Debug Accessory. Only one CC line will assert a resistor and 6116 * the other will be open. 6117 */ 6118 POLARITY_CC1 = 0, 6119 POLARITY_CC2 = 1, 6120 6121 /* 6122 * _CCx_DTS is used to indicate the polarity while connected to a 6123 * SRC Debug Accessory. Assert resistors on both lines. 6124 */ 6125 POLARITY_CC1_DTS = 2, 6126 POLARITY_CC2_DTS = 3, 6127 6128 /* 6129 * The current TCPC code relies on these specific POLARITY values. 6130 * Adding in a check to verify if the list grows for any reason 6131 * that this will give a hint that other places need to be 6132 * adjusted. 6133 */ 6134 POLARITY_COUNT 6135 }; 6136 6137 #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) 6138 #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) 6139 #define PD_STATUS_EVENT_HARD_RESET BIT(2) 6140 #define PD_STATUS_EVENT_DISCONNECTED BIT(3) 6141 #define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4) 6142 #define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5) 6143 #define PD_STATUS_EVENT_VDM_REQ_REPLY BIT(6) 6144 #define PD_STATUS_EVENT_VDM_REQ_FAILED BIT(7) 6145 #define PD_STATUS_EVENT_VDM_ATTENTION BIT(8) 6146 6147 struct ec_params_typec_status { 6148 uint8_t port; 6149 } __ec_align1; 6150 6151 struct ec_response_typec_status { 6152 uint8_t pd_enabled; /* PD communication enabled - bool */ 6153 uint8_t dev_connected; /* Device connected - bool */ 6154 uint8_t sop_connected; /* Device is SOP PD capable - bool */ 6155 uint8_t source_cap_count; /* Number of Source Cap PDOs */ 6156 6157 uint8_t power_role; /* enum pd_power_role */ 6158 uint8_t data_role; /* enum pd_data_role */ 6159 uint8_t vconn_role; /* enum pd_vconn_role */ 6160 uint8_t sink_cap_count; /* Number of Sink Cap PDOs */ 6161 6162 uint8_t polarity; /* enum tcpc_cc_polarity */ 6163 uint8_t cc_state; /* enum pd_cc_states */ 6164 uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */ 6165 uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */ 6166 6167 char tc_state[32]; /* TC state name */ 6168 6169 uint32_t events; /* PD_STATUS_EVENT bitmask */ 6170 6171 /* 6172 * BCD PD revisions for partners 6173 * 6174 * The format has the PD major reversion in the upper nibble, and PD 6175 * minor version in the next nibble. Following two nibbles are 6176 * currently 0. 6177 * ex. PD 3.2 would map to 0x3200 6178 * 6179 * PD major/minor will be 0 if no PD device is connected. 6180 */ 6181 uint16_t sop_revision; 6182 uint16_t sop_prime_revision; 6183 6184 uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */ 6185 6186 uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ 6187 } __ec_align1; 6188 6189 /* 6190 * Gather the response to the most recent VDM REQ from the AP, as well 6191 * as popping the oldest VDM:Attention from the DPM queue 6192 */ 6193 #define EC_CMD_TYPEC_VDM_RESPONSE 0x013C 6194 6195 struct ec_params_typec_vdm_response { 6196 uint8_t port; 6197 } __ec_align1; 6198 6199 struct ec_response_typec_vdm_response { 6200 /* Number of 32-bit fields filled in */ 6201 uint8_t vdm_data_objects; 6202 /* Partner to address - see enum typec_partner_type */ 6203 uint8_t partner_type; 6204 /* enum ec_status describing VDM response */ 6205 uint16_t vdm_response_err; 6206 /* VDM data, including VDM header */ 6207 uint32_t vdm_response[VDO_MAX_SIZE]; 6208 /* Number of 32-bit Attention fields filled in */ 6209 uint8_t vdm_attention_objects; 6210 /* Number of remaining messages to consume */ 6211 uint8_t vdm_attention_left; 6212 /* Reserved */ 6213 uint16_t reserved1; 6214 /* VDM:Attention contents */ 6215 uint32_t vdm_attention[2]; 6216 } __ec_align1; 6217 6218 #undef VDO_MAX_SIZE 6219 6220 /* 6221 * UCSI OPM-PPM commands 6222 * 6223 * These commands are used for communication between OPM and PPM. 6224 * Only UCSI3.0 is tested. 6225 */ 6226 6227 #define EC_CMD_UCSI_PPM_SET 0x0140 6228 6229 /* The data size is stored in the host command protocol header. */ 6230 struct ec_params_ucsi_ppm_set { 6231 uint16_t offset; 6232 uint8_t data[]; 6233 } __ec_align2; 6234 6235 #define EC_CMD_UCSI_PPM_GET 0x0141 6236 6237 /* For 'GET' sub-commands, data will be returned as a raw payload. */ 6238 struct ec_params_ucsi_ppm_get { 6239 uint16_t offset; 6240 uint8_t size; 6241 } __ec_align2; 6242 6243 /*****************************************************************************/ 6244 /* The command range 0x200-0x2FF is reserved for Rotor. */ 6245 6246 /*****************************************************************************/ 6247 /* 6248 * Reserve a range of host commands for the CR51 firmware. 6249 */ 6250 #define EC_CMD_CR51_BASE 0x0300 6251 #define EC_CMD_CR51_LAST 0x03FF 6252 6253 /*****************************************************************************/ 6254 /* Fingerprint MCU commands: range 0x0400-0x040x */ 6255 6256 /* Fingerprint SPI sensor passthru command: prototyping ONLY */ 6257 #define EC_CMD_FP_PASSTHRU 0x0400 6258 6259 #define EC_FP_FLAG_NOT_COMPLETE 0x1 6260 6261 struct ec_params_fp_passthru { 6262 uint16_t len; /* Number of bytes to write then read */ 6263 uint16_t flags; /* EC_FP_FLAG_xxx */ 6264 uint8_t data[]; /* Data to send */ 6265 } __ec_align2; 6266 6267 /* Configure the Fingerprint MCU behavior */ 6268 #define EC_CMD_FP_MODE 0x0402 6269 6270 /* Put the sensor in its lowest power mode */ 6271 #define FP_MODE_DEEPSLEEP BIT(0) 6272 /* Wait to see a finger on the sensor */ 6273 #define FP_MODE_FINGER_DOWN BIT(1) 6274 /* Poll until the finger has left the sensor */ 6275 #define FP_MODE_FINGER_UP BIT(2) 6276 /* Capture the current finger image */ 6277 #define FP_MODE_CAPTURE BIT(3) 6278 /* Finger enrollment session on-going */ 6279 #define FP_MODE_ENROLL_SESSION BIT(4) 6280 /* Enroll the current finger image */ 6281 #define FP_MODE_ENROLL_IMAGE BIT(5) 6282 /* Try to match the current finger image */ 6283 #define FP_MODE_MATCH BIT(6) 6284 /* Reset and re-initialize the sensor. */ 6285 #define FP_MODE_RESET_SENSOR BIT(7) 6286 /* special value: don't change anything just read back current mode */ 6287 #define FP_MODE_DONT_CHANGE BIT(31) 6288 6289 #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ 6290 FP_MODE_FINGER_DOWN | \ 6291 FP_MODE_FINGER_UP | \ 6292 FP_MODE_CAPTURE | \ 6293 FP_MODE_ENROLL_SESSION | \ 6294 FP_MODE_ENROLL_IMAGE | \ 6295 FP_MODE_MATCH | \ 6296 FP_MODE_RESET_SENSOR | \ 6297 FP_MODE_DONT_CHANGE) 6298 6299 /* Capture types defined in bits [30..28] */ 6300 #define FP_MODE_CAPTURE_TYPE_SHIFT 28 6301 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) 6302 /* 6303 * This enum must remain ordered, if you add new values you must ensure that 6304 * FP_CAPTURE_TYPE_MAX is still the last one. 6305 */ 6306 enum fp_capture_type { 6307 /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ 6308 FP_CAPTURE_VENDOR_FORMAT = 0, 6309 /* Simple raw image capture (produces width x height x bpp bits) */ 6310 FP_CAPTURE_SIMPLE_IMAGE = 1, 6311 /* Self test pattern (e.g. checkerboard) */ 6312 FP_CAPTURE_PATTERN0 = 2, 6313 /* Self test pattern (e.g. inverted checkerboard) */ 6314 FP_CAPTURE_PATTERN1 = 3, 6315 /* Capture for Quality test with fixed contrast */ 6316 FP_CAPTURE_QUALITY_TEST = 4, 6317 /* Capture for pixel reset value test */ 6318 FP_CAPTURE_RESET_TEST = 5, 6319 FP_CAPTURE_TYPE_MAX, 6320 }; 6321 /* Extracts the capture type from the sensor 'mode' word */ 6322 #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ 6323 >> FP_MODE_CAPTURE_TYPE_SHIFT) 6324 6325 struct ec_params_fp_mode { 6326 uint32_t mode; /* as defined by FP_MODE_ constants */ 6327 } __ec_align4; 6328 6329 struct ec_response_fp_mode { 6330 uint32_t mode; /* as defined by FP_MODE_ constants */ 6331 } __ec_align4; 6332 6333 /* Retrieve Fingerprint sensor information */ 6334 #define EC_CMD_FP_INFO 0x0403 6335 6336 /* Number of dead pixels detected on the last maintenance */ 6337 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) 6338 /* Unknown number of dead pixels detected on the last maintenance */ 6339 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) 6340 /* No interrupt from the sensor */ 6341 #define FP_ERROR_NO_IRQ BIT(12) 6342 /* SPI communication error */ 6343 #define FP_ERROR_SPI_COMM BIT(13) 6344 /* Invalid sensor Hardware ID */ 6345 #define FP_ERROR_BAD_HWID BIT(14) 6346 /* Sensor initialization failed */ 6347 #define FP_ERROR_INIT_FAIL BIT(15) 6348 6349 struct ec_response_fp_info_v0 { 6350 /* Sensor identification */ 6351 uint32_t vendor_id; 6352 uint32_t product_id; 6353 uint32_t model_id; 6354 uint32_t version; 6355 /* Image frame characteristics */ 6356 uint32_t frame_size; 6357 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 6358 uint16_t width; 6359 uint16_t height; 6360 uint16_t bpp; 6361 uint16_t errors; /* see FP_ERROR_ flags above */ 6362 } __ec_align4; 6363 6364 struct ec_response_fp_info { 6365 /* Sensor identification */ 6366 uint32_t vendor_id; 6367 uint32_t product_id; 6368 uint32_t model_id; 6369 uint32_t version; 6370 /* Image frame characteristics */ 6371 uint32_t frame_size; 6372 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 6373 uint16_t width; 6374 uint16_t height; 6375 uint16_t bpp; 6376 uint16_t errors; /* see FP_ERROR_ flags above */ 6377 /* Template/finger current information */ 6378 uint32_t template_size; /* max template size in bytes */ 6379 uint16_t template_max; /* maximum number of fingers/templates */ 6380 uint16_t template_valid; /* number of valid fingers/templates */ 6381 uint32_t template_dirty; /* bitmap of templates with MCU side changes */ 6382 uint32_t template_version; /* version of the template format */ 6383 } __ec_align4; 6384 6385 /* Get the last captured finger frame or a template content */ 6386 #define EC_CMD_FP_FRAME 0x0404 6387 6388 /* constants defining the 'offset' field which also contains the frame index */ 6389 #define FP_FRAME_INDEX_SHIFT 28 6390 /* Frame buffer where the captured image is stored */ 6391 #define FP_FRAME_INDEX_RAW_IMAGE 0 6392 /* First frame buffer holding a template */ 6393 #define FP_FRAME_INDEX_TEMPLATE 1 6394 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) 6395 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF 6396 6397 /* Version of the format of the encrypted templates. */ 6398 #define FP_TEMPLATE_FORMAT_VERSION 3 6399 6400 /* Constants for encryption parameters */ 6401 #define FP_CONTEXT_NONCE_BYTES 12 6402 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) 6403 #define FP_CONTEXT_TAG_BYTES 16 6404 #define FP_CONTEXT_SALT_BYTES 16 6405 #define FP_CONTEXT_TPM_BYTES 32 6406 6407 struct ec_fp_template_encryption_metadata { 6408 /* 6409 * Version of the structure format (N=3). 6410 */ 6411 uint16_t struct_version; 6412 /* Reserved bytes, set to 0. */ 6413 uint16_t reserved; 6414 /* 6415 * The salt is *only* ever used for key derivation. The nonce is unique, 6416 * a different one is used for every message. 6417 */ 6418 uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; 6419 uint8_t salt[FP_CONTEXT_SALT_BYTES]; 6420 uint8_t tag[FP_CONTEXT_TAG_BYTES]; 6421 }; 6422 6423 struct ec_params_fp_frame { 6424 /* 6425 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE 6426 * in the high nibble, and the real offset within the frame in 6427 * FP_FRAME_OFFSET_MASK. 6428 */ 6429 uint32_t offset; 6430 uint32_t size; 6431 } __ec_align4; 6432 6433 /* Load a template into the MCU */ 6434 #define EC_CMD_FP_TEMPLATE 0x0405 6435 6436 /* Flag in the 'size' field indicating that the full template has been sent */ 6437 #define FP_TEMPLATE_COMMIT 0x80000000 6438 6439 struct ec_params_fp_template { 6440 uint32_t offset; 6441 uint32_t size; 6442 uint8_t data[]; 6443 } __ec_align4; 6444 6445 /* Clear the current fingerprint user context and set a new one */ 6446 #define EC_CMD_FP_CONTEXT 0x0406 6447 6448 struct ec_params_fp_context { 6449 uint32_t userid[FP_CONTEXT_USERID_WORDS]; 6450 } __ec_align4; 6451 6452 #define EC_CMD_FP_STATS 0x0407 6453 6454 #define FPSTATS_CAPTURE_INV BIT(0) 6455 #define FPSTATS_MATCHING_INV BIT(1) 6456 6457 struct ec_response_fp_stats { 6458 uint32_t capture_time_us; 6459 uint32_t matching_time_us; 6460 uint32_t overall_time_us; 6461 struct { 6462 uint32_t lo; 6463 uint32_t hi; 6464 } overall_t0; 6465 uint8_t timestamps_invalid; 6466 int8_t template_matched; 6467 } __ec_align2; 6468 6469 #define EC_CMD_FP_SEED 0x0408 6470 struct ec_params_fp_seed { 6471 /* 6472 * Version of the structure format (N=3). 6473 */ 6474 uint16_t struct_version; 6475 /* Reserved bytes, set to 0. */ 6476 uint16_t reserved; 6477 /* Seed from the TPM. */ 6478 uint8_t seed[FP_CONTEXT_TPM_BYTES]; 6479 } __ec_align4; 6480 6481 #define EC_CMD_FP_ENC_STATUS 0x0409 6482 6483 /* FP TPM seed has been set or not */ 6484 #define FP_ENC_STATUS_SEED_SET BIT(0) 6485 6486 struct ec_response_fp_encryption_status { 6487 /* Used bits in encryption engine status */ 6488 uint32_t valid_flags; 6489 /* Encryption engine status */ 6490 uint32_t status; 6491 } __ec_align4; 6492 6493 /*****************************************************************************/ 6494 /* Touchpad MCU commands: range 0x0500-0x05FF */ 6495 6496 /* Perform touchpad self test */ 6497 #define EC_CMD_TP_SELF_TEST 0x0500 6498 6499 /* Get number of frame types, and the size of each type */ 6500 #define EC_CMD_TP_FRAME_INFO 0x0501 6501 6502 struct ec_response_tp_frame_info { 6503 uint32_t n_frames; 6504 uint32_t frame_sizes[]; 6505 } __ec_align4; 6506 6507 /* Create a snapshot of current frame readings */ 6508 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 6509 6510 /* Read the frame */ 6511 #define EC_CMD_TP_FRAME_GET 0x0503 6512 6513 struct ec_params_tp_frame_get { 6514 uint32_t frame_index; 6515 uint32_t offset; 6516 uint32_t size; 6517 } __ec_align4; 6518 6519 /*****************************************************************************/ 6520 /* EC-EC communication commands: range 0x0600-0x06FF */ 6521 6522 #define EC_COMM_TEXT_MAX 8 6523 6524 /* 6525 * Get battery static information, i.e. information that never changes, or 6526 * very infrequently. 6527 */ 6528 #define EC_CMD_BATTERY_GET_STATIC 0x0600 6529 6530 /** 6531 * struct ec_params_battery_static_info - Battery static info parameters 6532 * @index: Battery index. 6533 */ 6534 struct ec_params_battery_static_info { 6535 uint8_t index; 6536 } __ec_align_size1; 6537 6538 /** 6539 * struct ec_response_battery_static_info - Battery static info response 6540 * @design_capacity: Battery Design Capacity (mAh) 6541 * @design_voltage: Battery Design Voltage (mV) 6542 * @manufacturer: Battery Manufacturer String 6543 * @model: Battery Model Number String 6544 * @serial: Battery Serial Number String 6545 * @type: Battery Type String 6546 * @cycle_count: Battery Cycle Count 6547 */ 6548 struct ec_response_battery_static_info { 6549 uint16_t design_capacity; 6550 uint16_t design_voltage; 6551 char manufacturer[EC_COMM_TEXT_MAX]; 6552 char model[EC_COMM_TEXT_MAX]; 6553 char serial[EC_COMM_TEXT_MAX]; 6554 char type[EC_COMM_TEXT_MAX]; 6555 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ 6556 uint32_t cycle_count; 6557 } __ec_align4; 6558 6559 /* 6560 * Get battery dynamic information, i.e. information that is likely to change 6561 * every time it is read. 6562 */ 6563 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 6564 6565 /** 6566 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters 6567 * @index: Battery index. 6568 */ 6569 struct ec_params_battery_dynamic_info { 6570 uint8_t index; 6571 } __ec_align_size1; 6572 6573 /** 6574 * struct ec_response_battery_dynamic_info - Battery dynamic info response 6575 * @actual_voltage: Battery voltage (mV) 6576 * @actual_current: Battery current (mA); negative=discharging 6577 * @remaining_capacity: Remaining capacity (mAh) 6578 * @full_capacity: Capacity (mAh, might change occasionally) 6579 * @flags: Flags, see EC_BATT_FLAG_* 6580 * @desired_voltage: Charging voltage desired by battery (mV) 6581 * @desired_current: Charging current desired by battery (mA) 6582 */ 6583 struct ec_response_battery_dynamic_info { 6584 int16_t actual_voltage; 6585 int16_t actual_current; 6586 int16_t remaining_capacity; 6587 int16_t full_capacity; 6588 int16_t flags; 6589 int16_t desired_voltage; 6590 int16_t desired_current; 6591 } __ec_align2; 6592 6593 /* 6594 * Control charger chip. Used to control charger chip on the slave. 6595 */ 6596 #define EC_CMD_CHARGER_CONTROL 0x0602 6597 6598 /** 6599 * struct ec_params_charger_control - Charger control parameters 6600 * @max_current: Charger current (mA). Positive to allow base to draw up to 6601 * max_current and (possibly) charge battery, negative to request current 6602 * from base (OTG). 6603 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is 6604 * >= 0. 6605 * @allow_charging: Allow base battery charging (only makes sense if 6606 * max_current > 0). 6607 */ 6608 struct ec_params_charger_control { 6609 int16_t max_current; 6610 uint16_t otg_voltage; 6611 uint8_t allow_charging; 6612 } __ec_align_size1; 6613 6614 /* Get ACK from the USB-C SS muxes */ 6615 #define EC_CMD_USB_PD_MUX_ACK 0x0603 6616 6617 struct ec_params_usb_pd_mux_ack { 6618 uint8_t port; /* USB-C port number */ 6619 } __ec_align1; 6620 6621 /** 6622 * Power monitoring. Used to read power consumptions on rails 6623 */ 6624 #define EC_CMD_PWRMON 0x0608 6625 6626 enum ec_pwrmon_cmd { 6627 EC_PWRMON_GET_CHANNEL_COUNT = 0, 6628 EC_PWRMON_DUMP_INFO = 1, 6629 EC_PWRMON_SET_RATE = 2, 6630 EC_PWRMON_GET_RATE = 3, 6631 EC_PWRMON_START = 4, 6632 EC_PWRMON_STOP = 5, 6633 EC_PWRMON_LATCH = 6, 6634 }; 6635 6636 struct ec_params_pwrmon { 6637 uint8_t cmd; 6638 union { 6639 uint16_t set_rate; 6640 uint8_t channel_id; 6641 } __ec_align2; 6642 6643 /* 6644 * The following commands have no args: 6645 * 6646 * start, stop, latch 6647 * 6648 */ 6649 } __ec_align4; 6650 6651 struct pwrmon_dump_info { 6652 uint8_t channel_id; 6653 char channel_name[32]; 6654 } __ec_align4; 6655 6656 struct ec_response_pwrmon { 6657 union { 6658 uint16_t sample_rate; 6659 uint8_t channel_count; 6660 struct pwrmon_dump_info dump_info; 6661 } __ec_align4; 6662 } __ec_align4; 6663 6664 /*****************************************************************************/ 6665 /* 6666 * Reserve a range of host commands for board-specific, experimental, or 6667 * special purpose features. These can be (re)used without updating this file. 6668 * 6669 * CAUTION: Don't go nuts with this. Shipping products should document ALL 6670 * their EC commands for easier development, testing, debugging, and support. 6671 * 6672 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 6673 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 6674 * 6675 * In your experimental code, you may want to do something like this: 6676 * 6677 * #define EC_CMD_MAGIC_FOO 0x0000 6678 * #define EC_CMD_MAGIC_BAR 0x0001 6679 * #define EC_CMD_MAGIC_HEY 0x0002 6680 * 6681 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 6682 * EC_VER_MASK(0); 6683 * 6684 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 6685 * EC_VER_MASK(0); 6686 * 6687 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 6688 * EC_VER_MASK(0); 6689 */ 6690 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 6691 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 6692 6693 /* 6694 * Given the private host command offset, calculate the true private host 6695 * command value. 6696 */ 6697 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 6698 (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 6699 6700 /*****************************************************************************/ 6701 /* 6702 * Passthru commands 6703 * 6704 * Some platforms have sub-processors chained to each other. For example. 6705 * 6706 * AP <--> EC <--> PD MCU 6707 * 6708 * The top 2 bits of the command number are used to indicate which device the 6709 * command is intended for. Device 0 is always the device receiving the 6710 * command; other device mapping is board-specific. 6711 * 6712 * When a device receives a command to be passed to a sub-processor, it passes 6713 * it on with the device number set back to 0. This allows the sub-processor 6714 * to remain blissfully unaware of whether the command originated on the next 6715 * device up the chain, or was passed through from the AP. 6716 * 6717 * In the above example, if the AP wants to send command 0x0002 to the PD MCU, 6718 * AP sends command 0x4002 to the EC 6719 * EC sends command 0x0002 to the PD MCU 6720 * EC forwards PD MCU response back to the AP 6721 */ 6722 6723 /* Offset and max command number for sub-device n */ 6724 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) 6725 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) 6726 6727 /*****************************************************************************/ 6728 /* 6729 * Deprecated constants. These constants have been renamed for clarity. The 6730 * meaning and size has not changed. Programs that use the old names should 6731 * switch to the new names soon, as the old names may not be carried forward 6732 * forever. 6733 */ 6734 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 6735 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 6736 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 6737 6738 6739 6740 #endif /* __CROS_EC_COMMANDS_H */ 6741