1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor 4 * 5 * Copyright (C) 2017-2024 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Bogdan Bolocan <bogdan.bolocan@microchip.com> 8 * Author: Victor Tudose 9 * Author: Marius Cristea <marius.cristea@microchip.com> 10 * 11 * Datasheet for PAC1931, PAC1932, PAC1933 and PAC1934 can be found here: 12 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/PAC1931-Family-Data-Sheet-DS20005850E.pdf 13 */ 14 15 #include <linux/acpi.h> 16 #include <linux/bitfield.h> 17 #include <linux/delay.h> 18 #include <linux/device.h> 19 #include <linux/i2c.h> 20 #include <linux/iio/iio.h> 21 #include <linux/iio/sysfs.h> 22 #include <linux/kstrtox.h> 23 #include <linux/unaligned.h> 24 25 /* 26 * maximum accumulation time should be (17 * 60 * 1000) around 17 minutes@1024 sps 27 * till PAC1934 accumulation registers starts to saturate 28 */ 29 #define PAC1934_MAX_RFSH_LIMIT_MS 60000 30 /* 50msec is the timeout for validity of the cached registers */ 31 #define PAC1934_MIN_POLLING_TIME_MS 50 32 /* 33 * 1000usec is the minimum wait time for normal conversions when sample 34 * rate doesn't change 35 */ 36 #define PAC1934_MIN_UPDATE_WAIT_TIME_US 1000 37 38 /* 32000mV */ 39 #define PAC1934_VOLTAGE_MILLIVOLTS_MAX 32000 40 /* voltage bits resolution when set for unsigned values */ 41 #define PAC1934_VOLTAGE_U_RES 16 42 /* voltage bits resolution when set for signed values */ 43 #define PAC1934_VOLTAGE_S_RES 15 44 45 /* 46 * max signed value that can be stored on 32 bits and 8 digits fractional value 47 * (2^31 - 1) * 10^8 + 99999999 48 */ 49 #define PAC_193X_MAX_POWER_ACC 214748364799999999LL 50 /* 51 * min signed value that can be stored on 32 bits and 8 digits fractional value 52 * -(2^31) * 10^8 - 99999999 53 */ 54 #define PAC_193X_MIN_POWER_ACC -214748364899999999LL 55 56 #define PAC1934_MAX_NUM_CHANNELS 4 57 58 #define PAC1934_MEAS_REG_LEN 76 59 #define PAC1934_CTRL_REG_LEN 12 60 61 #define PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ 1024 62 63 /* I2C address map */ 64 #define PAC1934_REFRESH_REG_ADDR 0x00 65 #define PAC1934_CTRL_REG_ADDR 0x01 66 #define PAC1934_ACC_COUNT_REG_ADDR 0x02 67 #define PAC1934_VPOWER_ACC_1_ADDR 0x03 68 #define PAC1934_VPOWER_ACC_2_ADDR 0x04 69 #define PAC1934_VPOWER_ACC_3_ADDR 0x05 70 #define PAC1934_VPOWER_ACC_4_ADDR 0x06 71 #define PAC1934_VBUS_1_ADDR 0x07 72 #define PAC1934_VBUS_2_ADDR 0x08 73 #define PAC1934_VBUS_3_ADDR 0x09 74 #define PAC1934_VBUS_4_ADDR 0x0A 75 #define PAC1934_VSENSE_1_ADDR 0x0B 76 #define PAC1934_VSENSE_2_ADDR 0x0C 77 #define PAC1934_VSENSE_3_ADDR 0x0D 78 #define PAC1934_VSENSE_4_ADDR 0x0E 79 #define PAC1934_VBUS_AVG_1_ADDR 0x0F 80 #define PAC1934_VBUS_AVG_2_ADDR 0x10 81 #define PAC1934_VBUS_AVG_3_ADDR 0x11 82 #define PAC1934_VBUS_AVG_4_ADDR 0x12 83 #define PAC1934_VSENSE_AVG_1_ADDR 0x13 84 #define PAC1934_VSENSE_AVG_2_ADDR 0x14 85 #define PAC1934_VSENSE_AVG_3_ADDR 0x15 86 #define PAC1934_VSENSE_AVG_4_ADDR 0x16 87 #define PAC1934_VPOWER_1_ADDR 0x17 88 #define PAC1934_VPOWER_2_ADDR 0x18 89 #define PAC1934_VPOWER_3_ADDR 0x19 90 #define PAC1934_VPOWER_4_ADDR 0x1A 91 #define PAC1934_REFRESH_V_REG_ADDR 0x1F 92 #define PAC1934_SLOW_REG_ADDR 0x20 93 #define PAC1934_CTRL_STAT_REGS_ADDR 0x1C 94 #define PAC1934_PID_REG_ADDR 0xFD 95 #define PAC1934_MID_REG_ADDR 0xFE 96 #define PAC1934_RID_REG_ADDR 0xFF 97 98 /* PRODUCT ID REGISTER + MANUFACTURER ID REGISTER + REVISION ID REGISTER */ 99 #define PAC1934_ID_REG_LEN 3 100 #define PAC1934_PID_IDX 0 101 #define PAC1934_MID_IDX 1 102 #define PAC1934_RID_IDX 2 103 104 #define PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS 1 105 #define PAC1934_ACPI_GET_UOHMS_VALS 2 106 #define PAC1934_ACPI_GET_BIPOLAR_SETTINGS 4 107 #define PAC1934_ACPI_GET_SAMP 5 108 109 #define PAC1934_SAMPLE_RATE_SHIFT 6 110 111 #define PAC1934_VBUS_SENSE_REG_LEN 2 112 #define PAC1934_ACC_REG_LEN 3 113 #define PAC1934_VPOWER_REG_LEN 4 114 #define PAC1934_VPOWER_ACC_REG_LEN 6 115 #define PAC1934_MAX_REGISTER_LENGTH 6 116 117 #define PAC1934_CUSTOM_ATTR_FOR_CHANNEL 1 118 119 /* 120 * relative offsets when using multi-byte reads/writes even though these 121 * bytes are read one after the other, they are not at adjacent memory 122 * locations within the I2C memory map. The chip can skip some addresses 123 */ 124 #define PAC1934_CHANNEL_DIS_REG_OFF 0 125 #define PAC1934_NEG_PWR_REG_OFF 1 126 127 /* 128 * when reading/writing multiple bytes from offset PAC1934_CHANNEL_DIS_REG_OFF, 129 * the chip jumps over the 0x1E (REFRESH_G) and 0x1F (REFRESH_V) offsets 130 */ 131 #define PAC1934_SLOW_REG_OFF 2 132 #define PAC1934_CTRL_ACT_REG_OFF 3 133 #define PAC1934_CHANNEL_DIS_ACT_REG_OFF 4 134 #define PAC1934_NEG_PWR_ACT_REG_OFF 5 135 #define PAC1934_CTRL_LAT_REG_OFF 6 136 #define PAC1934_CHANNEL_DIS_LAT_REG_OFF 7 137 #define PAC1934_NEG_PWR_LAT_REG_OFF 8 138 #define PAC1934_PID_REG_OFF 9 139 #define PAC1934_MID_REG_OFF 10 140 #define PAC1934_REV_REG_OFF 11 141 #define PAC1934_CTRL_STATUS_INFO_LEN 12 142 143 #define PAC1934_MID 0x5D 144 #define PAC1931_PID 0x58 145 #define PAC1932_PID 0x59 146 #define PAC1933_PID 0x5A 147 #define PAC1934_PID 0x5B 148 149 /* Scale constant = (10^3 * 3.2 * 10^9 / 2^28) for mili Watt-second */ 150 #define PAC1934_SCALE_CONSTANT 11921 151 152 #define PAC1934_MAX_VPOWER_RSHIFTED_BY_28B 11921 153 #define PAC1934_MAX_VSENSE_RSHIFTED_BY_16B 1525 154 155 #define PAC1934_DEV_ATTR(name) (&iio_dev_attr_##name.dev_attr.attr) 156 157 #define PAC1934_CRTL_SAMPLE_RATE_MASK GENMASK(7, 6) 158 #define PAC1934_CHAN_SLEEP_MASK BIT(5) 159 #define PAC1934_CHAN_SLEEP_SET BIT(5) 160 #define PAC1934_CHAN_SINGLE_MASK BIT(4) 161 #define PAC1934_CHAN_SINGLE_SHOT_SET BIT(4) 162 #define PAC1934_CHAN_ALERT_MASK BIT(3) 163 #define PAC1934_CHAN_ALERT_EN BIT(3) 164 #define PAC1934_CHAN_ALERT_CC_MASK BIT(2) 165 #define PAC1934_CHAN_ALERT_CC_EN BIT(2) 166 #define PAC1934_CHAN_OVF_ALERT_MASK BIT(1) 167 #define PAC1934_CHAN_OVF_ALERT_EN BIT(1) 168 #define PAC1934_CHAN_OVF_MASK BIT(0) 169 170 #define PAC1934_CHAN_DIS_CH1_OFF_MASK BIT(7) 171 #define PAC1934_CHAN_DIS_CH2_OFF_MASK BIT(6) 172 #define PAC1934_CHAN_DIS_CH3_OFF_MASK BIT(5) 173 #define PAC1934_CHAN_DIS_CH4_OFF_MASK BIT(4) 174 #define PAC1934_SMBUS_TIMEOUT_MASK BIT(3) 175 #define PAC1934_SMBUS_BYTECOUNT_MASK BIT(2) 176 #define PAC1934_SMBUS_NO_SKIP_MASK BIT(1) 177 178 #define PAC1934_NEG_PWR_CH1_BIDI_MASK BIT(7) 179 #define PAC1934_NEG_PWR_CH2_BIDI_MASK BIT(6) 180 #define PAC1934_NEG_PWR_CH3_BIDI_MASK BIT(5) 181 #define PAC1934_NEG_PWR_CH4_BIDI_MASK BIT(4) 182 #define PAC1934_NEG_PWR_CH1_BIDV_MASK BIT(3) 183 #define PAC1934_NEG_PWR_CH2_BIDV_MASK BIT(2) 184 #define PAC1934_NEG_PWR_CH3_BIDV_MASK BIT(1) 185 #define PAC1934_NEG_PWR_CH4_BIDV_MASK BIT(0) 186 187 /* 188 * Universal Unique Identifier (UUID), 189 * 033771E0-1705-47B4-9535-D1BBE14D9A09, 190 * is reserved to Microchip for the PAC1934. 191 */ 192 #define PAC1934_DSM_UUID "033771E0-1705-47B4-9535-D1BBE14D9A09" 193 194 enum pac1934_ids { 195 PAC1931, 196 PAC1932, 197 PAC1933, 198 PAC1934 199 }; 200 201 enum pac1934_samps { 202 PAC1934_SAMP_1024SPS, 203 PAC1934_SAMP_256SPS, 204 PAC1934_SAMP_64SPS, 205 PAC1934_SAMP_8SPS 206 }; 207 208 /* 209 * these indexes are exactly describing the element order within a single 210 * PAC1934 phys channel IIO channel descriptor; see the static const struct 211 * iio_chan_spec pac1934_single_channel[] declaration 212 */ 213 enum pac1934_ch_idx { 214 PAC1934_CH_ENERGY, 215 PAC1934_CH_POWER, 216 PAC1934_CH_VOLTAGE, 217 PAC1934_CH_CURRENT, 218 PAC1934_CH_VOLTAGE_AVERAGE, 219 PAC1934_CH_CURRENT_AVERAGE 220 }; 221 222 /** 223 * struct pac1934_features - features of a pac1934 instance 224 * @phys_channels: number of physical channels supported by the chip 225 * @name: chip's name 226 */ 227 struct pac1934_features { 228 u8 phys_channels; 229 const char *name; 230 }; 231 232 static const unsigned int samp_rate_map_tbl[] = { 233 [PAC1934_SAMP_1024SPS] = 1024, 234 [PAC1934_SAMP_256SPS] = 256, 235 [PAC1934_SAMP_64SPS] = 64, 236 [PAC1934_SAMP_8SPS] = 8, 237 }; 238 239 static const struct pac1934_features pac1934_chip_config[] = { 240 [PAC1931] = { 241 .phys_channels = 1, 242 .name = "pac1931", 243 }, 244 [PAC1932] = { 245 .phys_channels = 2, 246 .name = "pac1932", 247 }, 248 [PAC1933] = { 249 .phys_channels = 3, 250 .name = "pac1933", 251 }, 252 [PAC1934] = { 253 .phys_channels = 4, 254 .name = "pac1934", 255 }, 256 }; 257 258 /** 259 * struct reg_data - data from the registers 260 * @meas_regs: snapshot of raw measurements registers 261 * @ctrl_regs: snapshot of control registers 262 * @energy_sec_acc: snapshot of energy values 263 * @vpower_acc: accumulated vpower values 264 * @vpower: snapshot of vpower registers 265 * @vbus: snapshot of vbus registers 266 * @vbus_avg: averages of vbus registers 267 * @vsense: snapshot of vsense registers 268 * @vsense_avg: averages of vsense registers 269 * @num_enabled_channels: count of how many chip channels are currently enabled 270 */ 271 struct reg_data { 272 u8 meas_regs[PAC1934_MEAS_REG_LEN]; 273 u8 ctrl_regs[PAC1934_CTRL_REG_LEN]; 274 s64 energy_sec_acc[PAC1934_MAX_NUM_CHANNELS]; 275 s64 vpower_acc[PAC1934_MAX_NUM_CHANNELS]; 276 s32 vpower[PAC1934_MAX_NUM_CHANNELS]; 277 s32 vbus[PAC1934_MAX_NUM_CHANNELS]; 278 s32 vbus_avg[PAC1934_MAX_NUM_CHANNELS]; 279 s32 vsense[PAC1934_MAX_NUM_CHANNELS]; 280 s32 vsense_avg[PAC1934_MAX_NUM_CHANNELS]; 281 u8 num_enabled_channels; 282 }; 283 284 /** 285 * struct pac1934_chip_info - information about the chip 286 * @client: the i2c-client attached to the device 287 * @lock: synchronize access to driver's state members 288 * @work_chip_rfsh: work queue used for refresh commands 289 * @phys_channels: phys channels count 290 * @active_channels: array of values, true means that channel is active 291 * @enable_energy: array of values, true means that channel energy is measured 292 * @bi_dir: array of bools, true means that channel is bidirectional 293 * @chip_variant: chip variant 294 * @chip_revision: chip revision 295 * @shunts: shunts 296 * @chip_reg_data: chip reg data 297 * @sample_rate_value: sampling frequency 298 * @labels: table with channels labels 299 * @iio_info: iio_info 300 * @tstamp: chip's uptime 301 */ 302 struct pac1934_chip_info { 303 struct i2c_client *client; 304 struct mutex lock; /* synchronize access to driver's state members */ 305 struct delayed_work work_chip_rfsh; 306 u8 phys_channels; 307 bool active_channels[PAC1934_MAX_NUM_CHANNELS]; 308 bool enable_energy[PAC1934_MAX_NUM_CHANNELS]; 309 bool bi_dir[PAC1934_MAX_NUM_CHANNELS]; 310 u8 chip_variant; 311 u8 chip_revision; 312 u32 shunts[PAC1934_MAX_NUM_CHANNELS]; 313 struct reg_data chip_reg_data; 314 s32 sample_rate_value; 315 char *labels[PAC1934_MAX_NUM_CHANNELS]; 316 struct iio_info iio_info; 317 unsigned long tstamp; 318 }; 319 320 #define TO_PAC1934_CHIP_INFO(d) container_of(d, struct pac1934_chip_info, work_chip_rfsh) 321 322 #define PAC1934_VPOWER_ACC_CHANNEL(_index, _si, _address) { \ 323 .type = IIO_ENERGY, \ 324 .address = (_address), \ 325 .indexed = 1, \ 326 .channel = (_index), \ 327 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 328 BIT(IIO_CHAN_INFO_SCALE) | \ 329 BIT(IIO_CHAN_INFO_ENABLE), \ 330 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 331 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 332 .scan_index = (_si), \ 333 .scan_type = { \ 334 .sign = 'u', \ 335 .realbits = 48, \ 336 .storagebits = 64, \ 337 .endianness = IIO_CPU, \ 338 } \ 339 } 340 341 #define PAC1934_VBUS_CHANNEL(_index, _si, _address) { \ 342 .type = IIO_VOLTAGE, \ 343 .address = (_address), \ 344 .indexed = 1, \ 345 .channel = (_index), \ 346 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 347 BIT(IIO_CHAN_INFO_SCALE), \ 348 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 349 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 350 .scan_index = (_si), \ 351 .scan_type = { \ 352 .sign = 'u', \ 353 .realbits = 16, \ 354 .storagebits = 16, \ 355 .endianness = IIO_CPU, \ 356 } \ 357 } 358 359 #define PAC1934_VBUS_AVG_CHANNEL(_index, _si, _address) { \ 360 .type = IIO_VOLTAGE, \ 361 .address = (_address), \ 362 .indexed = 1, \ 363 .channel = (_index), \ 364 .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \ 365 BIT(IIO_CHAN_INFO_SCALE), \ 366 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 367 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 368 .scan_index = (_si), \ 369 .scan_type = { \ 370 .sign = 'u', \ 371 .realbits = 16, \ 372 .storagebits = 16, \ 373 .endianness = IIO_CPU, \ 374 } \ 375 } 376 377 #define PAC1934_VSENSE_CHANNEL(_index, _si, _address) { \ 378 .type = IIO_CURRENT, \ 379 .address = (_address), \ 380 .indexed = 1, \ 381 .channel = (_index), \ 382 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 383 BIT(IIO_CHAN_INFO_SCALE), \ 384 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 385 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 386 .scan_index = (_si), \ 387 .scan_type = { \ 388 .sign = 'u', \ 389 .realbits = 16, \ 390 .storagebits = 16, \ 391 .endianness = IIO_CPU, \ 392 } \ 393 } 394 395 #define PAC1934_VSENSE_AVG_CHANNEL(_index, _si, _address) { \ 396 .type = IIO_CURRENT, \ 397 .address = (_address), \ 398 .indexed = 1, \ 399 .channel = (_index), \ 400 .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \ 401 BIT(IIO_CHAN_INFO_SCALE), \ 402 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 403 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 404 .scan_index = (_si), \ 405 .scan_type = { \ 406 .sign = 'u', \ 407 .realbits = 16, \ 408 .storagebits = 16, \ 409 .endianness = IIO_CPU, \ 410 } \ 411 } 412 413 #define PAC1934_VPOWER_CHANNEL(_index, _si, _address) { \ 414 .type = IIO_POWER, \ 415 .address = (_address), \ 416 .indexed = 1, \ 417 .channel = (_index), \ 418 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 419 BIT(IIO_CHAN_INFO_SCALE), \ 420 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 421 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 422 .scan_index = (_si), \ 423 .scan_type = { \ 424 .sign = 'u', \ 425 .realbits = 28, \ 426 .storagebits = 32, \ 427 .shift = 4, \ 428 .endianness = IIO_CPU, \ 429 } \ 430 } 431 432 static const struct iio_chan_spec pac1934_single_channel[] = { 433 PAC1934_VPOWER_ACC_CHANNEL(0, 0, PAC1934_VPOWER_ACC_1_ADDR), 434 PAC1934_VPOWER_CHANNEL(0, 0, PAC1934_VPOWER_1_ADDR), 435 PAC1934_VBUS_CHANNEL(0, 0, PAC1934_VBUS_1_ADDR), 436 PAC1934_VSENSE_CHANNEL(0, 0, PAC1934_VSENSE_1_ADDR), 437 PAC1934_VBUS_AVG_CHANNEL(0, 0, PAC1934_VBUS_AVG_1_ADDR), 438 PAC1934_VSENSE_AVG_CHANNEL(0, 0, PAC1934_VSENSE_AVG_1_ADDR), 439 }; 440 441 /* Low-level I2c functions used to transfer up to 76 bytes at once */ 442 static int pac1934_i2c_read(struct i2c_client *client, u8 reg_addr, 443 void *databuf, u8 len) 444 { 445 int ret; 446 struct i2c_msg msgs[2] = { 447 { 448 .addr = client->addr, 449 .len = 1, 450 .buf = (u8 *)®_addr, 451 }, 452 { 453 .addr = client->addr, 454 .len = len, 455 .buf = databuf, 456 .flags = I2C_M_RD 457 } 458 }; 459 460 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 461 if (ret < 0) 462 return ret; 463 464 return 0; 465 } 466 467 static int pac1934_get_samp_rate_idx(struct pac1934_chip_info *info, 468 u32 new_samp_rate) 469 { 470 int cnt; 471 472 for (cnt = 0; cnt < ARRAY_SIZE(samp_rate_map_tbl); cnt++) 473 if (new_samp_rate == samp_rate_map_tbl[cnt]) 474 return cnt; 475 476 /* not a valid sample rate value */ 477 return -EINVAL; 478 } 479 480 static ssize_t pac1934_shunt_value_show(struct device *dev, 481 struct device_attribute *attr, 482 char *buf) 483 { 484 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 485 struct pac1934_chip_info *info = iio_priv(indio_dev); 486 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 487 488 return sysfs_emit(buf, "%u\n", info->shunts[this_attr->address]); 489 } 490 491 static ssize_t pac1934_shunt_value_store(struct device *dev, 492 struct device_attribute *attr, 493 const char *buf, size_t count) 494 { 495 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 496 struct pac1934_chip_info *info = iio_priv(indio_dev); 497 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 498 unsigned int sh_val; 499 int ret; 500 501 ret = kstrtouint(buf, 10, &sh_val); 502 if (ret) { 503 dev_err(dev, "Shunt value is not valid\n"); 504 return ret; 505 } 506 507 scoped_guard(mutex, &info->lock) 508 info->shunts[this_attr->address] = sh_val; 509 510 return count; 511 } 512 513 static int pac1934_read_avail(struct iio_dev *indio_dev, 514 struct iio_chan_spec const *channel, 515 const int **vals, int *type, int *length, long mask) 516 { 517 switch (mask) { 518 case IIO_CHAN_INFO_SAMP_FREQ: 519 *type = IIO_VAL_INT; 520 *vals = samp_rate_map_tbl; 521 *length = ARRAY_SIZE(samp_rate_map_tbl); 522 return IIO_AVAIL_LIST; 523 } 524 525 return -EINVAL; 526 } 527 528 static int pac1934_send_refresh(struct pac1934_chip_info *info, 529 u8 refresh_cmd, u32 wait_time) 530 { 531 /* this function only sends REFRESH or REFRESH_V */ 532 struct i2c_client *client = info->client; 533 int ret; 534 u8 bidir_reg; 535 bool revision_bug = false; 536 537 if (info->chip_revision == 2 || info->chip_revision == 3) { 538 /* 539 * chip rev 2 and 3 bug workaround 540 * see: PAC1934 Family Data Sheet Errata DS80000836A.pdf 541 */ 542 revision_bug = true; 543 544 bidir_reg = 545 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) | 546 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) | 547 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) | 548 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) | 549 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) | 550 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) | 551 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) | 552 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]); 553 554 ret = i2c_smbus_write_byte_data(client, 555 PAC1934_CTRL_STAT_REGS_ADDR + 556 PAC1934_NEG_PWR_REG_OFF, 557 bidir_reg); 558 if (ret) 559 return ret; 560 } 561 562 ret = i2c_smbus_write_byte(client, refresh_cmd); 563 if (ret) { 564 dev_err(&client->dev, "%s - cannot send 0x%02X\n", 565 __func__, refresh_cmd); 566 return ret; 567 } 568 569 if (revision_bug) { 570 /* 571 * chip rev 2 and 3 bug workaround - write again the same 572 * register write the updated registers back 573 */ 574 ret = i2c_smbus_write_byte_data(client, 575 PAC1934_CTRL_STAT_REGS_ADDR + 576 PAC1934_NEG_PWR_REG_OFF, bidir_reg); 577 if (ret) 578 return ret; 579 } 580 581 /* register data retrieval timestamp */ 582 info->tstamp = jiffies; 583 584 /* wait till the data is available */ 585 usleep_range(wait_time, wait_time + 100); 586 587 return ret; 588 } 589 590 static int pac1934_reg_snapshot(struct pac1934_chip_info *info, 591 bool do_refresh, u8 refresh_cmd, u32 wait_time) 592 { 593 int ret; 594 struct i2c_client *client = info->client; 595 u8 samp_shift, ctrl_regs_tmp; 596 u8 *offset_reg_data_p; 597 u16 tmp_value; 598 u32 samp_rate, cnt, tmp; 599 s64 curr_energy, inc; 600 u64 tmp_energy; 601 struct reg_data *reg_data; 602 603 guard(mutex)(&info->lock); 604 605 if (do_refresh) { 606 ret = pac1934_send_refresh(info, refresh_cmd, wait_time); 607 if (ret < 0) { 608 dev_err(&client->dev, 609 "%s - cannot send refresh\n", 610 __func__); 611 return ret; 612 } 613 } 614 615 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 616 PAC1934_CTRL_REG_LEN, 617 (u8 *)info->chip_reg_data.ctrl_regs); 618 if (ret < 0) { 619 dev_err(&client->dev, 620 "%s - cannot read ctrl/status registers\n", 621 __func__); 622 return ret; 623 } 624 625 reg_data = &info->chip_reg_data; 626 627 /* read the data registers */ 628 ret = pac1934_i2c_read(client, PAC1934_ACC_COUNT_REG_ADDR, 629 (u8 *)reg_data->meas_regs, PAC1934_MEAS_REG_LEN); 630 if (ret) { 631 dev_err(&client->dev, 632 "%s - cannot read ACC_COUNT register: %d:%d\n", 633 __func__, ret, PAC1934_MEAS_REG_LEN); 634 return ret; 635 } 636 637 /* see how much shift is required by the sample rate */ 638 samp_rate = samp_rate_map_tbl[((reg_data->ctrl_regs[PAC1934_CTRL_LAT_REG_OFF]) >> 6)]; 639 samp_shift = get_count_order(samp_rate); 640 641 ctrl_regs_tmp = reg_data->ctrl_regs[PAC1934_CHANNEL_DIS_LAT_REG_OFF]; 642 offset_reg_data_p = ®_data->meas_regs[PAC1934_ACC_REG_LEN]; 643 644 /* start with VPOWER_ACC */ 645 for (cnt = 0; cnt < info->phys_channels; cnt++) { 646 /* check if the channel is active, skip all fields if disabled */ 647 if ((ctrl_regs_tmp << cnt) & 0x80) 648 continue; 649 650 /* skip if the energy accumulation is disabled */ 651 if (info->enable_energy[cnt]) { 652 curr_energy = info->chip_reg_data.energy_sec_acc[cnt]; 653 654 tmp_energy = get_unaligned_be48(offset_reg_data_p); 655 656 if (info->bi_dir[cnt]) 657 reg_data->vpower_acc[cnt] = sign_extend64(tmp_energy, 47); 658 else 659 reg_data->vpower_acc[cnt] = tmp_energy; 660 661 /* 662 * compute the scaled to 1 second accumulated energy value; 663 * energy accumulator scaled to 1sec = VPOWER_ACC/2^samp_shift 664 * the chip's sampling rate is 2^samp_shift samples/sec 665 */ 666 inc = (reg_data->vpower_acc[cnt] >> samp_shift); 667 668 /* add the power_acc field */ 669 curr_energy += inc; 670 671 reg_data->energy_sec_acc[cnt] = clamp(curr_energy, 672 PAC_193X_MIN_POWER_ACC, 673 PAC_193X_MAX_POWER_ACC); 674 } 675 676 offset_reg_data_p += PAC1934_VPOWER_ACC_REG_LEN; 677 } 678 679 /* continue with VBUS */ 680 for (cnt = 0; cnt < info->phys_channels; cnt++) { 681 if ((ctrl_regs_tmp << cnt) & 0x80) 682 continue; 683 684 tmp_value = get_unaligned_be16(offset_reg_data_p); 685 686 if (info->bi_dir[cnt]) 687 reg_data->vbus[cnt] = sign_extend32((u32)(tmp_value), 15); 688 else 689 reg_data->vbus[cnt] = tmp_value; 690 691 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 692 } 693 694 /* VSENSE */ 695 for (cnt = 0; cnt < info->phys_channels; cnt++) { 696 if ((ctrl_regs_tmp << cnt) & 0x80) 697 continue; 698 699 tmp_value = get_unaligned_be16(offset_reg_data_p); 700 701 if (info->bi_dir[cnt]) 702 reg_data->vsense[cnt] = sign_extend32((u32)(tmp_value), 15); 703 else 704 reg_data->vsense[cnt] = tmp_value; 705 706 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 707 } 708 709 /* VBUS_AVG */ 710 for (cnt = 0; cnt < info->phys_channels; cnt++) { 711 if ((ctrl_regs_tmp << cnt) & 0x80) 712 continue; 713 714 tmp_value = get_unaligned_be16(offset_reg_data_p); 715 716 if (info->bi_dir[cnt]) 717 reg_data->vbus_avg[cnt] = sign_extend32((u32)(tmp_value), 15); 718 else 719 reg_data->vbus_avg[cnt] = tmp_value; 720 721 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 722 } 723 724 /* VSENSE_AVG */ 725 for (cnt = 0; cnt < info->phys_channels; cnt++) { 726 if ((ctrl_regs_tmp << cnt) & 0x80) 727 continue; 728 729 tmp_value = get_unaligned_be16(offset_reg_data_p); 730 731 if (info->bi_dir[cnt]) 732 reg_data->vsense_avg[cnt] = sign_extend32((u32)(tmp_value), 15); 733 else 734 reg_data->vsense_avg[cnt] = tmp_value; 735 736 offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; 737 } 738 739 /* VPOWER */ 740 for (cnt = 0; cnt < info->phys_channels; cnt++) { 741 if ((ctrl_regs_tmp << cnt) & 0x80) 742 continue; 743 744 tmp = get_unaligned_be32(offset_reg_data_p) >> 4; 745 746 if (info->bi_dir[cnt]) 747 reg_data->vpower[cnt] = sign_extend32(tmp, 27); 748 else 749 reg_data->vpower[cnt] = tmp; 750 751 offset_reg_data_p += PAC1934_VPOWER_REG_LEN; 752 } 753 754 return 0; 755 } 756 757 static int pac1934_retrieve_data(struct pac1934_chip_info *info, 758 u32 wait_time) 759 { 760 int ret = 0; 761 762 /* 763 * check if the minimal elapsed time has passed and if so, 764 * re-read the chip, otherwise the cached info is just fine 765 */ 766 if (time_after(jiffies, info->tstamp + msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS))) { 767 ret = pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR, 768 wait_time); 769 770 /* 771 * Re-schedule the work for the read registers on timeout 772 * (to prevent chip registers saturation) 773 */ 774 mod_delayed_work(system_percpu_wq, &info->work_chip_rfsh, 775 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); 776 } 777 778 return ret; 779 } 780 781 static int pac1934_read_raw(struct iio_dev *indio_dev, 782 struct iio_chan_spec const *chan, int *val, 783 int *val2, long mask) 784 { 785 struct pac1934_chip_info *info = iio_priv(indio_dev); 786 s64 curr_energy; 787 int ret, channel = chan->channel - 1; 788 789 /* 790 * For AVG the index should be between 5 to 8. 791 * To calculate PAC1934_CH_VOLTAGE_AVERAGE, 792 * respectively PAC1934_CH_CURRENT real index, we need 793 * to remove the added offset (PAC1934_MAX_NUM_CHANNELS). 794 */ 795 if (channel >= PAC1934_MAX_NUM_CHANNELS) 796 channel = channel - PAC1934_MAX_NUM_CHANNELS; 797 798 ret = pac1934_retrieve_data(info, PAC1934_MIN_UPDATE_WAIT_TIME_US); 799 if (ret < 0) 800 return ret; 801 802 switch (mask) { 803 case IIO_CHAN_INFO_RAW: 804 switch (chan->type) { 805 case IIO_VOLTAGE: 806 *val = info->chip_reg_data.vbus[channel]; 807 return IIO_VAL_INT; 808 case IIO_CURRENT: 809 *val = info->chip_reg_data.vsense[channel]; 810 return IIO_VAL_INT; 811 case IIO_POWER: 812 *val = info->chip_reg_data.vpower[channel]; 813 return IIO_VAL_INT; 814 case IIO_ENERGY: 815 curr_energy = info->chip_reg_data.energy_sec_acc[channel]; 816 *val = (u32)curr_energy; 817 *val2 = (u32)(curr_energy >> 32); 818 return IIO_VAL_INT_64; 819 default: 820 return -EINVAL; 821 } 822 case IIO_CHAN_INFO_AVERAGE_RAW: 823 switch (chan->type) { 824 case IIO_VOLTAGE: 825 *val = info->chip_reg_data.vbus_avg[channel]; 826 return IIO_VAL_INT; 827 case IIO_CURRENT: 828 *val = info->chip_reg_data.vsense_avg[channel]; 829 return IIO_VAL_INT; 830 default: 831 return -EINVAL; 832 } 833 case IIO_CHAN_INFO_SCALE: 834 switch (chan->address) { 835 /* Voltages - scale for millivolts */ 836 case PAC1934_VBUS_1_ADDR: 837 case PAC1934_VBUS_2_ADDR: 838 case PAC1934_VBUS_3_ADDR: 839 case PAC1934_VBUS_4_ADDR: 840 case PAC1934_VBUS_AVG_1_ADDR: 841 case PAC1934_VBUS_AVG_2_ADDR: 842 case PAC1934_VBUS_AVG_3_ADDR: 843 case PAC1934_VBUS_AVG_4_ADDR: 844 *val = PAC1934_VOLTAGE_MILLIVOLTS_MAX; 845 if (chan->scan_type.sign == 'u') 846 *val2 = PAC1934_VOLTAGE_U_RES; 847 else 848 *val2 = PAC1934_VOLTAGE_S_RES; 849 return IIO_VAL_FRACTIONAL_LOG2; 850 /* 851 * Currents - scale for mA - depends on the 852 * channel's shunt value 853 * (100mV * 1000000) / (2^16 * shunt(uohm)) 854 */ 855 case PAC1934_VSENSE_1_ADDR: 856 case PAC1934_VSENSE_2_ADDR: 857 case PAC1934_VSENSE_3_ADDR: 858 case PAC1934_VSENSE_4_ADDR: 859 case PAC1934_VSENSE_AVG_1_ADDR: 860 case PAC1934_VSENSE_AVG_2_ADDR: 861 case PAC1934_VSENSE_AVG_3_ADDR: 862 case PAC1934_VSENSE_AVG_4_ADDR: 863 *val = PAC1934_MAX_VSENSE_RSHIFTED_BY_16B; 864 if (chan->scan_type.sign == 'u') 865 *val2 = info->shunts[channel]; 866 else 867 *val2 = info->shunts[channel] >> 1; 868 return IIO_VAL_FRACTIONAL; 869 /* 870 * Power - uW - it will use the combined scale 871 * for current and voltage 872 * current(mA) * voltage(mV) = power (uW) 873 */ 874 case PAC1934_VPOWER_1_ADDR: 875 case PAC1934_VPOWER_2_ADDR: 876 case PAC1934_VPOWER_3_ADDR: 877 case PAC1934_VPOWER_4_ADDR: 878 *val = PAC1934_MAX_VPOWER_RSHIFTED_BY_28B; 879 if (chan->scan_type.sign == 'u') 880 *val2 = info->shunts[channel]; 881 else 882 *val2 = info->shunts[channel] >> 1; 883 return IIO_VAL_FRACTIONAL; 884 case PAC1934_VPOWER_ACC_1_ADDR: 885 case PAC1934_VPOWER_ACC_2_ADDR: 886 case PAC1934_VPOWER_ACC_3_ADDR: 887 case PAC1934_VPOWER_ACC_4_ADDR: 888 /* 889 * expresses the 32 bit scale value here compute 890 * the scale for energy (miliWatt-second or miliJoule) 891 */ 892 *val = PAC1934_SCALE_CONSTANT; 893 894 if (chan->scan_type.sign == 'u') 895 *val2 = info->shunts[channel]; 896 else 897 *val2 = info->shunts[channel] >> 1; 898 return IIO_VAL_FRACTIONAL; 899 default: 900 return -EINVAL; 901 } 902 case IIO_CHAN_INFO_SAMP_FREQ: 903 *val = info->sample_rate_value; 904 return IIO_VAL_INT; 905 case IIO_CHAN_INFO_ENABLE: 906 *val = info->enable_energy[channel]; 907 return IIO_VAL_INT; 908 default: 909 return -EINVAL; 910 } 911 } 912 913 static int pac1934_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, 914 int val, int val2, long mask) 915 { 916 struct pac1934_chip_info *info = iio_priv(indio_dev); 917 struct i2c_client *client = info->client; 918 int ret = -EINVAL; 919 s32 old_samp_rate; 920 u8 ctrl_reg; 921 922 switch (mask) { 923 case IIO_CHAN_INFO_SAMP_FREQ: 924 ret = pac1934_get_samp_rate_idx(info, val); 925 if (ret < 0) 926 return ret; 927 928 /* write the new sampling value and trigger a snapshot(incl refresh) */ 929 scoped_guard(mutex, &info->lock) { 930 ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, ret); 931 ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, ctrl_reg); 932 if (ret) { 933 dev_err(&client->dev, 934 "%s - can't update sample rate\n", 935 __func__); 936 return ret; 937 } 938 } 939 940 old_samp_rate = info->sample_rate_value; 941 info->sample_rate_value = val; 942 943 /* 944 * now, force a snapshot with refresh - call retrieve 945 * data in order to update the refresh timer 946 * alter the timestamp in order to force trigger a 947 * register snapshot and a timestamp update 948 */ 949 info->tstamp -= msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS); 950 ret = pac1934_retrieve_data(info, (1024 / old_samp_rate) * 1000); 951 if (ret < 0) { 952 dev_err(&client->dev, 953 "%s - cannot snapshot ctrl and measurement regs\n", 954 __func__); 955 return ret; 956 } 957 958 return 0; 959 case IIO_CHAN_INFO_ENABLE: 960 scoped_guard(mutex, &info->lock) { 961 info->enable_energy[chan->channel - 1] = val ? true : false; 962 if (!val) 963 info->chip_reg_data.energy_sec_acc[chan->channel - 1] = 0; 964 } 965 966 return 0; 967 default: 968 return -EINVAL; 969 } 970 } 971 972 static int pac1934_read_label(struct iio_dev *indio_dev, 973 struct iio_chan_spec const *chan, char *label) 974 { 975 struct pac1934_chip_info *info = iio_priv(indio_dev); 976 977 switch (chan->address) { 978 case PAC1934_VBUS_1_ADDR: 979 case PAC1934_VBUS_2_ADDR: 980 case PAC1934_VBUS_3_ADDR: 981 case PAC1934_VBUS_4_ADDR: 982 return sysfs_emit(label, "%s_VBUS_%d\n", 983 info->labels[chan->scan_index], 984 chan->scan_index + 1); 985 case PAC1934_VBUS_AVG_1_ADDR: 986 case PAC1934_VBUS_AVG_2_ADDR: 987 case PAC1934_VBUS_AVG_3_ADDR: 988 case PAC1934_VBUS_AVG_4_ADDR: 989 return sysfs_emit(label, "%s_VBUS_AVG_%d\n", 990 info->labels[chan->scan_index], 991 chan->scan_index + 1); 992 case PAC1934_VSENSE_1_ADDR: 993 case PAC1934_VSENSE_2_ADDR: 994 case PAC1934_VSENSE_3_ADDR: 995 case PAC1934_VSENSE_4_ADDR: 996 return sysfs_emit(label, "%s_IBUS_%d\n", 997 info->labels[chan->scan_index], 998 chan->scan_index + 1); 999 case PAC1934_VSENSE_AVG_1_ADDR: 1000 case PAC1934_VSENSE_AVG_2_ADDR: 1001 case PAC1934_VSENSE_AVG_3_ADDR: 1002 case PAC1934_VSENSE_AVG_4_ADDR: 1003 return sysfs_emit(label, "%s_IBUS_AVG_%d\n", 1004 info->labels[chan->scan_index], 1005 chan->scan_index + 1); 1006 case PAC1934_VPOWER_1_ADDR: 1007 case PAC1934_VPOWER_2_ADDR: 1008 case PAC1934_VPOWER_3_ADDR: 1009 case PAC1934_VPOWER_4_ADDR: 1010 return sysfs_emit(label, "%s_POWER_%d\n", 1011 info->labels[chan->scan_index], 1012 chan->scan_index + 1); 1013 case PAC1934_VPOWER_ACC_1_ADDR: 1014 case PAC1934_VPOWER_ACC_2_ADDR: 1015 case PAC1934_VPOWER_ACC_3_ADDR: 1016 case PAC1934_VPOWER_ACC_4_ADDR: 1017 return sysfs_emit(label, "%s_ENERGY_%d\n", 1018 info->labels[chan->scan_index], 1019 chan->scan_index + 1); 1020 } 1021 1022 return 0; 1023 } 1024 1025 static void pac1934_work_periodic_rfsh(struct work_struct *work) 1026 { 1027 struct pac1934_chip_info *info = TO_PAC1934_CHIP_INFO((struct delayed_work *)work); 1028 struct device *dev = &info->client->dev; 1029 1030 dev_dbg(dev, "%s - Periodic refresh\n", __func__); 1031 1032 /* do a REFRESH, then read */ 1033 pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR, 1034 PAC1934_MIN_UPDATE_WAIT_TIME_US); 1035 1036 schedule_delayed_work(&info->work_chip_rfsh, 1037 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); 1038 } 1039 1040 static int pac1934_read_revision(struct pac1934_chip_info *info, u8 *buf) 1041 { 1042 int ret; 1043 struct i2c_client *client = info->client; 1044 1045 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_PID_REG_ADDR, 1046 PAC1934_ID_REG_LEN, 1047 buf); 1048 if (ret < 0) { 1049 dev_err(&client->dev, "cannot read revision\n"); 1050 return ret; 1051 } 1052 1053 return 0; 1054 } 1055 1056 static int pac1934_chip_identify(struct pac1934_chip_info *info) 1057 { 1058 u8 rev_info[PAC1934_ID_REG_LEN]; 1059 struct device *dev = &info->client->dev; 1060 int ret = 0; 1061 1062 ret = pac1934_read_revision(info, (u8 *)rev_info); 1063 if (ret) 1064 return ret; 1065 1066 info->chip_variant = rev_info[PAC1934_PID_IDX]; 1067 info->chip_revision = rev_info[PAC1934_RID_IDX]; 1068 1069 dev_dbg(dev, "Chip variant: 0x%02X\n", info->chip_variant); 1070 dev_dbg(dev, "Chip revision: 0x%02X\n", info->chip_revision); 1071 1072 switch (info->chip_variant) { 1073 case PAC1934_PID: 1074 return PAC1934; 1075 case PAC1933_PID: 1076 return PAC1933; 1077 case PAC1932_PID: 1078 return PAC1932; 1079 case PAC1931_PID: 1080 return PAC1931; 1081 default: 1082 return -EINVAL; 1083 } 1084 } 1085 1086 /* 1087 * documentation related to the ACPI device definition 1088 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC193X-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf 1089 */ 1090 static int pac1934_acpi_parse_channel_config(struct i2c_client *client, 1091 struct pac1934_chip_info *info) 1092 { 1093 acpi_handle handle; 1094 union acpi_object *rez; 1095 struct device *dev = &client->dev; 1096 unsigned short bi_dir_mask; 1097 int idx, i; 1098 guid_t guid; 1099 1100 handle = ACPI_HANDLE(dev); 1101 1102 guid_parse(PAC1934_DSM_UUID, &guid); 1103 1104 rez = acpi_evaluate_dsm(handle, &guid, 0, PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS, NULL); 1105 if (!rez) 1106 return -EINVAL; 1107 1108 for (i = 0; i < rez->package.count; i += 2) { 1109 idx = i / 2; 1110 info->labels[idx] = 1111 devm_kmemdup(dev, rez->package.elements[i].string.pointer, 1112 (size_t)rez->package.elements[i].string.length + 1, 1113 GFP_KERNEL); 1114 if (!info->labels[idx]) { 1115 ACPI_FREE(rez); 1116 return -ENOMEM; 1117 } 1118 info->labels[idx][rez->package.elements[i].string.length] = '\0'; 1119 info->shunts[idx] = rez->package.elements[i + 1].integer.value * 1000; 1120 info->active_channels[idx] = (info->shunts[idx] != 0); 1121 } 1122 1123 ACPI_FREE(rez); 1124 1125 rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_UOHMS_VALS, NULL); 1126 if (!rez) { 1127 /* 1128 * initializing with default values 1129 * we assume all channels are unidirectional(the mask is zero) 1130 * and assign the default sampling rate 1131 */ 1132 info->sample_rate_value = PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ; 1133 return 0; 1134 } 1135 1136 for (i = 0; i < rez->package.count; i++) { 1137 idx = i; 1138 info->shunts[idx] = rez->package.elements[i].integer.value; 1139 info->active_channels[idx] = (info->shunts[idx] != 0); 1140 } 1141 1142 ACPI_FREE(rez); 1143 1144 rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_BIPOLAR_SETTINGS, NULL); 1145 if (!rez) 1146 return -EINVAL; 1147 1148 bi_dir_mask = rez->package.elements[0].integer.value; 1149 info->bi_dir[0] = ((bi_dir_mask & (1 << 3)) | (bi_dir_mask & (1 << 7))) != 0; 1150 info->bi_dir[1] = ((bi_dir_mask & (1 << 2)) | (bi_dir_mask & (1 << 6))) != 0; 1151 info->bi_dir[2] = ((bi_dir_mask & (1 << 1)) | (bi_dir_mask & (1 << 5))) != 0; 1152 info->bi_dir[3] = ((bi_dir_mask & (1 << 0)) | (bi_dir_mask & (1 << 4))) != 0; 1153 1154 ACPI_FREE(rez); 1155 1156 rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_SAMP, NULL); 1157 if (!rez) 1158 return -EINVAL; 1159 1160 info->sample_rate_value = rez->package.elements[0].integer.value; 1161 1162 ACPI_FREE(rez); 1163 1164 return 0; 1165 } 1166 1167 static int pac1934_fw_parse_channel_config(struct i2c_client *client, 1168 struct pac1934_chip_info *info) 1169 { 1170 struct device *dev = &client->dev; 1171 unsigned int current_channel; 1172 int idx, ret; 1173 1174 info->sample_rate_value = 1024; 1175 current_channel = 1; 1176 1177 device_for_each_child_node_scoped(dev, node) { 1178 ret = fwnode_property_read_u32(node, "reg", &idx); 1179 if (ret) 1180 return dev_err_probe(dev, ret, 1181 "reading invalid channel index\n"); 1182 1183 /* adjust idx to match channel index (1 to 4) from the datasheet */ 1184 idx--; 1185 1186 if (current_channel >= (info->phys_channels + 1) || 1187 idx >= info->phys_channels || idx < 0) 1188 return dev_err_probe(dev, -EINVAL, 1189 "%s: invalid channel_index %d value\n", 1190 fwnode_get_name(node), idx); 1191 1192 /* enable channel */ 1193 info->active_channels[idx] = true; 1194 1195 ret = fwnode_property_read_u32(node, "shunt-resistor-micro-ohms", 1196 &info->shunts[idx]); 1197 if (ret) 1198 return dev_err_probe(dev, ret, 1199 "%s: invalid shunt-resistor value: %d\n", 1200 fwnode_get_name(node), info->shunts[idx]); 1201 1202 if (fwnode_property_present(node, "label")) { 1203 ret = fwnode_property_read_string(node, "label", 1204 (const char **)&info->labels[idx]); 1205 if (ret) 1206 return dev_err_probe(dev, ret, 1207 "%s: invalid rail-name value\n", 1208 fwnode_get_name(node)); 1209 } 1210 1211 info->bi_dir[idx] = fwnode_property_read_bool(node, "bipolar"); 1212 1213 current_channel++; 1214 } 1215 1216 return 0; 1217 } 1218 1219 static void pac1934_cancel_delayed_work(void *dwork) 1220 { 1221 cancel_delayed_work_sync(dwork); 1222 } 1223 1224 static int pac1934_chip_configure(struct pac1934_chip_info *info) 1225 { 1226 int cnt, ret; 1227 struct i2c_client *client = info->client; 1228 u8 regs[PAC1934_CTRL_STATUS_INFO_LEN], idx, ctrl_reg; 1229 u32 wait_time; 1230 1231 info->chip_reg_data.num_enabled_channels = 0; 1232 for (cnt = 0; cnt < info->phys_channels; cnt++) { 1233 if (info->active_channels[cnt]) 1234 info->chip_reg_data.num_enabled_channels++; 1235 } 1236 1237 /* 1238 * read whatever information was gathered before the driver was loaded 1239 * establish which channels are enabled/disabled and then establish the 1240 * information retrieval mode (using SKIP or no). 1241 * Read the chip ID values 1242 */ 1243 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 1244 ARRAY_SIZE(regs), 1245 (u8 *)regs); 1246 if (ret < 0) { 1247 dev_err_probe(&client->dev, ret, 1248 "%s - cannot read regs from 0x%02X\n", 1249 __func__, PAC1934_CTRL_STAT_REGS_ADDR); 1250 return ret; 1251 } 1252 1253 /* write the CHANNEL_DIS and the NEG_PWR registers */ 1254 regs[PAC1934_CHANNEL_DIS_REG_OFF] = 1255 FIELD_PREP(PAC1934_CHAN_DIS_CH1_OFF_MASK, info->active_channels[0] ? 0 : 1) | 1256 FIELD_PREP(PAC1934_CHAN_DIS_CH2_OFF_MASK, info->active_channels[1] ? 0 : 1) | 1257 FIELD_PREP(PAC1934_CHAN_DIS_CH3_OFF_MASK, info->active_channels[2] ? 0 : 1) | 1258 FIELD_PREP(PAC1934_CHAN_DIS_CH4_OFF_MASK, info->active_channels[3] ? 0 : 1) | 1259 FIELD_PREP(PAC1934_SMBUS_TIMEOUT_MASK, 0) | 1260 FIELD_PREP(PAC1934_SMBUS_BYTECOUNT_MASK, 0) | 1261 FIELD_PREP(PAC1934_SMBUS_NO_SKIP_MASK, 0); 1262 1263 regs[PAC1934_NEG_PWR_REG_OFF] = 1264 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) | 1265 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) | 1266 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) | 1267 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) | 1268 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) | 1269 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) | 1270 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) | 1271 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]); 1272 1273 /* no SLOW triggered REFRESH, clear POR */ 1274 regs[PAC1934_SLOW_REG_OFF] = 0; 1275 1276 /* 1277 * Write the three bytes sequentially, as the device does not support 1278 * block write. 1279 */ 1280 ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 1281 regs[PAC1934_CHANNEL_DIS_REG_OFF]); 1282 if (ret) 1283 return ret; 1284 1285 ret = i2c_smbus_write_byte_data(client, 1286 PAC1934_CTRL_STAT_REGS_ADDR + PAC1934_NEG_PWR_REG_OFF, 1287 regs[PAC1934_NEG_PWR_REG_OFF]); 1288 if (ret) 1289 return ret; 1290 1291 ret = i2c_smbus_write_byte_data(client, PAC1934_SLOW_REG_ADDR, 1292 regs[PAC1934_SLOW_REG_OFF]); 1293 if (ret) 1294 return ret; 1295 1296 /* Default sampling rate */ 1297 ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, PAC1934_SAMP_1024SPS); 1298 1299 ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, ctrl_reg); 1300 if (ret) 1301 return ret; 1302 1303 /* 1304 * send a REFRESH to the chip, so the new settings take place 1305 * as well as resetting the accumulators 1306 */ 1307 ret = i2c_smbus_write_byte(client, PAC1934_REFRESH_REG_ADDR); 1308 if (ret) { 1309 dev_err(&client->dev, 1310 "%s - cannot send 0x%02X\n", 1311 __func__, PAC1934_REFRESH_REG_ADDR); 1312 return ret; 1313 } 1314 1315 /* 1316 * get the current(in the chip) sampling speed and compute the 1317 * required timeout based on its value 1318 * the timeout is 1/sampling_speed 1319 */ 1320 idx = regs[PAC1934_CTRL_ACT_REG_OFF] >> PAC1934_SAMPLE_RATE_SHIFT; 1321 wait_time = (1024 / samp_rate_map_tbl[idx]) * 1000; 1322 1323 /* 1324 * wait the maximum amount of time to be on the safe side 1325 * the maximum wait time is for 8sps 1326 */ 1327 usleep_range(wait_time, wait_time + 100); 1328 1329 INIT_DELAYED_WORK(&info->work_chip_rfsh, pac1934_work_periodic_rfsh); 1330 /* Setup the latest moment for reading the regs before saturation */ 1331 schedule_delayed_work(&info->work_chip_rfsh, 1332 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); 1333 1334 return devm_add_action_or_reset(&client->dev, pac1934_cancel_delayed_work, 1335 &info->work_chip_rfsh); 1336 } 1337 1338 static int pac1934_prep_iio_channels(struct pac1934_chip_info *info, struct iio_dev *indio_dev) 1339 { 1340 struct iio_chan_spec *ch_sp; 1341 int channel_size, attribute_count, cnt; 1342 void *dyn_ch_struct, *tmp_data; 1343 struct device *dev = &info->client->dev; 1344 1345 /* find out dynamically how many IIO channels we need */ 1346 attribute_count = 0; 1347 channel_size = 0; 1348 for (cnt = 0; cnt < info->phys_channels; cnt++) { 1349 if (!info->active_channels[cnt]) 1350 continue; 1351 1352 /* add the size of the properties of one chip physical channel */ 1353 channel_size += sizeof(pac1934_single_channel); 1354 /* count how many enabled channels we have */ 1355 attribute_count += ARRAY_SIZE(pac1934_single_channel); 1356 dev_dbg(dev, ":%s: Channel %d active\n", __func__, cnt + 1); 1357 } 1358 1359 dyn_ch_struct = devm_kzalloc(dev, channel_size, GFP_KERNEL); 1360 if (!dyn_ch_struct) 1361 return -ENOMEM; 1362 1363 tmp_data = dyn_ch_struct; 1364 1365 /* populate the dynamic channels and make all the adjustments */ 1366 for (cnt = 0; cnt < info->phys_channels; cnt++) { 1367 if (!info->active_channels[cnt]) 1368 continue; 1369 1370 memcpy(tmp_data, pac1934_single_channel, sizeof(pac1934_single_channel)); 1371 ch_sp = (struct iio_chan_spec *)tmp_data; 1372 ch_sp[PAC1934_CH_ENERGY].channel = cnt + 1; 1373 ch_sp[PAC1934_CH_ENERGY].scan_index = cnt; 1374 ch_sp[PAC1934_CH_ENERGY].address = cnt + PAC1934_VPOWER_ACC_1_ADDR; 1375 ch_sp[PAC1934_CH_POWER].channel = cnt + 1; 1376 ch_sp[PAC1934_CH_POWER].scan_index = cnt; 1377 ch_sp[PAC1934_CH_POWER].address = cnt + PAC1934_VPOWER_1_ADDR; 1378 ch_sp[PAC1934_CH_VOLTAGE].channel = cnt + 1; 1379 ch_sp[PAC1934_CH_VOLTAGE].scan_index = cnt; 1380 ch_sp[PAC1934_CH_VOLTAGE].address = cnt + PAC1934_VBUS_1_ADDR; 1381 ch_sp[PAC1934_CH_CURRENT].channel = cnt + 1; 1382 ch_sp[PAC1934_CH_CURRENT].scan_index = cnt; 1383 ch_sp[PAC1934_CH_CURRENT].address = cnt + PAC1934_VSENSE_1_ADDR; 1384 1385 /* 1386 * In order to be able to use labels for PAC1934_CH_VOLTAGE, and 1387 * PAC1934_CH_VOLTAGE_AVERAGE,respectively PAC1934_CH_CURRENT 1388 * and PAC1934_CH_CURRENT_AVERAGE we need to use different 1389 * channel numbers. We will add +5 (+1 to maximum PAC channels). 1390 */ 1391 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].channel = cnt + 5; 1392 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_index = cnt; 1393 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].address = cnt + PAC1934_VBUS_AVG_1_ADDR; 1394 ch_sp[PAC1934_CH_CURRENT_AVERAGE].channel = cnt + 5; 1395 ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_index = cnt; 1396 ch_sp[PAC1934_CH_CURRENT_AVERAGE].address = cnt + PAC1934_VSENSE_AVG_1_ADDR; 1397 1398 /* 1399 * now modify the parameters in all channels if the 1400 * whole chip rail(channel) is bi-directional 1401 */ 1402 if (info->bi_dir[cnt]) { 1403 ch_sp[PAC1934_CH_ENERGY].scan_type.sign = 's'; 1404 ch_sp[PAC1934_CH_ENERGY].scan_type.realbits = 47; 1405 ch_sp[PAC1934_CH_POWER].scan_type.sign = 's'; 1406 ch_sp[PAC1934_CH_POWER].scan_type.realbits = 27; 1407 ch_sp[PAC1934_CH_VOLTAGE].scan_type.sign = 's'; 1408 ch_sp[PAC1934_CH_VOLTAGE].scan_type.realbits = 15; 1409 ch_sp[PAC1934_CH_CURRENT].scan_type.sign = 's'; 1410 ch_sp[PAC1934_CH_CURRENT].scan_type.realbits = 15; 1411 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.sign = 's'; 1412 ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.realbits = 15; 1413 ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.sign = 's'; 1414 ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.realbits = 15; 1415 } 1416 tmp_data += sizeof(pac1934_single_channel); 1417 } 1418 1419 /* 1420 * send the updated dynamic channel structure information towards IIO 1421 * prepare the required field for IIO class registration 1422 */ 1423 indio_dev->num_channels = attribute_count; 1424 indio_dev->channels = (const struct iio_chan_spec *)dyn_ch_struct; 1425 1426 return 0; 1427 } 1428 1429 static IIO_DEVICE_ATTR(in_shunt_resistor1, 0644, 1430 pac1934_shunt_value_show, pac1934_shunt_value_store, 0); 1431 static IIO_DEVICE_ATTR(in_shunt_resistor2, 0644, 1432 pac1934_shunt_value_show, pac1934_shunt_value_store, 1); 1433 static IIO_DEVICE_ATTR(in_shunt_resistor3, 0644, 1434 pac1934_shunt_value_show, pac1934_shunt_value_store, 2); 1435 static IIO_DEVICE_ATTR(in_shunt_resistor4, 0644, 1436 pac1934_shunt_value_show, pac1934_shunt_value_store, 3); 1437 1438 static int pac1934_prep_custom_attributes(struct pac1934_chip_info *info, 1439 struct iio_dev *indio_dev) 1440 { 1441 int i, active_channels_count = 0; 1442 struct attribute **pac1934_custom_attr; 1443 struct attribute_group *pac1934_group; 1444 struct device *dev = &info->client->dev; 1445 1446 for (i = 0 ; i < info->phys_channels; i++) 1447 if (info->active_channels[i]) 1448 active_channels_count++; 1449 1450 pac1934_group = devm_kzalloc(dev, sizeof(*pac1934_group), GFP_KERNEL); 1451 if (!pac1934_group) 1452 return -ENOMEM; 1453 1454 pac1934_custom_attr = devm_kzalloc(dev, 1455 (PAC1934_CUSTOM_ATTR_FOR_CHANNEL * 1456 active_channels_count) 1457 * sizeof(*pac1934_group) + 1, 1458 GFP_KERNEL); 1459 if (!pac1934_custom_attr) 1460 return -ENOMEM; 1461 1462 i = 0; 1463 if (info->active_channels[0]) 1464 pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor1); 1465 1466 if (info->active_channels[1]) 1467 pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor2); 1468 1469 if (info->active_channels[2]) 1470 pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor3); 1471 1472 if (info->active_channels[3]) 1473 pac1934_custom_attr[i] = PAC1934_DEV_ATTR(in_shunt_resistor4); 1474 1475 pac1934_group->attrs = pac1934_custom_attr; 1476 info->iio_info.attrs = pac1934_group; 1477 1478 return 0; 1479 } 1480 1481 static const struct iio_info pac1934_info = { 1482 .read_raw = pac1934_read_raw, 1483 .write_raw = pac1934_write_raw, 1484 .read_avail = pac1934_read_avail, 1485 .read_label = pac1934_read_label, 1486 }; 1487 1488 static int pac1934_probe(struct i2c_client *client) 1489 { 1490 struct pac1934_chip_info *info; 1491 const struct pac1934_features *chip; 1492 struct iio_dev *indio_dev; 1493 int cnt, ret; 1494 struct device *dev = &client->dev; 1495 1496 indio_dev = devm_iio_device_alloc(dev, sizeof(*info)); 1497 if (!indio_dev) 1498 return -ENOMEM; 1499 1500 info = iio_priv(indio_dev); 1501 1502 info->client = client; 1503 1504 /* always start with energy accumulation enabled */ 1505 for (cnt = 0; cnt < PAC1934_MAX_NUM_CHANNELS; cnt++) 1506 info->enable_energy[cnt] = true; 1507 1508 ret = pac1934_chip_identify(info); 1509 if (ret < 0) { 1510 /* 1511 * If failed to identify the hardware based on internal 1512 * registers, try using fallback compatible in device tree 1513 * to deal with some newer part number. 1514 */ 1515 chip = i2c_get_match_data(client); 1516 if (!chip) 1517 return -EINVAL; 1518 1519 info->phys_channels = chip->phys_channels; 1520 indio_dev->name = chip->name; 1521 } else { 1522 info->phys_channels = pac1934_chip_config[ret].phys_channels; 1523 indio_dev->name = pac1934_chip_config[ret].name; 1524 } 1525 1526 if (is_acpi_device_node(dev_fwnode(dev))) 1527 ret = pac1934_acpi_parse_channel_config(client, info); 1528 else 1529 /* 1530 * This makes it possible to use also ACPI PRP0001 for 1531 * registering the device using device tree properties. 1532 */ 1533 ret = pac1934_fw_parse_channel_config(client, info); 1534 1535 if (ret) 1536 return dev_err_probe(dev, ret, 1537 "parameter parsing returned an error\n"); 1538 1539 ret = devm_mutex_init(dev, &info->lock); 1540 if (ret < 0) 1541 return ret; 1542 1543 /* 1544 * do now any chip specific initialization (e.g. read/write 1545 * some registers), enable/disable certain channels, change the sampling 1546 * rate to the requested value 1547 */ 1548 ret = pac1934_chip_configure(info); 1549 if (ret < 0) 1550 return ret; 1551 1552 /* prepare the channel information */ 1553 ret = pac1934_prep_iio_channels(info, indio_dev); 1554 if (ret < 0) 1555 return ret; 1556 1557 info->iio_info = pac1934_info; 1558 indio_dev->info = &info->iio_info; 1559 indio_dev->modes = INDIO_DIRECT_MODE; 1560 1561 ret = pac1934_prep_custom_attributes(info, indio_dev); 1562 if (ret < 0) 1563 return dev_err_probe(dev, ret, 1564 "Can't configure custom attributes for PAC1934 device\n"); 1565 1566 /* 1567 * read whatever has been accumulated in the chip so far 1568 * and reset the accumulators 1569 */ 1570 ret = pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR, 1571 PAC1934_MIN_UPDATE_WAIT_TIME_US); 1572 if (ret < 0) 1573 return ret; 1574 1575 ret = devm_iio_device_register(dev, indio_dev); 1576 if (ret < 0) 1577 return dev_err_probe(dev, ret, 1578 "Can't register IIO device\n"); 1579 1580 return 0; 1581 } 1582 1583 static const struct i2c_device_id pac1934_id[] = { 1584 { .name = "pac1931", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1931] }, 1585 { .name = "pac1932", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1932] }, 1586 { .name = "pac1933", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1933] }, 1587 { .name = "pac1934", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] }, 1588 { } 1589 }; 1590 MODULE_DEVICE_TABLE(i2c, pac1934_id); 1591 1592 static const struct of_device_id pac1934_of_match[] = { 1593 { 1594 .compatible = "microchip,pac1931", 1595 .data = &pac1934_chip_config[PAC1931] 1596 }, 1597 { 1598 .compatible = "microchip,pac1932", 1599 .data = &pac1934_chip_config[PAC1932] 1600 }, 1601 { 1602 .compatible = "microchip,pac1933", 1603 .data = &pac1934_chip_config[PAC1933] 1604 }, 1605 { 1606 .compatible = "microchip,pac1934", 1607 .data = &pac1934_chip_config[PAC1934] 1608 }, 1609 { } 1610 }; 1611 MODULE_DEVICE_TABLE(of, pac1934_of_match); 1612 1613 /* 1614 * using MCHP1930 to be compatible with BIOS ACPI. See example: 1615 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC1934-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf 1616 */ 1617 static const struct acpi_device_id pac1934_acpi_match[] = { 1618 { "MCHP1930", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] }, 1619 { } 1620 }; 1621 MODULE_DEVICE_TABLE(acpi, pac1934_acpi_match); 1622 1623 static struct i2c_driver pac1934_driver = { 1624 .driver = { 1625 .name = "pac1934", 1626 .of_match_table = pac1934_of_match, 1627 .acpi_match_table = pac1934_acpi_match 1628 }, 1629 .probe = pac1934_probe, 1630 .id_table = pac1934_id, 1631 }; 1632 1633 module_i2c_driver(pac1934_driver); 1634 1635 MODULE_AUTHOR("Bogdan Bolocan <bogdan.bolocan@microchip.com>"); 1636 MODULE_AUTHOR("Victor Tudose"); 1637 MODULE_AUTHOR("Marius Cristea <marius.cristea@microchip.com>"); 1638 MODULE_DESCRIPTION("IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor"); 1639 MODULE_LICENSE("GPL"); 1640