Home
last modified time | relevance | path

Searched refs:NoOfDPP (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c3750 v->NoOfDPP[i][j][k] = 4; in dml30_ModeSupportAndSystemConfigurationFull()
3754 v->NoOfDPP[i][j][k] = 2; in dml30_ModeSupportAndSystemConfigurationFull()
3760 v->NoOfDPP[i][j][k] = 1; in dml30_ModeSupportAndSystemConfigurationFull()
3764 v->NoOfDPP[i][j][k] = 2; in dml30_ModeSupportAndSystemConfigurationFull()
3768 …if ((v->MinDPPCLKUsingSingleDPP[k] / v->NoOfDPP[i][j][k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpread… in dml30_ModeSupportAndSystemConfigurationFull()
3776 v->TotalNumberOfActiveDPP[i][j] = v->TotalNumberOfActiveDPP[i][j] + v->NoOfDPP[i][j][k]; in dml30_ModeSupportAndSystemConfigurationFull()
3777 if (v->NoOfDPP[i][j][k] == 1) in dml30_ModeSupportAndSystemConfigurationFull()
3794 v->NoOfDPP[i][j][NumberOfNonSplitPlaneOfMaximumBandwidth] = 2; in dml30_ModeSupportAndSystemConfigurationFull()
3808 v->NoOfDPP[i][j][k] = 2; in dml30_ModeSupportAndSystemConfigurationFull()
3812 v->NoOfDPP[i][j][k] = 1; in dml30_ModeSupportAndSystemConfigurationFull()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_32.c2139 mode_lib->vba.NoOfDPP[i][j][k] = 4; in dml32_ModeSupportAndSystemConfigurationFull()
2142 mode_lib->vba.NoOfDPP[i][j][k] = 2; in dml32_ModeSupportAndSystemConfigurationFull()
2145 mode_lib->vba.NoOfDPP[i][j][k] = 1; in dml32_ModeSupportAndSystemConfigurationFull()
2153 mode_lib->vba.NoOfDPP[i][j][k] = 1; in dml32_ModeSupportAndSystemConfigurationFull()
2156 mode_lib->vba.NoOfDPP[i][j][k] = 2; in dml32_ModeSupportAndSystemConfigurationFull()
2161 mode_lib->vba.NoOfDPP[i][j][k] = 1; in dml32_ModeSupportAndSystemConfigurationFull()
2170 if (mode_lib->vba.NoOfDPP[i][j][k] == 1) in dml32_ModeSupportAndSystemConfigurationFull()
2218 mode_lib->vba.NoOfDPP[i][j][NumberOfNonCombinedSurfaceOfMaximumBandwidth] = 2; in dml32_ModeSupportAndSystemConfigurationFull()
2254 mode_lib->vba.NoOfDPPThisState[k] = mode_lib->vba.NoOfDPP[i][j][k]; in dml32_ModeSupportAndSystemConfigurationFull()
2551 mode_lib->vba.NoOfDPPThisState[k] = mode_lib->vba.NoOfDPP[i][j][k]; in dml32_ModeSupportAndSystemConfigurationFull()
[all …]
H A Ddisplay_mode_vba_util_32.h622 unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX],
H A Ddisplay_mode_vba_util_32.c2956 unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX], in dml32_UseMinimumDCFCLK()
3005 + NoOfDPP[i][j][k] * DPTEBytesPerRow[i][j][k] in dml32_UseMinimumDCFCLK()
3010 NoOfDPPState[k] = NoOfDPP[i][j][k]; in dml32_UseMinimumDCFCLK()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c7379 mode_lib->ms.NoOfDPP, in dml_core_ms_prefetch_check()
7413 mode_lib->ms.NoOfDPP[k], in dml_core_ms_prefetch_check()
7420 mode_lib->ms.NoOfDPP[k], in dml_core_ms_prefetch_check()
7439 myPipe->DPPPerSurface = mode_lib->ms.NoOfDPP[k]; in dml_core_ms_prefetch_check()
7566 mode_lib->ms.NoOfDPP, in dml_core_ms_prefetch_check()
7662 calculate_peak_bandwidth_params->num_of_dpp = mode_lib->ms.NoOfDPP; in dml_core_ms_prefetch_check()
7777 mode_lib->ms.TotImmediateFlipBytes += s->per_pipe_flip_bytes[k] * mode_lib->ms.NoOfDPP[k]; in dml_core_ms_prefetch_check()
7829 calculate_peak_bandwidth_params->num_of_dpp = mode_lib->ms.NoOfDPP; in dml_core_ms_prefetch_check()
7916 CalculateWatermarks_params->DPPPerSurface = mode_lib->ms.NoOfDPP; in dml_core_ms_prefetch_check()
8545 mode_lib->ms.NoOfDPP[k] = 1; in dml_core_mode_support()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1884 if (v->NoOfDPP[vlevel][0][pipe_idx] == 1 && in dcn20_validate_apply_pipe_split_flags()
1907 if (split4mpc || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 4) in dcn20_validate_apply_pipe_split_flags()
1909 else if (force_split || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 2) in dcn20_validate_apply_pipe_split_flags()
1994 if (split[i] != 0 && v->NoOfDPP[vlevel][max_mpc_comb][pipe_idx] == 1) { in dcn20_validate_apply_pipe_split_flags()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core.c4608 …lipDPTERowBandwidth[j] = s->TotalMaxPrefetchFlipDPTERowBandwidth[j] + p->NoOfDPP[j][k] * p->DPTEBy… in UseMinimumDCFCLK()
4612 s->NoOfDPPState[k] = p->NoOfDPP[j][k]; in UseMinimumDCFCLK()
6282 mode_lib->ms.NoOfDPPThisState[k] = mode_lib->ms.NoOfDPP[j][k]; in dml_prefetch_check()
6369 myPipe->DPPPerSurface = mode_lib->ms.NoOfDPP[j][k]; in dml_prefetch_check()
6532 …otImmediateFlipBytes = mode_lib->ms.TotImmediateFlipBytes + mode_lib->ms.NoOfDPP[j][k] * (mode_lib… in dml_prefetch_check()
6534 …otImmediateFlipBytes = mode_lib->ms.TotImmediateFlipBytes + mode_lib->ms.NoOfDPP[j][k] * (2 * mode… in dml_prefetch_check()
6536 …otImmediateFlipBytes = mode_lib->ms.TotImmediateFlipBytes + mode_lib->ms.NoOfDPP[j][k] * mode_lib-… in dml_prefetch_check()
6590 …mode_lib->ms.NoOfDPP[j], // VBA_ERROR DPPPerSurface is not assigned at this point, should use NoOf… in dml_prefetch_check()
7212 mode_lib->ms.NoOfDPP[j][k] = 4; in dml_core_mode_support()
7215 mode_lib->ms.NoOfDPP[j][k] = 2; in dml_core_mode_support()
[all …]
H A Ddisplay_mode_core_structs.h984 dml_uint_t NoOfDPP[2][__DML_NUM_PLANES__]; member
1304 dml_uint_t (*NoOfDPP)[__DML_NUM_PLANES__]; member
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h741 unsigned int NoOfDPP[DC__VOLTAGE_STATES][2][DC__NUM_DPP__MAX]; member