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Searched refs:NVDEF (Results 1 – 25 of 36) sorted by relevance

12

/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_boa0b5.c64 NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) | in nve0_bo_move_copy()
65 NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) | in nve0_bo_move_copy()
66 NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) | in nve0_bo_move_copy()
67 NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) | in nve0_bo_move_copy()
68 NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) | in nve0_bo_move_copy()
69 NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) | in nve0_bo_move_copy()
70 NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) | in nve0_bo_move_copy()
71 NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) | in nve0_bo_move_copy()
72 NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING) | in nve0_bo_move_copy()
73 NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, VIRTUAL) | in nve0_bo_move_copy()
[all …]
H A Dnouveau_bo5039.c64 NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, BLOCKLINEAR), in nv50_bo_move_m2mf()
67 NVDEF(NV5039, SET_SRC_BLOCK_SIZE, WIDTH, ONE_GOB) | in nv50_bo_move_m2mf()
68 NVDEF(NV5039, SET_SRC_BLOCK_SIZE, HEIGHT, ONE_GOB) | in nv50_bo_move_m2mf()
69 NVDEF(NV5039, SET_SRC_BLOCK_SIZE, DEPTH, ONE_GOB), in nv50_bo_move_m2mf()
81 NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, PITCH)); in nv50_bo_move_m2mf()
86 NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, BLOCKLINEAR), in nv50_bo_move_m2mf()
89 NVDEF(NV5039, SET_DST_BLOCK_SIZE, WIDTH, ONE_GOB) | in nv50_bo_move_m2mf()
90 NVDEF(NV5039, SET_DST_BLOCK_SIZE, HEIGHT, ONE_GOB) | in nv50_bo_move_m2mf()
91 NVDEF(NV5039, SET_DST_BLOCK_SIZE, DEPTH, ONE_GOB), in nv50_bo_move_m2mf()
103 NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, PITCH)); in nv50_bo_move_m2mf()
[all …]
H A Dgv100_fence.c30 NVDEF(NVC36F, SEM_EXECUTE, OPERATION, RELEASE) | in gv100_fence_emit32()
31 NVDEF(NVC36F, SEM_EXECUTE, RELEASE_WFI, EN) | in gv100_fence_emit32()
32 NVDEF(NVC36F, SEM_EXECUTE, PAYLOAD_SIZE, 32BIT) | in gv100_fence_emit32()
33 NVDEF(NVC36F, SEM_EXECUTE, RELEASE_TIMESTAMP, DIS)); in gv100_fence_emit32()
37 MEM_OP_C, NVDEF(NVC36F, MEM_OP_C, MEMBAR_TYPE, SYS_MEMBAR), in gv100_fence_emit32()
38 MEM_OP_D, NVDEF(NVC36F, MEM_OP_D, OPERATION, MEMBAR)); in gv100_fence_emit32()
61 NVDEF(NVC36F, SEM_EXECUTE, OPERATION, ACQ_CIRC_GEQ) | in gv100_fence_sync32()
62 NVDEF(NVC36F, SEM_EXECUTE, ACQUIRE_SWITCH_TSG, EN) | in gv100_fence_sync32()
63 NVDEF(NVC36F, SEM_EXECUTE, PAYLOAD_SIZE, 32BIT)); in gv100_fence_sync32()
H A Dnouveau_dmem.c570 NVDEF(NVA0B5, SET_SRC_PHYS_MODE, TARGET, LOCAL_FB)); in nvc0b5_migrate_copy()
574 NVDEF(NVA0B5, SET_SRC_PHYS_MODE, TARGET, COHERENT_SYSMEM)); in nvc0b5_migrate_copy()
580 launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, PHYSICAL); in nvc0b5_migrate_copy()
587 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, LOCAL_FB)); in nvc0b5_migrate_copy()
591 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, COHERENT_SYSMEM)); in nvc0b5_migrate_copy()
597 launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, PHYSICAL); in nvc0b5_migrate_copy()
615 NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) | in nvc0b5_migrate_copy()
616 NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) | in nvc0b5_migrate_copy()
617 NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) | in nvc0b5_migrate_copy()
618 NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) | in nvc0b5_migrate_copy()
[all …]
H A Dnouveau_bo9039.c71 NVDEF(NV9039, LAUNCH_DMA, SRC_INLINE, FALSE) | in nvc0_bo_move_m2mf()
72 NVDEF(NV9039, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) | in nvc0_bo_move_m2mf()
73 NVDEF(NV9039, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) | in nvc0_bo_move_m2mf()
74 NVDEF(NV9039, LAUNCH_DMA, COMPLETION_TYPE, FLUSH_DISABLE) | in nvc0_bo_move_m2mf()
75 NVDEF(NV9039, LAUNCH_DMA, INTERRUPT_TYPE, NONE) | in nvc0_bo_move_m2mf()
76 NVDEF(NV9039, LAUNCH_DMA, SEMAPHORE_STRUCT_SIZE, ONE_WORD)); in nvc0_bo_move_m2mf()
H A Dnouveau_connector.h71 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, DISABLE),
73 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, ENABLE),
75 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, DYNAMIC_2X2),
77 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, STATIC_2X2),
79 NVDEF(NV907D, HEAD_SET_DITHER_CONTROL, MODE, TEMPORAL),
84 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_6_BITS),
86 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_8_BITS),
H A Dnvc0_fence.c47 NVDEF(NV906F, SEMAPHORED, OPERATION, RELEASE) | in nvc0_fence_emit32()
48 NVDEF(NV906F, SEMAPHORED, RELEASE_WFI, EN) | in nvc0_fence_emit32()
49 NVDEF(NV906F, SEMAPHORED, RELEASE_SIZE, 16BYTE), in nvc0_fence_emit32()
70 NVDEF(NV906F, SEMAPHORED, OPERATION, ACQ_GEQ) | in nvc0_fence_sync32()
71 NVDEF(NV906F, SEMAPHORED, ACQUIRE_SWITCH, ENABLED)); in nvc0_fence_sync32()
/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dhead907d.c68 NVDEF(NV907D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) | in head907d_procamp()
69 NVDEF(NV907D, HEAD_SET_PROCAMP, CHROMA_LPF, AUTO) | in head907d_procamp()
72 NVDEF(NV907D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA) | in head907d_procamp()
73 NVDEF(NV907D, HEAD_SET_PROCAMP, RANGE_COMPRESSION, DISABLE)); in head907d_procamp()
105 case 8: bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, PIXEL_DEPTH, BPP_64); break; in head907d_ovly()
106 case 4: bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, PIXEL_DEPTH, BPP_32); break; in head907d_ovly()
107 case 2: bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); break; in head907d_ovly()
112 bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, USABLE, TRUE); in head907d_ovly()
114 bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); in head907d_ovly()
134 case 8: bounds |= NVDEF(NV907D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_64); break; in head907d_base()
[all …]
H A Dcrc907d.c31 u32 crc_args = NVDEF(NV907D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) | in crc907d_set_src()
32 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) | in crc907d_set_src()
33 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, TIMESTAMP_MODE, FALSE) | in crc907d_set_src()
34 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, SECONDARY_OUTPUT, NONE) | in crc907d_set_src()
35 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE) | in crc907d_set_src()
36 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, WIDE_PIPE_CRC, ENABLE); in crc907d_set_src()
41 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, SOR(or)); in crc907d_set_src()
44 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, PIOR(or)); in crc907d_set_src()
47 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, DAC(or)); in crc907d_set_src()
50 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, RG(i)); in crc907d_set_src()
[all …]
H A Dcore507d.c44 NVDEF(NV507D, SET_NOTIFIER_CONTROL, MODE, WRITE) | in core507d_update()
46 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE)); in core507d_update()
51 NVDEF(NV507D, UPDATE, NOT_DRIVER_FRIENDLY, FALSE) | in core507d_update()
52 NVDEF(NV507D, UPDATE, NOT_DRIVER_UNFRIENDLY, FALSE) | in core507d_update()
53 NVDEF(NV507D, UPDATE, INHIBIT_INTERRUPTS, FALSE), in core507d_update()
56 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, DISABLE)); in core507d_update()
77 NVDEF(NV_DISP_CORE_NOTIFIER_1, COMPLETION_0, DONE, FALSE)); in core507d_ntfy_init()
91 NVDEF(NV507D, SET_NOTIFIER_CONTROL, MODE, WRITE) | in core507d_read_caps()
93 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE)); in core507d_read_caps()
98 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, DISABLE)); in core507d_read_caps()
[all …]
H A Dhead507d.c40 NVDEF(NV507D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) | in head507d_procamp()
41 NVDEF(NV507D, HEAD_SET_PROCAMP, CHROMA_LPF, AUTO) | in head507d_procamp()
44 NVDEF(NV507D, HEAD_SET_PROCAMP, TRANSITION, HARD)); in head507d_procamp()
76 case 4: bounds |= NVDEF(NV507D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_32); break; in head507d_ovly()
77 case 2: bounds |= NVDEF(NV507D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); break; in head507d_ovly()
82 bounds |= NVDEF(NV507D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, USABLE, TRUE); in head507d_ovly()
84 bounds |= NVDEF(NV507D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); in head507d_ovly()
104 case 8: bounds |= NVDEF(NV507D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_64); break; in head507d_base()
105 case 4: bounds |= NVDEF(NV507D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_32); break; in head507d_base()
106 case 2: bounds |= NVDEF(NV507D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); break; in head507d_base()
[all …]
H A Dwndwca7e.c26 NVDEF(NVCA7E, SET_PRESENT_CONTROL, BEGIN_MODE, NON_TEARING)); in wndwca7e_image_clr()
29 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, ENABLE, DISABLE)); in wndwca7e_image_clr()
55 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, TARGET, PHYSICAL_NVM) | in wndwca7e_image_set()
57 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, ENABLE, ENABLE)); in wndwca7e_image_set()
62 NVDEF(NVCA7E, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE)); in wndwca7e_image_set()
73 NVDEF(NVCA7E, SET_PARAMS, CLAMP_BEFORE_BLEND, DISABLE) | in wndwca7e_image_set()
74 NVDEF(NVCA7E, SET_PARAMS, SWAP_UV, DISABLE) | in wndwca7e_image_set()
75 NVDEF(NVCA7E, SET_PARAMS, FMT_ROUNDING_MODE, ROUND_TO_NEAREST), in wndwca7e_image_set()
107 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ILUT, ENABLE, DISABLE)); in wndwca7e_ilut_clr()
128 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ILUT, TARGET, PHYSICAL_NVM) | in wndwca7e_ilut_set()
[all …]
H A Dheadc37d.c60 NVDEF(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, COLOR_SPACE_OVERRIDE, DISABLE)); in headc37d_or()
75 NVDEF(NVC37D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) | in headc37d_procamp()
76 NVDEF(NVC37D, HEAD_SET_PROCAMP, CHROMA_LPF, DISABLE) | in headc37d_procamp()
79 NVDEF(NVC37D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA) | in headc37d_procamp()
80 NVDEF(NVC37D, HEAD_SET_PROCAMP, RANGE_COMPRESSION, DISABLE) | in headc37d_procamp()
81 NVDEF(NVC37D, HEAD_SET_PROCAMP, BLACK_LEVEL, GRAPHICS)); in headc37d_procamp()
98 NVDEF(NVC37D, HEAD_SET_DITHER_CONTROL, OFFSET_ENABLE, DISABLE) | in headc37d_dither()
115 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in headc37d_curs_clr()
116 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8)); in headc37d_curs_clr()
133 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in headc37d_curs_set()
[all …]
H A Dcrcc57d.c18 u32 crc_args = NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) | in crcc57d_set_src()
19 NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) | in crcc57d_set_src()
20 NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, SECONDARY_CRC, NONE) | in crcc57d_set_src()
21 NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE); in crcc57d_set_src()
26 crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SOR(or)); in crcc57d_set_src()
29 crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SF); in crcc57d_set_src()
H A Dhead827d.c40 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in head827d_curs_clr()
41 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) | in head827d_curs_clr()
42 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head827d_curs_clr()
59 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head827d_curs_set()
64 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, COMPOSITION, ALPHA_BLEND) | in head827d_curs_set()
65 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SUB_OWNER, NONE), in head827d_curs_set()
98 NVDEF(NV827D, HEAD_SET_PARAMS, SUPER_SAMPLE, X1_AA) | in head827d_core_set()
99 NVDEF(NV827D, HEAD_SET_PARAMS, GAMMA, LINEAR), in head827d_core_set()
121 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, DISABLE)); in head827d_olut_clr()
138 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, ENABLE) | in head827d_olut_set()
H A Dhead917d.c58 case 8: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_64); break; in head917d_base()
59 case 4: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_32); break; in head917d_base()
60 case 2: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); break; in head917d_base()
61 case 1: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_8); break; in head917d_base()
66 bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, USABLE, TRUE); in head917d_base()
67 bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, BASE_LUT, USAGE_1025); in head917d_base()
89 NVDEF(NV917D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head917d_curs_set()
94 NVDEF(NV917D, HEAD_SET_CONTROL_CURSOR, COMPOSITION, ALPHA_BLEND), in head917d_curs_set()
H A Dbase907c.c39 NVDEF(NV907C, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE) | in base907c_image_set()
59 NVDEF(NV907C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) | in base907c_image_set()
60 NVDEF(NV907C, SURFACE_SET_PARAMS, GAMMA, LINEAR) | in base907c_image_set()
61 NVDEF(NV907C, SURFACE_SET_PARAMS, LAYOUT, FRM)); in base907c_image_set()
75 NVDEF(NV907C, SET_BASE_LUT_LO, ENABLE, DISABLE)); in base907c_xlut_clr()
78 NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, DISABLE)); in base907c_xlut_clr()
100 NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, USE_CORE_LUT)); in base907c_xlut_set()
166 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, CORE)); in base907c_csc_clr()
180 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, BASE) | in base907c_csc_set()
H A Dcrcc37d.c21 NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) | in crcc37d_set_src()
22 NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, SECONDARY_CRC, NONE) | in crcc37d_set_src()
23 NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE); in crcc37d_set_src()
28 crc_args |= NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SOR(or)); in crcc37d_set_src()
31 crc_args |= NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, PIOR(or)); in crcc37d_set_src()
34 crc_args |= NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SF); in crcc37d_set_src()
H A Dbase507c.c58 NVDEF(NV507C, SET_PRESENT_CONTROL, BEGIN_MODE, NON_TEARING) | in base507c_image_clr()
82 NVDEF(NV507C, SET_PROCESSING, USE_GAIN_OFS, ENABLE), in base507c_image_set()
89 NVDEF(NV507C, SET_PROCESSING, USE_GAIN_OFS, DISABLE), in base507c_image_set()
110 NVDEF(NV507C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) | in base507c_image_set()
111 NVDEF(NV507C, SURFACE_SET_PARAMS, GAMMA, LINEAR) | in base507c_image_set()
112 NVDEF(NV507C, SURFACE_SET_PARAMS, LAYOUT, FRM) | in base507c_image_set()
114 NVDEF(NV507C, SURFACE_SET_PARAMS, PART_STRIDE, PARTSTRIDE_256)); in base507c_image_set()
128 NVDEF(NV507C, SET_BASE_LUT_LO, ENABLE, DISABLE)); in base507c_xlut_clr()
142 NVDEF(NV507C, SET_BASE_LUT_LO, ENABLE, USE_CORE_LUT)); in base507c_xlut_set()
192 NVDEF(NV_DISP_BASE_NOTIFIER_1, _0, STATUS, NOT_BEGUN)); in base507c_ntfy_reset()
H A Dbase827c.c45 NVDEF(NV827C, SET_PROCESSING, USE_GAIN_OFS, ENABLE), in base827c_image_set()
52 NVDEF(NV827C, SET_PROCESSING, USE_GAIN_OFS, DISABLE), in base827c_image_set()
74 NVDEF(NV827C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) | in base827c_image_set()
75 NVDEF(NV827C, SURFACE_SET_PARAMS, GAMMA, LINEAR) | in base827c_image_set()
76 NVDEF(NV827C, SURFACE_SET_PARAMS, LAYOUT, FRM)); in base827c_image_set()
H A Dwndwc67e.c41 NVDEF(NVC57E, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE)); in wndwc67e_image_set()
52 NVDEF(NVC57E, SET_PARAMS, CLAMP_BEFORE_BLEND, DISABLE) | in wndwc67e_image_set()
53 NVDEF(NVC57E, SET_PARAMS, SWAP_UV, DISABLE) | in wndwc67e_image_set()
54 NVDEF(NVC57E, SET_PARAMS, FMT_ROUNDING_MODE, ROUND_TO_NEAREST), in wndwc67e_image_set()
H A Dovly827e.c42 NVDEF(NV827E, SET_PRESENT_CONTROL, BEGIN_MODE, ASAP) | in ovly827e_image_set()
48 NVDEF(NV827E, SET_COMPOSITION_CONTROL, MODE, OPAQUE_SUSPEND_BASE)); in ovly827e_image_set()
87 NVDEF(NV_DISP_NOTIFICATION_1, _3, STATUS, NOT_BEGUN)); in ovly827e_ntfy_reset()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/
H A Dfifo.c94 args->flags = NVDEF(NVOS04, FLAGS, CHANNEL_TYPE, PHYSICAL); in r535_chan_alloc()
95 args->flags |= NVDEF(NVOS04, FLAGS, VPR, FALSE); in r535_chan_alloc()
96 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_MAP_REFCOUNTING, FALSE); in r535_chan_alloc()
99 args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, FALSE); in r535_chan_alloc()
101 args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, TRUE); in r535_chan_alloc()
102 args->flags |= NVDEF(NVOS04, FLAGS, DELAY_CHANNEL_SCHEDULING, FALSE); in r535_chan_alloc()
103 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_DENY_PHYSICAL_MODE_CE, FALSE); in r535_chan_alloc()
106 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_FIXED, FALSE); in r535_chan_alloc()
108 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_FIXED, TRUE); in r535_chan_alloc()
110 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_DENY_AUTH_LEVEL_PRIV, FALSE); in r535_chan_alloc()
[all …]
H A Dfbsr.c71 rpc->flags = NVDEF(NVOS02, FLAGS, PHYSICALITY, NONCONTIGUOUS) | in r535_fbsr_memlist()
72 NVDEF(NVOS02, FLAGS, LOCATION, PCI) | in r535_fbsr_memlist()
73 NVDEF(NVOS02, FLAGS, MAPPING, NO_MAP); in r535_fbsr_memlist()
76 rpc->flags = NVDEF(NVOS02, FLAGS, PHYSICALITY, CONTIGUOUS) | in r535_fbsr_memlist()
77 NVDEF(NVOS02, FLAGS, LOCATION, VIDMEM) | in r535_fbsr_memlist()
78 NVDEF(NVOS02, FLAGS, MAPPING, NO_MAP); in r535_fbsr_memlist()
/linux/drivers/gpu/drm/nouveau/include/nvif/
H A Dpush507c.h10 PUSH_DATA__((p), NVDEF(NV507C, DMA, OPCODE, METHOD) | \
21 PUSH_DATA__((p), NVDEF(NV507C, DMA, OPCODE, JUMP) | \

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