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Searched refs:N1 (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dnv40.c63 int N1 = (coef & 0x0000ff00) >> 8; in read_pll_2() local
69 khz = ref * N1 / M1; in read_pll_2()
125 int *N1, int *M1, int *N2, int *M2, int *log2P) in nv40_clk_calc_pll() argument
138 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P); in nv40_clk_calc_pll()
151 int N1, M1, N2, M2, log2P; in nv40_clk_calc() local
156 &N1, &M1, &N2, &M2, &log2P); in nv40_clk_calc()
162 clk->npll_coef = (N1 << 8) | M1; in nv40_clk_calc()
165 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_clk_calc()
171 &N1, &M1, NULL, NULL, &log2P); in nv40_clk_calc()
175 clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1; in nv40_clk_calc()
H A Dpllnv04.c151 int M1, N1, M2, N2, log2P; in getMNP_double() local
170 for (N1 = minN1; N1 <= maxN1; N1++) { in getMNP_double()
171 calcclk1 = crystal * N1 / M1; in getMNP_double()
211 *pN1 = N1; in getMNP_double()
228 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc() argument
233 ret = getMNP_single(subdev, info, freq, N1, M1, P); in nv04_pll_calc()
239 ret = getMNP_double(subdev, info, freq, N1, M1, N2, M2, P); in nv04_pll_calc()
H A Dnv04.c35 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local
36 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P); in nv04_clk_pll_calc()
39 pv->N1 = N1; in nv04_clk_pll_calc()
H A Dpll.h9 int *N1, int *M1, int *N2, int *M2, int *P);
H A Dmcp77.c57 int N1, M1; in read_pll() local
70 N1 = (coef & 0x0000ff00) >> 8; in read_pll()
73 clock = ref * N1 / M1; in read_pll()
H A Dnv50.c166 int N1, N2, M1, M2; in read_pll() local
176 N1 = (coef & 0x0000ff00) >> 8; in read_pll()
179 freq = ref * N1 / M1; in read_pll()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dnv50.c41 int N1, M1, N2, M2, P; in nv50_devinit_pll_set() local
50 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv50_devinit_pll_set()
60 nvkm_mask(device, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1); in nv50_devinit_pll_set()
69 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set()
73 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set()
H A Dnv04.c164 if (oldM && pv->M1 && (oldN / oldM < pv->N1 / pv->M1)) in setPLL_single()
363 int N1, M1, N2, M2, P; in nv04_devinit_pll_set() local
370 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv04_devinit_pll_set()
375 pv.N1 = N1; in nv04_devinit_pll_set()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv40.c40 int N1, M1, N2, M2; in nv40_ram_calc() local
49 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P); in nv40_ram_calc()
57 ram->coef = (N1 << 8) | M1; in nv40_ram_calc()
60 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_ram_calc()
H A Dramgf100.c143 int N1, M1, P; in gf100_ram_calc() local
216 &N1, NULL, &M1, &P); in gf100_ram_calc()
225 ram_wr32(fuc, 0x10fe24, (P << 16) | (N1 << 8) | M1); in gf100_ram_calc()
231 &N1, NULL, &M1, &P); in gf100_ram_calc()
238 ram_wr32(fuc, 0x132004, (P << 16) | (N1 << 8) | M1); in gf100_ram_calc()
H A Dramgk104.c133 int N1, fN1, M1, P1; member
161 const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); in r1373f4_init()
703 const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); in gk104_ram_calc_sddr3()
989 int *N1, int *fN1, int *M1, int *P1, in gk104_pll_calc_hiclk() argument
1014 *N1 = n_ref; in gk104_pll_calc_hiclk()
1025 *N1 = n_ref; in gk104_pll_calc_hiclk()
1037 return gk104_calc_pll_output(*fN1, 1, *N1, *P1, crystal); in gk104_pll_calc_hiclk()
1066 &ram->N1, &ram->fN1, &ram->M1, &ram->P1, in gk104_ram_calc_xits()
1077 ret = gt215_pll_calc(subdev, &fuc->refpll, refclk, &ram->N1, in gk104_ram_calc_xits()
H A Dramnv50.c230 int N1, M1, N2, M2, P; in nv50_ram_calc() local
331 &N1, &M1, &N2, &M2, &P); in nv50_ram_calc()
355 ram_mask(hwsq, 0x00400c, 0x0000ffff, (N1 << 8) | M1); in nv50_ram_calc()
/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dpll.h9 uint8_t N1, M1, N2, M2; member
11 uint8_t M1, N1, M2, N2;
/linux/drivers/dma/dw/
H A DKconfig20 tristate "Renesas RZ/N1 DMAMUX driver"
24 Support the Renesas RZ/N1 DMAMUX which is located in front of
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905d-phicomm-n1.dts12 model = "Phicomm N1";
/linux/Documentation/networking/device_drivers/ethernet/3com/
H A Dvortex.rst94 options=N1,N2,N3,...
145 full_duplex=N1,N2,N3...
154 global_full_duplex=N1
159 flow_ctrl=N1,N2,N3...
197 hw_checksums=N1,N2,N3,...
238 enable_wol=N1,N2,N3,...
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-dac-ad576631 select N0 source, write "1" to select N1 source.
/linux/Documentation/arch/arm/sa1100/
H A Dcerf.rst23 - Serial ports with a serial console (hardcoded to 38400 8N1)
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c211 return pv->N1 * pv->N2 * pv->refclk / (pv->M1 * pv->M2) >> pv->log2P; in nouveau_hw_pllvals_to_clk()
272 pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n && in nouveau_hw_fix_bad_vpll()
280 pv.N1 = pll_lim.vco1.min_n; in nouveau_hw_fix_bad_vpll()
H A Dcrtc.c166 pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P); in nv_crtc_calc_state_ext()
169 pv->N1, pv->M1, pv->log2P); in nv_crtc_calc_state_ext()
/linux/net/dsa/
H A DKconfig169 tristate "Tag driver for Renesas RZ/N1 A5PSW switch"
172 Renesas RZ/N1 embedded switch that uses an 8 byte tag located after
/linux/Documentation/arch/m68k/
H A Dkernel-options.rst192 built-in serial port; parameters: 9600bps, 8N1
201 ST-MFP serial port ("Modem1"); parameters: 9600bps, 8N1
203 SCC channel B serial port ("Modem2"); parameters: 9600bps, 8N1
208 The MIDI port; parameters: 31250bps, 8N1
/linux/drivers/soc/renesas/
H A DKconfig467 bool "Renesas RZ/N1 GPIO IRQ multiplexer support" if COMPILE_TEST
/linux/drivers/usb/gadget/udc/
H A DKconfig205 available on RZ/N1 Renesas SoCs.
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_lcn.c2000 u16 N1, N2, N3, N4, N5, N6, N; in wlc_lcnphy_rfseq_tbl_adc_pwrup() local
2001 N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0)) in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2013 N = 2 * (N1 + N2 + N3 + N4 + 2 * (N5 + N6)) + 80; in wlc_lcnphy_rfseq_tbl_adc_pwrup()

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