Searched refs:MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 (Results 1 – 9 of 9) sorted by relevance
17 #define MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0010 0x0054 0x0000 0x5 0x0 macro
22 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059
21 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
338 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x400120b0 /* PSOC_RESET */
442 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x00020
330 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059
749 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x100a0
597 fsl,pins = <MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x400120b0>;
745 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x130b0