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Searched refs:MUX_CLK_AXI_DDR (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dsophgo,sg2042-clkgen.h109 #define MUX_CLK_AXI_DDR 90 macro
/linux/drivers/clk/sophgo/
H A Dclk-sg2042-clkgen.c567 SG2042_MUX(MUX_CLK_AXI_DDR, "clk_mux_axi_ddr", clk_mux_axi_ddr_p,
1030 case MUX_CLK_AXI_DDR: in sg2042_clk_register_muxs()