xref: /linux/include/linux/mfd/mt6323/registers.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2016 Chen Zhong <chen.zhong@mediatek.com>
4  */
5 
6 #ifndef __MFD_MT6323_REGISTERS_H__
7 #define __MFD_MT6323_REGISTERS_H__
8 
9 /* PMIC Registers */
10 #define MT6323_CHR_CON0           0x0000
11 #define MT6323_CHR_CON1           0x0002
12 #define MT6323_CHR_CON2           0x0004
13 #define MT6323_CHR_CON3           0x0006
14 #define MT6323_CHR_CON4           0x0008
15 #define MT6323_CHR_CON5           0x000A
16 #define MT6323_CHR_CON6           0x000C
17 #define MT6323_CHR_CON7           0x000E
18 #define MT6323_CHR_CON8           0x0010
19 #define MT6323_CHR_CON9           0x0012
20 #define MT6323_CHR_CON10          0x0014
21 #define MT6323_CHR_CON11          0x0016
22 #define MT6323_CHR_CON12          0x0018
23 #define MT6323_CHR_CON13          0x001A
24 #define MT6323_CHR_CON14          0x001C
25 #define MT6323_CHR_CON15          0x001E
26 #define MT6323_CHR_CON16          0x0020
27 #define MT6323_CHR_CON17          0x0022
28 #define MT6323_CHR_CON18          0x0024
29 #define MT6323_CHR_CON19          0x0026
30 #define MT6323_CHR_CON20          0x0028
31 #define MT6323_CHR_CON21          0x002A
32 #define MT6323_CHR_CON22          0x002C
33 #define MT6323_CHR_CON23          0x002E
34 #define MT6323_CHR_CON24          0x0030
35 #define MT6323_CHR_CON25          0x0032
36 #define MT6323_CHR_CON26          0x0034
37 #define MT6323_CHR_CON27          0x0036
38 #define MT6323_CHR_CON28          0x0038
39 #define MT6323_CHR_CON29          0x003A
40 #define MT6323_STRUP_CON0         0x003C
41 #define MT6323_STRUP_CON2         0x003E
42 #define MT6323_STRUP_CON3         0x0040
43 #define MT6323_STRUP_CON4         0x0042
44 #define MT6323_STRUP_CON5         0x0044
45 #define MT6323_STRUP_CON6         0x0046
46 #define MT6323_STRUP_CON7         0x0048
47 #define MT6323_STRUP_CON8         0x004A
48 #define MT6323_STRUP_CON9         0x004C
49 #define MT6323_STRUP_CON10        0x004E
50 #define MT6323_STRUP_CON11        0x0050
51 #define MT6323_SPK_CON0           0x0052
52 #define MT6323_SPK_CON1           0x0054
53 #define MT6323_SPK_CON2           0x0056
54 #define MT6323_SPK_CON6           0x005E
55 #define MT6323_SPK_CON7           0x0060
56 #define MT6323_SPK_CON8           0x0062
57 #define MT6323_SPK_CON9           0x0064
58 #define MT6323_SPK_CON10          0x0066
59 #define MT6323_SPK_CON11          0x0068
60 #define MT6323_SPK_CON12          0x006A
61 #define MT6323_CID                0x0100
62 #define MT6323_TOP_CKPDN0         0x0102
63 #define MT6323_TOP_CKPDN0_SET     0x0104
64 #define MT6323_TOP_CKPDN0_CLR     0x0106
65 #define MT6323_TOP_CKPDN1         0x0108
66 #define MT6323_TOP_CKPDN1_SET     0x010A
67 #define MT6323_TOP_CKPDN1_CLR     0x010C
68 #define MT6323_TOP_CKPDN2         0x010E
69 #define MT6323_TOP_CKPDN2_SET     0x0110
70 #define MT6323_TOP_CKPDN2_CLR     0x0112
71 #define MT6323_TOP_RST_CON        0x0114
72 #define MT6323_TOP_RST_CON_SET    0x0116
73 #define MT6323_TOP_RST_CON_CLR    0x0118
74 #define MT6323_TOP_RST_MISC       0x011A
75 #define MT6323_TOP_RST_MISC_SET   0x011C
76 #define MT6323_TOP_RST_MISC_CLR   0x011E
77 #define MT6323_TOP_CKCON0         0x0120
78 #define MT6323_TOP_CKCON0_SET     0x0122
79 #define MT6323_TOP_CKCON0_CLR     0x0124
80 #define MT6323_TOP_CKCON1         0x0126
81 #define MT6323_TOP_CKCON1_SET     0x0128
82 #define MT6323_TOP_CKCON1_CLR     0x012A
83 #define MT6323_TOP_CKTST0         0x012C
84 #define MT6323_TOP_CKTST1         0x012E
85 #define MT6323_TOP_CKTST2         0x0130
86 #define MT6323_TEST_OUT           0x0132
87 #define MT6323_TEST_CON0          0x0134
88 #define MT6323_TEST_CON1          0x0136
89 #define MT6323_EN_STATUS0         0x0138
90 #define MT6323_EN_STATUS1         0x013A
91 #define MT6323_OCSTATUS0          0x013C
92 #define MT6323_OCSTATUS1          0x013E
93 #define MT6323_PGSTATUS           0x0140
94 #define MT6323_CHRSTATUS          0x0142
95 #define MT6323_TDSEL_CON          0x0144
96 #define MT6323_RDSEL_CON          0x0146
97 #define MT6323_SMT_CON0           0x0148
98 #define MT6323_SMT_CON1           0x014A
99 #define MT6323_SMT_CON2           0x014C
100 #define MT6323_SMT_CON3           0x014E
101 #define MT6323_SMT_CON4           0x0150
102 #define MT6323_DRV_CON0           0x0152
103 #define MT6323_DRV_CON1           0x0154
104 #define MT6323_DRV_CON2           0x0156
105 #define MT6323_DRV_CON3           0x0158
106 #define MT6323_DRV_CON4           0x015A
107 #define MT6323_SIMLS1_CON         0x015C
108 #define MT6323_SIMLS2_CON         0x015E
109 #define MT6323_INT_CON0           0x0160
110 #define MT6323_INT_CON0_SET       0x0162
111 #define MT6323_INT_CON0_CLR       0x0164
112 #define MT6323_INT_CON1           0x0166
113 #define MT6323_INT_CON1_SET       0x0168
114 #define MT6323_INT_CON1_CLR       0x016A
115 #define MT6323_INT_MISC_CON       0x016C
116 #define MT6323_INT_MISC_CON_SET   0x016E
117 #define MT6323_INT_MISC_CON_CLR   0x0170
118 #define MT6323_INT_STATUS0        0x0172
119 #define MT6323_INT_STATUS1        0x0174
120 #define MT6323_OC_GEAR_0          0x0176
121 #define MT6323_OC_GEAR_1          0x0178
122 #define MT6323_OC_GEAR_2          0x017A
123 #define MT6323_OC_CTL_VPROC       0x017C
124 #define MT6323_OC_CTL_VSYS        0x017E
125 #define MT6323_OC_CTL_VPA         0x0180
126 #define MT6323_FQMTR_CON0         0x0182
127 #define MT6323_FQMTR_CON1         0x0184
128 #define MT6323_FQMTR_CON2         0x0186
129 #define MT6323_RG_SPI_CON         0x0188
130 #define MT6323_DEW_DIO_EN         0x018A
131 #define MT6323_DEW_READ_TEST      0x018C
132 #define MT6323_DEW_WRITE_TEST     0x018E
133 #define MT6323_DEW_CRC_SWRST      0x0190
134 #define MT6323_DEW_CRC_EN         0x0192
135 #define MT6323_DEW_CRC_VAL        0x0194
136 #define MT6323_DEW_DBG_MON_SEL    0x0196
137 #define MT6323_DEW_CIPHER_KEY_SEL 0x0198
138 #define MT6323_DEW_CIPHER_IV_SEL  0x019A
139 #define MT6323_DEW_CIPHER_EN      0x019C
140 #define MT6323_DEW_CIPHER_RDY     0x019E
141 #define MT6323_DEW_CIPHER_MODE    0x01A0
142 #define MT6323_DEW_CIPHER_SWRST   0x01A2
143 #define MT6323_DEW_RDDMY_NO       0x01A4
144 #define MT6323_DEW_RDATA_DLY_SEL  0x01A6
145 #define MT6323_BUCK_CON0          0x0200
146 #define MT6323_BUCK_CON1          0x0202
147 #define MT6323_BUCK_CON2          0x0204
148 #define MT6323_BUCK_CON3          0x0206
149 #define MT6323_BUCK_CON4          0x0208
150 #define MT6323_BUCK_CON5          0x020A
151 #define MT6323_VPROC_CON0         0x020C
152 #define MT6323_VPROC_CON1         0x020E
153 #define MT6323_VPROC_CON2         0x0210
154 #define MT6323_VPROC_CON3         0x0212
155 #define MT6323_VPROC_CON4         0x0214
156 #define MT6323_VPROC_CON5         0x0216
157 #define MT6323_VPROC_CON7         0x021A
158 #define MT6323_VPROC_CON8         0x021C
159 #define MT6323_VPROC_CON9         0x021E
160 #define MT6323_VPROC_CON10        0x0220
161 #define MT6323_VPROC_CON11        0x0222
162 #define MT6323_VPROC_CON12        0x0224
163 #define MT6323_VPROC_CON13        0x0226
164 #define MT6323_VPROC_CON14        0x0228
165 #define MT6323_VPROC_CON15        0x022A
166 #define MT6323_VPROC_CON18        0x0230
167 #define MT6323_VSYS_CON0          0x0232
168 #define MT6323_VSYS_CON1          0x0234
169 #define MT6323_VSYS_CON2          0x0236
170 #define MT6323_VSYS_CON3          0x0238
171 #define MT6323_VSYS_CON4          0x023A
172 #define MT6323_VSYS_CON5          0x023C
173 #define MT6323_VSYS_CON7          0x0240
174 #define MT6323_VSYS_CON8          0x0242
175 #define MT6323_VSYS_CON9          0x0244
176 #define MT6323_VSYS_CON10         0x0246
177 #define MT6323_VSYS_CON11         0x0248
178 #define MT6323_VSYS_CON12         0x024A
179 #define MT6323_VSYS_CON13         0x024C
180 #define MT6323_VSYS_CON14         0x024E
181 #define MT6323_VSYS_CON15         0x0250
182 #define MT6323_VSYS_CON18         0x0256
183 #define MT6323_VPA_CON0           0x0300
184 #define MT6323_VPA_CON1           0x0302
185 #define MT6323_VPA_CON2           0x0304
186 #define MT6323_VPA_CON3           0x0306
187 #define MT6323_VPA_CON4           0x0308
188 #define MT6323_VPA_CON5           0x030A
189 #define MT6323_VPA_CON7           0x030E
190 #define MT6323_VPA_CON8           0x0310
191 #define MT6323_VPA_CON9           0x0312
192 #define MT6323_VPA_CON10          0x0314
193 #define MT6323_VPA_CON11          0x0316
194 #define MT6323_VPA_CON12          0x0318
195 #define MT6323_VPA_CON14          0x031C
196 #define MT6323_VPA_CON16          0x0320
197 #define MT6323_VPA_CON17          0x0322
198 #define MT6323_VPA_CON18          0x0324
199 #define MT6323_VPA_CON19          0x0326
200 #define MT6323_VPA_CON20          0x0328
201 #define MT6323_BUCK_K_CON0        0x032A
202 #define MT6323_BUCK_K_CON1        0x032C
203 #define MT6323_BUCK_K_CON2        0x032E
204 #define MT6323_ISINK0_CON0        0x0330
205 #define MT6323_ISINK0_CON1        0x0332
206 #define MT6323_ISINK0_CON2        0x0334
207 #define MT6323_ISINK0_CON3        0x0336
208 #define MT6323_ISINK1_CON0        0x0338
209 #define MT6323_ISINK1_CON1        0x033A
210 #define MT6323_ISINK1_CON2        0x033C
211 #define MT6323_ISINK1_CON3        0x033E
212 #define MT6323_ISINK2_CON0        0x0340
213 #define MT6323_ISINK2_CON1        0x0342
214 #define MT6323_ISINK2_CON2        0x0344
215 #define MT6323_ISINK2_CON3        0x0346
216 #define MT6323_ISINK3_CON0        0x0348
217 #define MT6323_ISINK3_CON1        0x034A
218 #define MT6323_ISINK3_CON2        0x034C
219 #define MT6323_ISINK3_CON3        0x034E
220 #define MT6323_ISINK_ANA0         0x0350
221 #define MT6323_ISINK_ANA1         0x0352
222 #define MT6323_ISINK_PHASE_DLY    0x0354
223 #define MT6323_ISINK_EN_CTRL      0x0356
224 #define MT6323_ANALDO_CON0        0x0400
225 #define MT6323_ANALDO_CON1        0x0402
226 #define MT6323_ANALDO_CON2        0x0404
227 #define MT6323_ANALDO_CON3        0x0406
228 #define MT6323_ANALDO_CON4        0x0408
229 #define MT6323_ANALDO_CON5        0x040A
230 #define MT6323_ANALDO_CON6        0x040C
231 #define MT6323_ANALDO_CON7        0x040E
232 #define MT6323_ANALDO_CON8        0x0410
233 #define MT6323_ANALDO_CON10       0x0412
234 #define MT6323_ANALDO_CON15       0x0414
235 #define MT6323_ANALDO_CON16       0x0416
236 #define MT6323_ANALDO_CON17       0x0418
237 #define MT6323_ANALDO_CON18       0x041A
238 #define MT6323_ANALDO_CON19       0x041C
239 #define MT6323_ANALDO_CON20       0x041E
240 #define MT6323_ANALDO_CON21       0x0420
241 #define MT6323_DIGLDO_CON0        0x0500
242 #define MT6323_DIGLDO_CON2        0x0502
243 #define MT6323_DIGLDO_CON3        0x0504
244 #define MT6323_DIGLDO_CON5        0x0506
245 #define MT6323_DIGLDO_CON6        0x0508
246 #define MT6323_DIGLDO_CON7        0x050A
247 #define MT6323_DIGLDO_CON8        0x050C
248 #define MT6323_DIGLDO_CON9        0x050E
249 #define MT6323_DIGLDO_CON10       0x0510
250 #define MT6323_DIGLDO_CON11       0x0512
251 #define MT6323_DIGLDO_CON12       0x0514
252 #define MT6323_DIGLDO_CON13       0x0516
253 #define MT6323_DIGLDO_CON14       0x0518
254 #define MT6323_DIGLDO_CON15       0x051A
255 #define MT6323_DIGLDO_CON16       0x051C
256 #define MT6323_DIGLDO_CON17       0x051E
257 #define MT6323_DIGLDO_CON18       0x0520
258 #define MT6323_DIGLDO_CON19       0x0522
259 #define MT6323_DIGLDO_CON20       0x0524
260 #define MT6323_DIGLDO_CON21       0x0526
261 #define MT6323_DIGLDO_CON23       0x0528
262 #define MT6323_DIGLDO_CON24       0x052A
263 #define MT6323_DIGLDO_CON26       0x052C
264 #define MT6323_DIGLDO_CON27       0x052E
265 #define MT6323_DIGLDO_CON28       0x0530
266 #define MT6323_DIGLDO_CON29       0x0532
267 #define MT6323_DIGLDO_CON30       0x0534
268 #define MT6323_DIGLDO_CON31       0x0536
269 #define MT6323_DIGLDO_CON32       0x0538
270 #define MT6323_DIGLDO_CON33       0x053A
271 #define MT6323_DIGLDO_CON34       0x053C
272 #define MT6323_DIGLDO_CON35       0x053E
273 #define MT6323_DIGLDO_CON36       0x0540
274 #define MT6323_DIGLDO_CON39       0x0542
275 #define MT6323_DIGLDO_CON40       0x0544
276 #define MT6323_DIGLDO_CON41       0x0546
277 #define MT6323_DIGLDO_CON42       0x0548
278 #define MT6323_DIGLDO_CON43       0x054A
279 #define MT6323_DIGLDO_CON44       0x054C
280 #define MT6323_DIGLDO_CON45       0x054E
281 #define MT6323_DIGLDO_CON46       0x0550
282 #define MT6323_DIGLDO_CON47       0x0552
283 #define MT6323_DIGLDO_CON48       0x0554
284 #define MT6323_DIGLDO_CON49       0x0556
285 #define MT6323_DIGLDO_CON50       0x0558
286 #define MT6323_DIGLDO_CON51       0x055A
287 #define MT6323_DIGLDO_CON52       0x055C
288 #define MT6323_DIGLDO_CON53       0x055E
289 #define MT6323_DIGLDO_CON54       0x0560
290 #define MT6323_EFUSE_CON0         0x0600
291 #define MT6323_EFUSE_CON1         0x0602
292 #define MT6323_EFUSE_CON2         0x0604
293 #define MT6323_EFUSE_CON3         0x0606
294 #define MT6323_EFUSE_CON4         0x0608
295 #define MT6323_EFUSE_CON5         0x060A
296 #define MT6323_EFUSE_CON6         0x060C
297 #define MT6323_EFUSE_VAL_0_15     0x060E
298 #define MT6323_EFUSE_VAL_16_31    0x0610
299 #define MT6323_EFUSE_VAL_32_47    0x0612
300 #define MT6323_EFUSE_VAL_48_63    0x0614
301 #define MT6323_EFUSE_VAL_64_79    0x0616
302 #define MT6323_EFUSE_VAL_80_95    0x0618
303 #define MT6323_EFUSE_VAL_96_111   0x061A
304 #define MT6323_EFUSE_VAL_112_127  0x061C
305 #define MT6323_EFUSE_VAL_128_143  0x061E
306 #define MT6323_EFUSE_VAL_144_159  0x0620
307 #define MT6323_EFUSE_VAL_160_175  0x0622
308 #define MT6323_EFUSE_VAL_176_191  0x0624
309 #define MT6323_EFUSE_DOUT_0_15    0x0626
310 #define MT6323_EFUSE_DOUT_16_31   0x0628
311 #define MT6323_EFUSE_DOUT_32_47   0x062A
312 #define MT6323_EFUSE_DOUT_48_63   0x062C
313 #define MT6323_EFUSE_DOUT_64_79   0x062E
314 #define MT6323_EFUSE_DOUT_80_95   0x0630
315 #define MT6323_EFUSE_DOUT_96_111  0x0632
316 #define MT6323_EFUSE_DOUT_112_127 0x0634
317 #define MT6323_EFUSE_DOUT_128_143 0x0636
318 #define MT6323_EFUSE_DOUT_144_159 0x0638
319 #define MT6323_EFUSE_DOUT_160_175 0x063A
320 #define MT6323_EFUSE_DOUT_176_191 0x063C
321 #define MT6323_EFUSE_CON7         0x063E
322 #define MT6323_EFUSE_CON8         0x0640
323 #define MT6323_EFUSE_CON9         0x0642
324 #define MT6323_RTC_MIX_CON0       0x0644
325 #define MT6323_RTC_MIX_CON1       0x0646
326 #define MT6323_AUDTOP_CON0        0x0700
327 #define MT6323_AUDTOP_CON1        0x0702
328 #define MT6323_AUDTOP_CON2        0x0704
329 #define MT6323_AUDTOP_CON3        0x0706
330 #define MT6323_AUDTOP_CON4        0x0708
331 #define MT6323_AUDTOP_CON5        0x070A
332 #define MT6323_AUDTOP_CON6        0x070C
333 #define MT6323_AUDTOP_CON7        0x070E
334 #define MT6323_AUDTOP_CON8        0x0710
335 #define MT6323_AUDTOP_CON9        0x0712
336 #define MT6323_AUXADC_ADC0        0x0714
337 #define MT6323_AUXADC_ADC1        0x0716
338 #define MT6323_AUXADC_ADC2        0x0718
339 #define MT6323_AUXADC_ADC3        0x071A
340 #define MT6323_AUXADC_ADC4        0x071C
341 #define MT6323_AUXADC_ADC5        0x071E
342 #define MT6323_AUXADC_ADC6        0x0720
343 #define MT6323_AUXADC_ADC7        0x0722
344 #define MT6323_AUXADC_ADC8        0x0724
345 #define MT6323_AUXADC_ADC9        0x0726
346 #define MT6323_AUXADC_ADC10       0x0728
347 #define MT6323_AUXADC_ADC11       0x072A
348 #define MT6323_AUXADC_ADC12       0x072C
349 #define MT6323_AUXADC_ADC13       0x072E
350 #define MT6323_AUXADC_ADC14       0x0730
351 #define MT6323_AUXADC_ADC15       0x0732
352 #define MT6323_AUXADC_ADC16       0x0734
353 #define MT6323_AUXADC_ADC17       0x0736
354 #define MT6323_AUXADC_ADC18       0x0738
355 #define MT6323_AUXADC_ADC19       0x073A
356 #define MT6323_AUXADC_ADC20       0x073C
357 #define MT6323_AUXADC_RSV1        0x073E
358 #define MT6323_AUXADC_RSV2        0x0740
359 #define MT6323_AUXADC_CON0        0x0742
360 #define MT6323_AUXADC_CON1        0x0744
361 #define MT6323_AUXADC_CON2        0x0746
362 #define MT6323_AUXADC_CON3        0x0748
363 #define MT6323_AUXADC_CON4        0x074A
364 #define MT6323_AUXADC_CON5        0x074C
365 #define MT6323_AUXADC_CON6        0x074E
366 #define MT6323_AUXADC_CON7        0x0750
367 #define MT6323_AUXADC_CON8        0x0752
368 #define MT6323_AUXADC_CON9        0x0754
369 #define MT6323_AUXADC_CON10       0x0756
370 #define MT6323_AUXADC_CON11       0x0758
371 #define MT6323_AUXADC_CON12       0x075A
372 #define MT6323_AUXADC_CON13       0x075C
373 #define MT6323_AUXADC_CON14       0x075E
374 #define MT6323_AUXADC_CON15       0x0760
375 #define MT6323_AUXADC_CON16       0x0762
376 #define MT6323_AUXADC_CON17       0x0764
377 #define MT6323_AUXADC_CON18       0x0766
378 #define MT6323_AUXADC_CON19       0x0768
379 #define MT6323_AUXADC_CON20       0x076A
380 #define MT6323_AUXADC_CON21       0x076C
381 #define MT6323_AUXADC_CON22       0x076E
382 #define MT6323_AUXADC_CON23       0x0770
383 #define MT6323_AUXADC_CON24       0x0772
384 #define MT6323_AUXADC_CON25       0x0774
385 #define MT6323_AUXADC_CON26       0x0776
386 #define MT6323_AUXADC_CON27       0x0778
387 #define MT6323_ACCDET_CON0        0x077A
388 #define MT6323_ACCDET_CON1        0x077C
389 #define MT6323_ACCDET_CON2        0x077E
390 #define MT6323_ACCDET_CON3        0x0780
391 #define MT6323_ACCDET_CON4        0x0782
392 #define MT6323_ACCDET_CON5        0x0784
393 #define MT6323_ACCDET_CON6        0x0786
394 #define MT6323_ACCDET_CON7        0x0788
395 #define MT6323_ACCDET_CON8        0x078A
396 #define MT6323_ACCDET_CON9        0x078C
397 #define MT6323_ACCDET_CON10       0x078E
398 #define MT6323_ACCDET_CON11       0x0790
399 #define MT6323_ACCDET_CON12       0x0792
400 #define MT6323_ACCDET_CON13       0x0794
401 #define MT6323_ACCDET_CON14       0x0796
402 #define MT6323_ACCDET_CON15       0x0798
403 #define MT6323_ACCDET_CON16       0x079A
404 
405 #endif /* __MFD_MT6323_REGISTERS_H__ */
406