Searched refs:MP1_Public (Results 1 – 12 of 12) sorted by relevance
34 #define MP1_Public 0x03b00000 macro44 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu9_is_smc_ram_running()
41 #define MP1_Public 0x03b00000 macro54 mp1_fw_flags = RREG32_PCIE(MP1_Public | in vega20_is_smc_ram_running()
43 #define MP1_Public 0x03b00000 macro
139 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v14_0_load_microcode() 141 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v14_0_load_microcode() 146 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v14_0_load_microcode() 149 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v14_0_load_microcode() 219 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v14_0_check_fw_status() 222 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v14_0_check_fw_status()
37 #define MP1_Public 0x03b00000 macro
165 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v13_0_load_microcode()167 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v13_0_load_microcode()171 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_load_microcode()245 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_check_fw_status()249 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_check_fw_status()2447 WREG32_PCIE(MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0xffffffff), 0); in smu_v13_0_disable_pmfw_state()2449 ret = RREG32_PCIE(MP1_Public | in smu_v13_0_disable_pmfw_state()
39 #undef MP1_Public
54 #undef MP1_Public58 #define MP1_Public 0x03b00000 macro1184 RREG32_PCIE(MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0xffffffff)); in smu_v13_0_6_check_fw_status()
411 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_7_check_fw_status()
160 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v11_0_load_microcode() 162 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v11_0_load_microcode() 166 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v11_0_load_microcode() 185 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v11_0_check_fw_status()
2949 reg = RREG32_PCIE(MP1_Public | smnMP1_PMI_3_START); in sienna_cichlid_stb_init()2959 reg = RREG32_PCIE(MP1_Public | smnMP1_PMI_3_FIFO); in sienna_cichlid_stb_init()3036 *p++ = cpu_to_le32(RREG32_PCIE(MP1_Public | smnMP1_PMI_3)); in sienna_cichlid_stb_get_data_direct()
132 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v15_0_load_microcode()199 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v15_0_check_fw_status()