| /linux/drivers/net/phy/ |
| H A D | phy-c45.c | 241 ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_L, in genphy_c45_baset1_an_config_aneg() 250 ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_M, in genphy_c45_baset1_an_config_aneg() 288 ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE, in genphy_c45_an_config_aneg() 299 ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, in genphy_c45_an_config_aneg() 328 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, in genphy_c45_an_disable_aneg() 348 return phy_set_bits_mmd(phydev, MDIO_MMD_AN, reg, in genphy_c45_restart_aneg() 372 ret = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_check_and_restart_aneg() 444 return phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, in genphy_c45_an_setup_master_slave() 466 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL); in genphy_c45_read_master_slave() 482 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in genphy_c45_read_master_slave() [all …]
|
| H A D | marvell-88q2xxx.c | 141 { MDIO_MMD_AN, 0x8032, 0x0064 }, 142 { MDIO_MMD_AN, 0x8031, 0x0a01 }, 143 { MDIO_MMD_AN, 0x8031, 0x0c01 }, 149 { MDIO_MMD_AN, MDIO_AN_T1_CTRL, 0x0 }, 167 { MDIO_MMD_AN, 0x8032, 0x2020 }, 168 { MDIO_MMD_AN, 0x8031, 0xa28 }, 169 { MDIO_MMD_AN, 0x8031, 0xc28 }, 179 { MDIO_MMD_AN, MDIO_AN_T1_CTRL, 0x0 }, 186 { MDIO_MMD_AN, MDIO_AN_T1_CTRL, 0x0 }, 209 { MDIO_MMD_AN, 0x8032, 0x2020 }, [all …]
|
| H A D | bcm-phy-lib.c | 377 val = phy_read_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL); in bcm_phy_set_eee() 386 phy_write_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL, (u32)val); in bcm_phy_set_eee() 389 val = phy_read_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV); in bcm_phy_set_eee() 405 phy_write_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV, (u32)val); in bcm_phy_set_eee() 512 { "phy_lpi_count", MDIO_MMD_AN, BRCM_CL45VEN_EEE_LPI_CNT, 0, 16 },
|
| H A D | as21xxx.c | 643 *bmcr = phy_read_mmd(phydev, MDIO_MMD_AN, in as21xxx_read_link() 656 status = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in as21xxx_read_link() 672 lpagb = phy_read_mmd(phydev, MDIO_MMD_AN, in as21xxx_read_c22_lpa() 678 int adv = phy_read_mmd(phydev, MDIO_MMD_AN, in as21xxx_read_c22_lpa()
|
| H A D | bcm7xxx.c | 625 return devnum == MDIO_MMD_AN || devnum == MDIO_MMD_PCS; in bcm7xxx_28nm_ephy_dev_valid()
|
| /linux/drivers/net/ethernet/amd/xgbe/ |
| H A D | xgbe-mdio.c | 75 XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0); in xgbe_an73_clear_interrupts() 80 XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, 0); in xgbe_an73_disable_interrupts() 85 XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, XGBE_AN_CL73_INT_MASK); in xgbe_an73_enable_interrupts() 307 reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1); in xgbe_an73_set() 316 XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_CTRL1, reg); in xgbe_an73_set() 393 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2); in xgbe_an73_tx_training() 394 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2); in xgbe_an73_tx_training() 432 XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_XNP + 2, 0); in xgbe_an73_tx_xnp() 433 XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_XNP + 1, 0); in xgbe_an73_tx_xnp() 434 XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_XNP, msg); in xgbe_an73_tx_xnp() [all …]
|
| H A D | xgbe-phy-v2.c | 1584 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1); in xgbe_phy_an73_redrv_outcome() 1585 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1); in xgbe_phy_an73_redrv_outcome() 1647 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2); in xgbe_phy_an73_redrv_outcome() 1648 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2); in xgbe_phy_an73_redrv_outcome() 1665 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE); in xgbe_phy_an73_outcome() 1666 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA); in xgbe_phy_an73_outcome() 1689 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1); in xgbe_phy_an73_outcome() 1690 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1); in xgbe_phy_an73_outcome() 1705 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2); in xgbe_phy_an73_outcome() 1706 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2); in xgbe_phy_an73_outcome()
|
| /linux/drivers/net/phy/qcom/ |
| H A D | qcom-phy-lib.c | 651 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_reg_hw_control_enable() 660 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca808x_led_reg_hw_control_status() 668 return phy_modify_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_reg_brightness_set() 682 ret = phy_modify_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_LED_GLOBAL, in qca808x_led_reg_blink_set() 689 ret = phy_modify_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_reg_blink_set() 710 return phy_set_bits_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_CTRL, in qcom_phy_counter_config() 723 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_PKT_15_0); in qcom_phy_update_stats() 729 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_PKT_31_16); in qcom_phy_update_stats() 737 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_ERR_PKT); in qcom_phy_update_stats() 744 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_TX_PKT_15_0); in qcom_phy_update_stats() [all …]
|
| H A D | qca808x.c | 108 phy_write_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_TOP_OPTION1, in qca808x_phy_fast_retrain_config() 164 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE); in qca808x_is_1g_only() 205 ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, in qca808x_config_init() 262 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in qca808x_read_status() 405 ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, in qca808x_config_aneg() 497 return phy_modify_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_hw_control_set() 528 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca808x_led_hw_control_get() 558 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_hw_control_reset() 624 return phy_modify_mmd(phydev, MDIO_MMD_AN, in qca808x_led_polarity_set()
|
| H A D | qca807x.c | 234 return phy_modify_mmd(phydev, MDIO_MMD_AN, reg, mask, in qca807x_led_hw_control_set() 266 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca807x_led_hw_control_get() 285 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca807x_led_hw_control_get() 327 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, mask); in qca807x_led_hw_control_reset() 376 val = phy_read_mmd(priv->phy, MDIO_MMD_AN, reg); in qca807x_gpio_get() 389 val = phy_read_mmd(priv->phy, MDIO_MMD_AN, reg); in qca807x_gpio_set() 397 return phy_write_mmd(priv->phy, MDIO_MMD_AN, reg, val); in qca807x_gpio_set() 665 MDIO_MMD_AN, in qca807x_configure_serdes() 761 control_dac = phy_read_mmd(phydev, MDIO_MMD_AN, in qca807x_config_init() 770 return phy_write_mmd(phydev, MDIO_MMD_AN, in qca807x_config_init()
|
| H A D | at803x.c | 451 return phy_modify_mmd(phydev, MDIO_MMD_AN, AT803X_MMD7_CLK25M, in at803x_clk_out_config()
|
| /linux/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | aq100x.c | 134 MDIO_MMD_AN, MDIO_CTRL1, in aq100x_autoneg_enable() 147 MDIO_MMD_AN, MDIO_CTRL1, in aq100x_autoneg_restart() 162 err = t3_mdio_change_bits(phy, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, in aq100x_advertise() 173 err = t3_mdio_change_bits(phy, MDIO_MMD_AN, AQ_1G_CTRL, in aq100x_advertise() 188 err = t3_mdio_change_bits(phy, MDIO_MMD_AN, MDIO_AN_ADVERTISE, in aq100x_advertise() 223 err = t3_mdio_read(phy, MDIO_MMD_AN, AQ_ANEG_STAT, &v); in aq100x_get_link_status()
|
| /linux/drivers/net/ethernet/sfc/falcon/ |
| H A D | mdio_10g.c | 55 if (mmd != MDIO_MMD_AN) { in ef4_mdio_check_mmd() 285 ef4_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg); in ef4_mdio_an_reconfigure() 291 reg = ef4_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1); in ef4_mdio_an_reconfigure() 293 ef4_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg); in ef4_mdio_an_reconfigure() 307 ef4_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA)); in ef4_mdio_get_pause()
|
| H A D | tenxpress.c | 263 reg = ef4_mdio_read(efx, MDIO_MMD_AN, MDIO_STAT1); in sfx7101_check_bad_lp() 446 reg = ef4_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL); in tenxpress_get_link_ksettings() 449 reg = ef4_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in tenxpress_get_link_ksettings() 473 ef4_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, in sfx7101_set_npage_adv()
|
| /linux/drivers/net/pcs/ |
| H A D | pcs-xpcs.c | 425 ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV3, adv); in _xpcs_config_aneg_c73() 438 ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV2, adv); in _xpcs_config_aneg_c73() 449 return xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV1, adv); in _xpcs_config_aneg_c73() 461 return xpcs_modify(xpcs, MDIO_MMD_AN, MDIO_CTRL1, in xpcs_config_aneg_c73() 473 ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_AN_LPA); in xpcs_aneg_done_c73() 504 ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_AN_LPA + i); in xpcs_read_lpa_c73() 1027 an_stat1 = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_STAT1); in xpcs_get_state_c73()
|
| /linux/include/uapi/linux/ |
| H A D | mdio.h | 25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */ macro 183 #define MDIO_DEVS_AN MDIO_DEVS_PRESENT(MDIO_MMD_AN)
|
| /linux/rust/kernel/net/phy/ |
| H A D | reg.rs | 157 pub const AN: Self = Mmd(uapi::MDIO_MMD_AN as u8);
|
| /linux/drivers/net/usb/ |
| H A D | ax88179_178a.c | 684 MDIO_MMD_AN); in ax88179_ethtool_get_eee() 691 MDIO_MMD_AN); in ax88179_ethtool_get_eee() 705 MDIO_MMD_AN, tmp16); in ax88179_ethtool_set_eee() 735 MDIO_MMD_AN); in ax88179_chk_eee() 743 MDIO_MMD_AN); in ax88179_chk_eee()
|
| /linux/drivers/net/phy/realtek/ |
| H A D | realtek_main.c | 1753 else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) in rtlgen_read_mmd() 1755 else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) in rtlgen_read_mmd() 1770 else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) in rtlgen_write_mmd() 1787 else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) in rtl822x_read_mmd() 1789 else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2) in rtl822x_read_mmd() 1803 if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) in rtl822x_write_mmd()
|
| /linux/drivers/net/ethernet/intel/ixgbe/ |
| H A D | ixgbe_82598.c | 471 hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN, &an_reg); in ixgbe_validate_link_ready()
|
| /linux/drivers/net/ethernet/ |
| H A D | oa_tc6.c | 488 case MDIO_MMD_AN: in oa_tc6_get_phy_c45_mms()
|
| /linux/drivers/net/dsa/ |
| H A D | mt7530.c | 2835 mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV, in mt7531_setup()
|
| /linux/drivers/net/ethernet/broadcom/ |
| H A D | tg3.c | 2353 if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, TG3_CL45_D7_EEERES_STAT, &val)) in tg3_eee_pull_config() 2364 if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE, &val)) in tg3_eee_pull_config() 2369 if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, &val)) in tg3_eee_pull_config() 4364 err = tg3_phy_cl45_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val); in tg3_phy_autoneg_cfg()
|