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Searched refs:MCFINT_VECBASE (Results 1 – 7 of 7) sorted by relevance

/linux/arch/m68k/include/asm/
H A Dm520xsim.h50 #define MCFINT_VECBASE 64 macro
61 #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
62 #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
63 #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
65 #define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
66 #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
67 #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
69 #define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
70 #define MCF_IRQ_PIT1 (MCFINT_VECBASE + MCFINT_PIT1)
72 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0)
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H A Dm54xxsim.h19 #define MCFINT_VECBASE 64 macro
47 #define MCF_IRQ_TIMER (MCFINT_VECBASE + 54) /* Slice Timer 0 */
48 #define MCF_IRQ_PROFILER (MCFINT_VECBASE + 53) /* Slice Timer 1 */
49 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + 40)
50 #define MCF_IRQ_UART0 (MCFINT_VECBASE + 35)
51 #define MCF_IRQ_UART1 (MCFINT_VECBASE + 34)
52 #define MCF_IRQ_UART2 (MCFINT_VECBASE + 33)
53 #define MCF_IRQ_UART3 (MCFINT_VECBASE + 32)
72 #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
H A Dm523xsim.h37 #define MCFINT_VECBASE 64 /* Vector base number */ macro
48 #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
49 #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
50 #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
52 #define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
53 #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
54 #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
56 #define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
57 #define MCF_IRQ_PIT1 (MCFINT_VECBASE + MCFINT_PIT1)
58 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0)
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H A Dm528xsim.h37 #define MCFINT_VECBASE 64 /* Vector base number */ macro
48 #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
49 #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
50 #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
52 #define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
53 #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
54 #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
56 #define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
57 #define MCF_IRQ_PIT1 (MCFINT_VECBASE + MCFINT_PIT1)
58 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0)
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H A Dm527xsim.h37 #define MCFINT_VECBASE 64 /* Vector base number */ macro
53 #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
54 #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
55 #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
57 #define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
58 #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
59 #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
64 #define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
65 #define MCF_IRQ_PIT1 (MCFINT_VECBASE + MCFINT_PIT1)
66 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0)
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H A Dm53xxsim.h19 #define MCFINT_VECBASE 64 macro
29 #define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
30 #define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
31 #define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
33 #define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
34 #define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
35 #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
37 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0)
38 #define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
1104 #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
H A Dm5272sim.h98 #define MCFINT_VECBASE 64 /* Base of interrupts */ macro