1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * max6639.c - Support for Maxim MAX6639
4 *
5 * 2-Channel Temperature Monitor with Dual PWM Fan-Speed Controller
6 *
7 * Copyright (C) 2010, 2011 Roland Stigge <stigge@antcom.de>
8 *
9 * based on the initial MAX6639 support from semptian.net
10 * by He Changqing <hechangqing@semptian.com>
11 */
12
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/slab.h>
16 #include <linux/jiffies.h>
17 #include <linux/i2c.h>
18 #include <linux/hwmon.h>
19 #include <linux/hwmon-sysfs.h>
20 #include <linux/err.h>
21 #include <linux/mutex.h>
22 #include <linux/platform_data/max6639.h>
23 #include <linux/regmap.h>
24 #include <linux/util_macros.h>
25
26 /* Addresses to scan */
27 static const unsigned short normal_i2c[] = { 0x2c, 0x2e, 0x2f, I2C_CLIENT_END };
28
29 /* The MAX6639 registers, valid channel numbers: 0, 1 */
30 #define MAX6639_REG_TEMP(ch) (0x00 + (ch))
31 #define MAX6639_REG_STATUS 0x02
32 #define MAX6639_REG_OUTPUT_MASK 0x03
33 #define MAX6639_REG_GCONFIG 0x04
34 #define MAX6639_REG_TEMP_EXT(ch) (0x05 + (ch))
35 #define MAX6639_REG_ALERT_LIMIT(ch) (0x08 + (ch))
36 #define MAX6639_REG_OT_LIMIT(ch) (0x0A + (ch))
37 #define MAX6639_REG_THERM_LIMIT(ch) (0x0C + (ch))
38 #define MAX6639_REG_FAN_CONFIG1(ch) (0x10 + (ch) * 4)
39 #define MAX6639_REG_FAN_CONFIG2a(ch) (0x11 + (ch) * 4)
40 #define MAX6639_REG_FAN_CONFIG2b(ch) (0x12 + (ch) * 4)
41 #define MAX6639_REG_FAN_CONFIG3(ch) (0x13 + (ch) * 4)
42 #define MAX6639_REG_FAN_CNT(ch) (0x20 + (ch))
43 #define MAX6639_REG_TARGET_CNT(ch) (0x22 + (ch))
44 #define MAX6639_REG_FAN_PPR(ch) (0x24 + (ch))
45 #define MAX6639_REG_TARGTDUTY(ch) (0x26 + (ch))
46 #define MAX6639_REG_FAN_START_TEMP(ch) (0x28 + (ch))
47 #define MAX6639_REG_DEVID 0x3D
48 #define MAX6639_REG_MANUID 0x3E
49 #define MAX6639_REG_DEVREV 0x3F
50
51 /* Register bits */
52 #define MAX6639_GCONFIG_STANDBY 0x80
53 #define MAX6639_GCONFIG_POR 0x40
54 #define MAX6639_GCONFIG_DISABLE_TIMEOUT 0x20
55 #define MAX6639_GCONFIG_CH2_LOCAL 0x10
56 #define MAX6639_GCONFIG_PWM_FREQ_HI 0x08
57
58 #define MAX6639_FAN_CONFIG1_PWM 0x80
59 #define MAX6639_FAN_CONFIG3_FREQ_MASK 0x03
60 #define MAX6639_FAN_CONFIG3_THERM_FULL_SPEED 0x40
61
62 #define MAX6639_NUM_CHANNELS 2
63
64 static const int rpm_ranges[] = { 2000, 4000, 8000, 16000 };
65
66 /* Supported PWM frequency */
67 static const unsigned int freq_table[] = { 20, 33, 50, 100, 5000, 8333, 12500,
68 25000 };
69
70 #define FAN_FROM_REG(val, rpm_range) ((val) == 0 || (val) == 255 ? \
71 0 : (rpm_ranges[rpm_range] * 30) / (val))
72 #define TEMP_LIMIT_TO_REG(val) clamp_val((val) / 1000, 0, 255)
73
74 /*
75 * Client data (each client gets its own)
76 */
77 struct max6639_data {
78 struct regmap *regmap;
79 struct mutex update_lock;
80
81 /* Register values initialized only once */
82 u8 ppr[MAX6639_NUM_CHANNELS]; /* Pulses per rotation 0..3 for 1..4 ppr */
83 u8 rpm_range[MAX6639_NUM_CHANNELS]; /* Index in above rpm_ranges table */
84
85 /* Optional regulator for FAN supply */
86 struct regulator *reg;
87 };
88
max6639_temp_read_input(struct device * dev,int channel,long * temp)89 static int max6639_temp_read_input(struct device *dev, int channel, long *temp)
90 {
91 u32 regs[2] = { MAX6639_REG_TEMP_EXT(channel), MAX6639_REG_TEMP(channel) };
92 struct max6639_data *data = dev_get_drvdata(dev);
93 u8 regvals[2];
94 int res;
95
96 res = regmap_multi_reg_read(data->regmap, regs, regvals, 2);
97 if (res < 0)
98 return res;
99
100 *temp = ((regvals[0] >> 5) | (regvals[1] << 3)) * 125;
101
102 return 0;
103 }
104
max6639_temp_read_fault(struct device * dev,int channel,long * fault)105 static int max6639_temp_read_fault(struct device *dev, int channel, long *fault)
106 {
107 struct max6639_data *data = dev_get_drvdata(dev);
108 unsigned int val;
109 int res;
110
111 res = regmap_read(data->regmap, MAX6639_REG_TEMP_EXT(channel), &val);
112 if (res < 0)
113 return res;
114
115 *fault = val & 1;
116
117 return 0;
118 }
119
max6639_temp_read_max(struct device * dev,int channel,long * max)120 static int max6639_temp_read_max(struct device *dev, int channel, long *max)
121 {
122 struct max6639_data *data = dev_get_drvdata(dev);
123 unsigned int val;
124 int res;
125
126 res = regmap_read(data->regmap, MAX6639_REG_THERM_LIMIT(channel), &val);
127 if (res < 0)
128 return res;
129
130 *max = (long)val * 1000;
131
132 return 0;
133 }
134
max6639_temp_read_crit(struct device * dev,int channel,long * crit)135 static int max6639_temp_read_crit(struct device *dev, int channel, long *crit)
136 {
137 struct max6639_data *data = dev_get_drvdata(dev);
138 unsigned int val;
139 int res;
140
141 res = regmap_read(data->regmap, MAX6639_REG_ALERT_LIMIT(channel), &val);
142 if (res < 0)
143 return res;
144
145 *crit = (long)val * 1000;
146
147 return 0;
148 }
149
max6639_temp_read_emergency(struct device * dev,int channel,long * emerg)150 static int max6639_temp_read_emergency(struct device *dev, int channel, long *emerg)
151 {
152 struct max6639_data *data = dev_get_drvdata(dev);
153 unsigned int val;
154 int res;
155
156 res = regmap_read(data->regmap, MAX6639_REG_OT_LIMIT(channel), &val);
157 if (res < 0)
158 return res;
159
160 *emerg = (long)val * 1000;
161
162 return 0;
163 }
164
max6639_get_status(struct device * dev,unsigned int * status)165 static int max6639_get_status(struct device *dev, unsigned int *status)
166 {
167 struct max6639_data *data = dev_get_drvdata(dev);
168 unsigned int val;
169 int res;
170
171 res = regmap_read(data->regmap, MAX6639_REG_STATUS, &val);
172 if (res < 0)
173 return res;
174
175 *status = val;
176
177 return 0;
178 }
179
max6639_temp_set_max(struct max6639_data * data,int channel,long val)180 static int max6639_temp_set_max(struct max6639_data *data, int channel, long val)
181 {
182 int res;
183
184 res = regmap_write(data->regmap, MAX6639_REG_THERM_LIMIT(channel),
185 TEMP_LIMIT_TO_REG(val));
186 return res;
187 }
188
max6639_temp_set_crit(struct max6639_data * data,int channel,long val)189 static int max6639_temp_set_crit(struct max6639_data *data, int channel, long val)
190 {
191 int res;
192
193 res = regmap_write(data->regmap, MAX6639_REG_ALERT_LIMIT(channel), TEMP_LIMIT_TO_REG(val));
194
195 return res;
196 }
197
max6639_temp_set_emergency(struct max6639_data * data,int channel,long val)198 static int max6639_temp_set_emergency(struct max6639_data *data, int channel, long val)
199 {
200 int res;
201
202 res = regmap_write(data->regmap, MAX6639_REG_OT_LIMIT(channel), TEMP_LIMIT_TO_REG(val));
203
204 return res;
205 }
206
max6639_read_fan(struct device * dev,u32 attr,int channel,long * fan_val)207 static int max6639_read_fan(struct device *dev, u32 attr, int channel,
208 long *fan_val)
209 {
210 struct max6639_data *data = dev_get_drvdata(dev);
211 unsigned int val;
212 int res;
213
214 switch (attr) {
215 case hwmon_fan_input:
216 res = regmap_read(data->regmap, MAX6639_REG_FAN_CNT(channel), &val);
217 if (res < 0)
218 return res;
219 *fan_val = FAN_FROM_REG(val, data->rpm_range[channel]);
220 return 0;
221 case hwmon_fan_fault:
222 res = max6639_get_status(dev, &val);
223 if (res < 0)
224 return res;
225 *fan_val = !!(val & BIT(1 - channel));
226 return 0;
227 case hwmon_fan_pulses:
228 *fan_val = data->ppr[channel];
229 return 0;
230 default:
231 return -EOPNOTSUPP;
232 }
233 }
234
max6639_set_ppr(struct max6639_data * data,int channel,u8 ppr)235 static int max6639_set_ppr(struct max6639_data *data, int channel, u8 ppr)
236 {
237 /* Decrement the PPR value and shift left by 6 to match the register format */
238 return regmap_write(data->regmap, MAX6639_REG_FAN_PPR(channel), ppr-- << 6);
239 }
240
max6639_write_fan(struct device * dev,u32 attr,int channel,long val)241 static int max6639_write_fan(struct device *dev, u32 attr, int channel,
242 long val)
243 {
244 struct max6639_data *data = dev_get_drvdata(dev);
245 int err;
246
247 switch (attr) {
248 case hwmon_fan_pulses:
249 if (val <= 0 || val > 4)
250 return -EINVAL;
251
252 mutex_lock(&data->update_lock);
253 /* Set Fan pulse per revolution */
254 err = max6639_set_ppr(data, channel, val);
255 if (err < 0) {
256 mutex_unlock(&data->update_lock);
257 return err;
258 }
259 data->ppr[channel] = val;
260
261 mutex_unlock(&data->update_lock);
262 return 0;
263 default:
264 return -EOPNOTSUPP;
265 }
266 }
267
max6639_fan_is_visible(const void * _data,u32 attr,int channel)268 static umode_t max6639_fan_is_visible(const void *_data, u32 attr, int channel)
269 {
270 switch (attr) {
271 case hwmon_fan_input:
272 case hwmon_fan_fault:
273 return 0444;
274 case hwmon_fan_pulses:
275 return 0644;
276 default:
277 return 0;
278 }
279 }
280
max6639_read_pwm(struct device * dev,u32 attr,int channel,long * pwm_val)281 static int max6639_read_pwm(struct device *dev, u32 attr, int channel,
282 long *pwm_val)
283 {
284 u32 regs[2] = { MAX6639_REG_FAN_CONFIG3(channel), MAX6639_REG_GCONFIG };
285 struct max6639_data *data = dev_get_drvdata(dev);
286 unsigned int val;
287 u8 regvals[2];
288 int res;
289 u8 i;
290
291 switch (attr) {
292 case hwmon_pwm_input:
293 res = regmap_read(data->regmap, MAX6639_REG_TARGTDUTY(channel), &val);
294 if (res < 0)
295 return res;
296 *pwm_val = val * 255 / 120;
297 return 0;
298 case hwmon_pwm_freq:
299 res = regmap_multi_reg_read(data->regmap, regs, regvals, 2);
300 if (res < 0)
301 return res;
302 i = regvals[0] & MAX6639_FAN_CONFIG3_FREQ_MASK;
303 if (regvals[1] & MAX6639_GCONFIG_PWM_FREQ_HI)
304 i |= 0x4;
305 *pwm_val = freq_table[i];
306 return 0;
307 default:
308 return -EOPNOTSUPP;
309 }
310 }
311
max6639_write_pwm(struct device * dev,u32 attr,int channel,long val)312 static int max6639_write_pwm(struct device *dev, u32 attr, int channel,
313 long val)
314 {
315 struct max6639_data *data = dev_get_drvdata(dev);
316 int err;
317 u8 i;
318
319 switch (attr) {
320 case hwmon_pwm_input:
321 if (val < 0 || val > 255)
322 return -EINVAL;
323 err = regmap_write(data->regmap, MAX6639_REG_TARGTDUTY(channel),
324 val * 120 / 255);
325 return err;
326 case hwmon_pwm_freq:
327 val = clamp_val(val, 0, 25000);
328
329 i = find_closest(val, freq_table, ARRAY_SIZE(freq_table));
330
331 mutex_lock(&data->update_lock);
332 err = regmap_update_bits(data->regmap, MAX6639_REG_FAN_CONFIG3(channel),
333 MAX6639_FAN_CONFIG3_FREQ_MASK, i);
334 if (err < 0) {
335 mutex_unlock(&data->update_lock);
336 return err;
337 }
338
339 if (i >> 2)
340 err = regmap_set_bits(data->regmap, MAX6639_REG_GCONFIG,
341 MAX6639_GCONFIG_PWM_FREQ_HI);
342 else
343 err = regmap_clear_bits(data->regmap, MAX6639_REG_GCONFIG,
344 MAX6639_GCONFIG_PWM_FREQ_HI);
345
346 mutex_unlock(&data->update_lock);
347 return err;
348 default:
349 return -EOPNOTSUPP;
350 }
351 }
352
max6639_pwm_is_visible(const void * _data,u32 attr,int channel)353 static umode_t max6639_pwm_is_visible(const void *_data, u32 attr, int channel)
354 {
355 switch (attr) {
356 case hwmon_pwm_input:
357 case hwmon_pwm_freq:
358 return 0644;
359 default:
360 return 0;
361 }
362 }
363
max6639_read_temp(struct device * dev,u32 attr,int channel,long * val)364 static int max6639_read_temp(struct device *dev, u32 attr, int channel,
365 long *val)
366 {
367 unsigned int status;
368 int res;
369
370 switch (attr) {
371 case hwmon_temp_input:
372 res = max6639_temp_read_input(dev, channel, val);
373 return res;
374 case hwmon_temp_fault:
375 res = max6639_temp_read_fault(dev, channel, val);
376 return res;
377 case hwmon_temp_max:
378 res = max6639_temp_read_max(dev, channel, val);
379 return res;
380 case hwmon_temp_crit:
381 res = max6639_temp_read_crit(dev, channel, val);
382 return res;
383 case hwmon_temp_emergency:
384 res = max6639_temp_read_emergency(dev, channel, val);
385 return res;
386 case hwmon_temp_max_alarm:
387 res = max6639_get_status(dev, &status);
388 if (res < 0)
389 return res;
390 *val = !!(status & BIT(3 - channel));
391 return 0;
392 case hwmon_temp_crit_alarm:
393 res = max6639_get_status(dev, &status);
394 if (res < 0)
395 return res;
396 *val = !!(status & BIT(7 - channel));
397 return 0;
398 case hwmon_temp_emergency_alarm:
399 res = max6639_get_status(dev, &status);
400 if (res < 0)
401 return res;
402 *val = !!(status & BIT(5 - channel));
403 return 0;
404 default:
405 return -EOPNOTSUPP;
406 }
407 }
408
max6639_write_temp(struct device * dev,u32 attr,int channel,long val)409 static int max6639_write_temp(struct device *dev, u32 attr, int channel,
410 long val)
411 {
412 struct max6639_data *data = dev_get_drvdata(dev);
413
414 switch (attr) {
415 case hwmon_temp_max:
416 return max6639_temp_set_max(data, channel, val);
417 case hwmon_temp_crit:
418 return max6639_temp_set_crit(data, channel, val);
419 case hwmon_temp_emergency:
420 return max6639_temp_set_emergency(data, channel, val);
421 default:
422 return -EOPNOTSUPP;
423 }
424 }
425
max6639_temp_is_visible(const void * _data,u32 attr,int channel)426 static umode_t max6639_temp_is_visible(const void *_data, u32 attr, int channel)
427 {
428 switch (attr) {
429 case hwmon_temp_input:
430 case hwmon_temp_fault:
431 case hwmon_temp_max_alarm:
432 case hwmon_temp_crit_alarm:
433 case hwmon_temp_emergency_alarm:
434 return 0444;
435 case hwmon_temp_max:
436 case hwmon_temp_crit:
437 case hwmon_temp_emergency:
438 return 0644;
439 default:
440 return 0;
441 }
442 }
443
max6639_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)444 static int max6639_read(struct device *dev, enum hwmon_sensor_types type,
445 u32 attr, int channel, long *val)
446 {
447 switch (type) {
448 case hwmon_fan:
449 return max6639_read_fan(dev, attr, channel, val);
450 case hwmon_pwm:
451 return max6639_read_pwm(dev, attr, channel, val);
452 case hwmon_temp:
453 return max6639_read_temp(dev, attr, channel, val);
454 default:
455 return -EOPNOTSUPP;
456 }
457 }
458
max6639_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long val)459 static int max6639_write(struct device *dev, enum hwmon_sensor_types type,
460 u32 attr, int channel, long val)
461 {
462 switch (type) {
463 case hwmon_fan:
464 return max6639_write_fan(dev, attr, channel, val);
465 case hwmon_pwm:
466 return max6639_write_pwm(dev, attr, channel, val);
467 case hwmon_temp:
468 return max6639_write_temp(dev, attr, channel, val);
469 default:
470 return -EOPNOTSUPP;
471 }
472 }
473
max6639_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)474 static umode_t max6639_is_visible(const void *data,
475 enum hwmon_sensor_types type,
476 u32 attr, int channel)
477 {
478 switch (type) {
479 case hwmon_fan:
480 return max6639_fan_is_visible(data, attr, channel);
481 case hwmon_pwm:
482 return max6639_pwm_is_visible(data, attr, channel);
483 case hwmon_temp:
484 return max6639_temp_is_visible(data, attr, channel);
485 default:
486 return 0;
487 }
488 }
489
490 static const struct hwmon_channel_info * const max6639_info[] = {
491 HWMON_CHANNEL_INFO(fan,
492 HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_PULSES,
493 HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_PULSES),
494 HWMON_CHANNEL_INFO(pwm,
495 HWMON_PWM_INPUT | HWMON_PWM_FREQ,
496 HWMON_PWM_INPUT | HWMON_PWM_FREQ),
497 HWMON_CHANNEL_INFO(temp,
498 HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_MAX | HWMON_T_MAX_ALARM |
499 HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY |
500 HWMON_T_EMERGENCY_ALARM,
501 HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_MAX | HWMON_T_MAX_ALARM |
502 HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY |
503 HWMON_T_EMERGENCY_ALARM),
504 NULL
505 };
506
507 static const struct hwmon_ops max6639_hwmon_ops = {
508 .is_visible = max6639_is_visible,
509 .read = max6639_read,
510 .write = max6639_write,
511 };
512
513 static const struct hwmon_chip_info max6639_chip_info = {
514 .ops = &max6639_hwmon_ops,
515 .info = max6639_info,
516 };
517
518 /*
519 * returns respective index in rpm_ranges table
520 * 1 by default on invalid range
521 */
rpm_range_to_reg(int range)522 static int rpm_range_to_reg(int range)
523 {
524 int i;
525
526 for (i = 0; i < ARRAY_SIZE(rpm_ranges); i++) {
527 if (rpm_ranges[i] == range)
528 return i;
529 }
530
531 return 1; /* default: 4000 RPM */
532 }
533
max6639_init_client(struct i2c_client * client,struct max6639_data * data)534 static int max6639_init_client(struct i2c_client *client,
535 struct max6639_data *data)
536 {
537 struct max6639_platform_data *max6639_info =
538 dev_get_platdata(&client->dev);
539 int i;
540 int rpm_range = 1; /* default: 4000 RPM */
541 int err, ppr;
542
543 /* Reset chip to default values, see below for GCONFIG setup */
544 err = regmap_write(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_POR);
545 if (err)
546 return err;
547
548 /* Fans pulse per revolution is 2 by default */
549 if (max6639_info && max6639_info->ppr > 0 &&
550 max6639_info->ppr < 5)
551 ppr = max6639_info->ppr;
552 else
553 ppr = 2;
554
555 data->ppr[0] = ppr;
556 data->ppr[1] = ppr;
557
558 if (max6639_info)
559 rpm_range = rpm_range_to_reg(max6639_info->rpm_range);
560 data->rpm_range[0] = rpm_range;
561 data->rpm_range[1] = rpm_range;
562
563 for (i = 0; i < MAX6639_NUM_CHANNELS; i++) {
564 /* Set Fan pulse per revolution */
565 err = max6639_set_ppr(data, i, data->ppr[i]);
566 if (err)
567 return err;
568
569 /* Fans config PWM, RPM */
570 err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG1(i),
571 MAX6639_FAN_CONFIG1_PWM | data->rpm_range[i]);
572 if (err)
573 return err;
574
575 /* Fans PWM polarity high by default */
576 if (max6639_info) {
577 if (max6639_info->pwm_polarity == 0)
578 err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG2a(i), 0x00);
579 else
580 err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG2a(i), 0x02);
581 }
582 if (err)
583 return err;
584
585 /*
586 * /THERM full speed enable,
587 * PWM frequency 25kHz, see also GCONFIG below
588 */
589 err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG3(i),
590 MAX6639_FAN_CONFIG3_THERM_FULL_SPEED | 0x03);
591 if (err)
592 return err;
593
594 /* Max. temp. 80C/90C/100C */
595 err = regmap_write(data->regmap, MAX6639_REG_THERM_LIMIT(i), 80);
596 if (err)
597 return err;
598 err = regmap_write(data->regmap, MAX6639_REG_ALERT_LIMIT(i), 90);
599 if (err)
600 return err;
601 err = regmap_write(data->regmap, MAX6639_REG_OT_LIMIT(i), 100);
602 if (err)
603 return err;
604
605 /* PWM 120/120 (i.e. 100%) */
606 err = regmap_write(data->regmap, MAX6639_REG_TARGTDUTY(i), 120);
607 if (err)
608 return err;
609 }
610 /* Start monitoring */
611 return regmap_write(data->regmap, MAX6639_REG_GCONFIG,
612 MAX6639_GCONFIG_DISABLE_TIMEOUT | MAX6639_GCONFIG_CH2_LOCAL |
613 MAX6639_GCONFIG_PWM_FREQ_HI);
614
615 }
616
617 /* Return 0 if detection is successful, -ENODEV otherwise */
max6639_detect(struct i2c_client * client,struct i2c_board_info * info)618 static int max6639_detect(struct i2c_client *client,
619 struct i2c_board_info *info)
620 {
621 struct i2c_adapter *adapter = client->adapter;
622 int dev_id, manu_id;
623
624 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
625 return -ENODEV;
626
627 /* Actual detection via device and manufacturer ID */
628 dev_id = i2c_smbus_read_byte_data(client, MAX6639_REG_DEVID);
629 manu_id = i2c_smbus_read_byte_data(client, MAX6639_REG_MANUID);
630 if (dev_id != 0x58 || manu_id != 0x4D)
631 return -ENODEV;
632
633 strscpy(info->type, "max6639", I2C_NAME_SIZE);
634
635 return 0;
636 }
637
max6639_regulator_disable(void * data)638 static void max6639_regulator_disable(void *data)
639 {
640 regulator_disable(data);
641 }
642
max6639_regmap_is_volatile(struct device * dev,unsigned int reg)643 static bool max6639_regmap_is_volatile(struct device *dev, unsigned int reg)
644 {
645 switch (reg) {
646 case MAX6639_REG_TEMP(0):
647 case MAX6639_REG_TEMP_EXT(0):
648 case MAX6639_REG_TEMP(1):
649 case MAX6639_REG_TEMP_EXT(1):
650 case MAX6639_REG_STATUS:
651 case MAX6639_REG_FAN_CNT(0):
652 case MAX6639_REG_FAN_CNT(1):
653 case MAX6639_REG_TARGTDUTY(0):
654 case MAX6639_REG_TARGTDUTY(1):
655 return true;
656 default:
657 return false;
658 }
659 }
660
661 static const struct regmap_config max6639_regmap_config = {
662 .reg_bits = 8,
663 .val_bits = 8,
664 .max_register = MAX6639_REG_DEVREV,
665 .cache_type = REGCACHE_MAPLE,
666 .volatile_reg = max6639_regmap_is_volatile,
667 };
668
max6639_probe(struct i2c_client * client)669 static int max6639_probe(struct i2c_client *client)
670 {
671 struct device *dev = &client->dev;
672 struct max6639_data *data;
673 struct device *hwmon_dev;
674 int err;
675
676 data = devm_kzalloc(dev, sizeof(struct max6639_data), GFP_KERNEL);
677 if (!data)
678 return -ENOMEM;
679
680 data->regmap = devm_regmap_init_i2c(client, &max6639_regmap_config);
681 if (IS_ERR(data->regmap))
682 return dev_err_probe(dev,
683 PTR_ERR(data->regmap),
684 "regmap initialization failed\n");
685
686 data->reg = devm_regulator_get_optional(dev, "fan");
687 if (IS_ERR(data->reg)) {
688 if (PTR_ERR(data->reg) != -ENODEV)
689 return PTR_ERR(data->reg);
690
691 data->reg = NULL;
692 } else {
693 /* Spin up fans */
694 err = regulator_enable(data->reg);
695 if (err) {
696 dev_err(dev, "Failed to enable fan supply: %d\n", err);
697 return err;
698 }
699 err = devm_add_action_or_reset(dev, max6639_regulator_disable,
700 data->reg);
701 if (err) {
702 dev_err(dev, "Failed to register action: %d\n", err);
703 return err;
704 }
705 }
706
707 mutex_init(&data->update_lock);
708
709 /* Initialize the max6639 chip */
710 err = max6639_init_client(client, data);
711 if (err < 0)
712 return err;
713
714 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
715 data, &max6639_chip_info,
716 NULL);
717
718 return PTR_ERR_OR_ZERO(hwmon_dev);
719 }
720
max6639_suspend(struct device * dev)721 static int max6639_suspend(struct device *dev)
722 {
723 struct max6639_data *data = dev_get_drvdata(dev);
724
725 if (data->reg)
726 regulator_disable(data->reg);
727
728 return regmap_write_bits(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_STANDBY,
729 MAX6639_GCONFIG_STANDBY);
730 }
731
max6639_resume(struct device * dev)732 static int max6639_resume(struct device *dev)
733 {
734 struct max6639_data *data = dev_get_drvdata(dev);
735 int ret;
736
737 if (data->reg) {
738 ret = regulator_enable(data->reg);
739 if (ret) {
740 dev_err(dev, "Failed to enable fan supply: %d\n", ret);
741 return ret;
742 }
743 }
744
745 return regmap_write_bits(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_STANDBY,
746 ~MAX6639_GCONFIG_STANDBY);
747 }
748
749 static const struct i2c_device_id max6639_id[] = {
750 {"max6639"},
751 { }
752 };
753
754 MODULE_DEVICE_TABLE(i2c, max6639_id);
755
756 static DEFINE_SIMPLE_DEV_PM_OPS(max6639_pm_ops, max6639_suspend, max6639_resume);
757
758 static const struct of_device_id max6639_of_match[] = {
759 { .compatible = "maxim,max6639", },
760 { },
761 };
762
763 static struct i2c_driver max6639_driver = {
764 .class = I2C_CLASS_HWMON,
765 .driver = {
766 .name = "max6639",
767 .pm = pm_sleep_ptr(&max6639_pm_ops),
768 .of_match_table = max6639_of_match,
769 },
770 .probe = max6639_probe,
771 .id_table = max6639_id,
772 .detect = max6639_detect,
773 .address_list = normal_i2c,
774 };
775
776 module_i2c_driver(max6639_driver);
777
778 MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>");
779 MODULE_DESCRIPTION("max6639 driver");
780 MODULE_LICENSE("GPL");
781