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Searched refs:KHz (Results 1 – 25 of 49) sorted by relevance

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/linux/Documentation/ABI/testing/
H A Dsysfs-class-rtc-rtc0-device-rtc_calibration7 calibrate the AB8500.s 32KHz Real Time Clock.
12 30.5 micro-seconds (half-parts-per-million of the 32KHz clock)
/linux/Documentation/translations/zh_CN/power/
H A Denergy-model.rst171 02 unsigned long *KHz)
176 07 freq = foo_get_freq_ceil(dev, *KHz);
187 18 *KHz = freq;
/linux/drivers/cpufreq/
H A Dcppc_cpufreq.c457 unsigned long *power, unsigned long *KHz) in cppc_get_cpu_power() argument
461 unsigned long prev_freq = *KHz; in cppc_get_cpu_power()
482 perf_prev = cppc_khz_to_perf(perf_caps, *KHz); in cppc_get_cpu_power()
502 *KHz = cppc_perf_to_khz(perf_caps, perf); in cppc_get_cpu_power()
503 perf_check = cppc_khz_to_perf(perf_caps, *KHz); in cppc_get_cpu_power()
511 while ((*KHz == prev_freq) || (step_check != step)) { in cppc_get_cpu_power()
513 *KHz = cppc_perf_to_khz(perf_caps, perf); in cppc_get_cpu_power()
514 perf_check = cppc_khz_to_perf(perf_caps, *KHz); in cppc_get_cpu_power()
528 static int cppc_get_cpu_cost(struct device *cpu_dev, unsigned long KHz, in cppc_get_cpu_cost() argument
546 perf_prev = cppc_khz_to_perf(perf_caps, KHz); in cppc_get_cpu_cost()
H A Dscmi-cpufreq.c133 unsigned long *KHz) in scmi_get_cpu_power() argument
144 Hz = *KHz * 1000; in scmi_get_cpu_power()
154 *KHz = Hz / 1000; in scmi_get_cpu_power()
H A Dmediatek-cpufreq-hw.c97 unsigned long *KHz) in mtk_cpufreq_get_cpu_power() argument
110 if (data->table[i].frequency < *KHz) in mtk_cpufreq_get_cpu_power()
115 *KHz = data->table[i].frequency; in mtk_cpufreq_get_cpu_power()
/linux/Documentation/devicetree/bindings/clock/
H A Dclk-palmas-clk32kg-clocks.txt1 * Palmas 32KHz clocks *
3 Palmas device has two clock output pins for 32KHz, KG and KG_AUDIO.
/linux/drivers/media/dvb-frontends/
H A Ds5h1411.c376 static int s5h1411_set_if_freq(struct dvb_frontend *fe, int KHz) in s5h1411_set_if_freq() argument
380 dprintk("%s(%d KHz)\n", __func__, KHz); in s5h1411_set_if_freq()
382 switch (KHz) { in s5h1411_set_if_freq()
400 __func__, KHz); in s5h1411_set_if_freq()
410 state->if_freq = KHz; in s5h1411_set_if_freq()
H A Ds5h1409.c353 static int s5h1409_set_if_freq(struct dvb_frontend *fe, int KHz) in s5h1409_set_if_freq() argument
357 dprintk("%s(%d KHz)\n", __func__, KHz); in s5h1409_set_if_freq()
359 switch (KHz) { in s5h1409_set_if_freq()
373 state->if_freq = KHz; in s5h1409_set_if_freq()
/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i-reference-design-tablet.dtsi88 * The gsl1680 is rated at 400KHz and it will not work reliable at
89 * 100KHz, this has been confirmed on multiple different q8 tablets.
90 * All other devices on this bus are also rated for 400KHz.
H A Dsun8i-reference-design-tablet.dtsi67 * The gsl1680 is rated at 400KHz and it will not work reliable at
68 * 100KHz, this has been confirmed on multiple different q8 tablets.
/linux/drivers/clk/pxa/
H A Dclk-pxa27x.c21 #define KHz 1000 macro
100 return (unsigned int)clks[0] / KHz; in pxa27x_get_clk_frequency_khz()
294 32768 * KHz)); in pxa27x_register_plls()
H A Dclk-pxa25x.c25 #define KHz 1000 macro
97 return (unsigned int)clks[0] / KHz; in pxa25x_get_clk_frequency_khz()
H A Dclk-pxa3xx.c24 #define KHz 1000 macro
157 return (unsigned int)clks[0] / KHz; in pxa3xx_get_clk_frequency_khz()
H A Dclk-pxa.c19 #define KHz 1000 macro
/linux/Documentation/devicetree/bindings/media/
H A Dimg-ir-rev1.txt16 1st: Core clock (defaults to 32.768KHz if omitted).
/linux/Documentation/misc-devices/
H A Dics932s401.rst27 All frequencies are reported in KHz.
/linux/Documentation/i2c/busses/
H A Di2c-sis630.rst25 high_clock = [1|0] Forcibly set Host Master Clock to 56KHz (default,
/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30-ringneck-haikou-lvds-9904379.dtso67 /* EEPROM and GT928 are limited to 400KHz */
H A Drk3588-tiger-haikou-video-demo.dtso94 /* OV5675, GT911, DW9714 are limited to 400KHz */
/linux/Documentation/translations/zh_TW/arch/arm64/
H A Delf_hwcaps.rst71 通用計時器頻率配置爲大約100KHz以生成事件。
/linux/Documentation/translations/zh_CN/arch/arm64/
H A Delf_hwcaps.rst68 通用计时器频率配置为大约100KHz以生成事件。
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905x-hwacom-amazetv.dts75 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
H A Dmeson-gxl-s905x-nexbox-a95x.dts75 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
/linux/Documentation/userspace-api/media/v4l/
H A Dvidioc-g-modulator.rst89 - The lowest tunable frequency in units of 62.5 KHz, or if the
95 - The highest tunable frequency in units of 62.5 KHz, or if the
/linux/Documentation/driver-api/media/drivers/
H A Dcx88-devel.rst78 - Setup 4KHz sampling rate (roughly 2x oversampled; good enough for our RC5

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