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Searched refs:KHz (Results 1 – 25 of 89) sorted by relevance

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/linux/Documentation/ABI/testing/
H A Dsysfs-class-rtc-rtc0-device-rtc_calibration7 calibrate the AB8500.s 32KHz Real Time Clock.
12 30.5 micro-seconds (half-parts-per-million of the 32KHz clock)
/linux/Documentation/translations/zh_CN/power/
H A Denergy-model.rst171 02 unsigned long *KHz)
176 07 freq = foo_get_freq_ceil(dev, *KHz);
187 18 *KHz = freq;
/linux/arch/arm/mach-omap1/
H A DKconfig67 bool "Use 32KHz timer"
71 Select this option if you want to enable the OMAP 32KHz timer.
73 support for no tick during idle. The 32KHz timer provides less
74 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
87 timer provides more intra-tick resolution than the 32KHz timer,
/linux/Documentation/devicetree/bindings/clock/
H A Dclk-palmas-clk32kg-clocks.txt1 * Palmas 32KHz clocks *
3 Palmas device has two clock output pins for 32KHz, KG and KG_AUDIO.
/linux/drivers/media/dvb-frontends/
H A Ds5h1411.c376 static int s5h1411_set_if_freq(struct dvb_frontend *fe, int KHz) in s5h1411_set_if_freq() argument
380 dprintk("%s(%d KHz)\n", __func__, KHz); in s5h1411_set_if_freq()
382 switch (KHz) { in s5h1411_set_if_freq()
400 __func__, KHz); in s5h1411_set_if_freq()
410 state->if_freq = KHz; in s5h1411_set_if_freq()
H A Ds5h1409.c353 static int s5h1409_set_if_freq(struct dvb_frontend *fe, int KHz) in s5h1409_set_if_freq() argument
357 dprintk("%s(%d KHz)\n", __func__, KHz); in s5h1409_set_if_freq()
359 switch (KHz) { in s5h1409_set_if_freq()
373 state->if_freq = KHz; in s5h1409_set_if_freq()
/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i-reference-design-tablet.dtsi88 * The gsl1680 is rated at 400KHz and it will not work reliable at
89 * 100KHz, this has been confirmed on multiple different q8 tablets.
90 * All other devices on this bus are also rated for 400KHz.
H A Dsun8i-reference-design-tablet.dtsi67 * The gsl1680 is rated at 400KHz and it will not work reliable at
68 * 100KHz, this has been confirmed on multiple different q8 tablets.
/linux/Documentation/devicetree/bindings/mfd/
H A Dmax77620.txt36 with internal regulators. 32KHz clock can be programmed to be part of a
46 Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
54 When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
58 and 32KHz clock get disabled at
/linux/drivers/cpufreq/
H A Dscmi-cpufreq.c132 unsigned long *KHz) in scmi_get_cpu_power() argument
143 Hz = *KHz * 1000; in scmi_get_cpu_power()
153 *KHz = Hz / 1000; in scmi_get_cpu_power()
H A Dmediatek-cpufreq-hw.c97 unsigned long *KHz) in mtk_cpufreq_get_cpu_power() argument
110 if (data->table[i].frequency < *KHz) in mtk_cpufreq_get_cpu_power()
115 *KHz = data->table[i].frequency; in mtk_cpufreq_get_cpu_power()
/linux/drivers/clk/pxa/
H A Dclk-pxa27x.c21 #define KHz 1000 macro
100 return (unsigned int)clks[0] / KHz; in pxa27x_get_clk_frequency_khz()
294 32768 * KHz)); in pxa27x_register_plls()
H A Dclk-pxa25x.c25 #define KHz 1000 macro
97 return (unsigned int)clks[0] / KHz; in pxa25x_get_clk_frequency_khz()
H A Dclk-pxa3xx.c24 #define KHz 1000 macro
157 return (unsigned int)clks[0] / KHz; in pxa3xx_get_clk_frequency_khz()
H A Dclk-pxa.c19 #define KHz 1000 macro
/linux/Documentation/devicetree/bindings/media/
H A Dimg-ir-rev1.txt16 1st: Core clock (defaults to 32.768KHz if omitted).
/linux/Documentation/misc-devices/
H A Dics932s401.rst27 All frequencies are reported in KHz.
/linux/Documentation/i2c/busses/
H A Di2c-sis630.rst25 high_clock = [1|0] Forcibly set Host Master Clock to 56KHz (default,
/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30-ringneck-haikou-lvds-9904379.dtso67 /* EEPROM and GT928 are limited to 400KHz */
H A Drk3588-tiger-haikou-video-demo.dtso94 /* OV5675, GT911, DW9714 are limited to 400KHz */
/linux/Documentation/translations/zh_TW/arch/arm64/
H A Delf_hwcaps.rst71 通用計時器頻率配置爲大約100KHz以生成事件。
/linux/Documentation/translations/zh_CN/arch/arm64/
H A Delf_hwcaps.rst68 通用计时器频率配置为大约100KHz以生成事件。
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905x-hwacom-amazetv.dts75 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
H A Dmeson-s4-s805x2-aq222.dts42 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
/linux/Documentation/devicetree/bindings/display/tilcdc/
H A Dtilcdc.txt19 by the lcd controller in KHz.

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