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Searched refs:KHZ (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/phy/samsung/
H A Dphy-samsung-usb2.h19 #define KHZ 1000 macro
20 #define MHZ (KHZ * KHZ)
H A Dphy-exynos4x12-usb2.c137 case 9600 * KHZ: in exynos4x12_rate_to_clk()
146 case 19200 * KHZ: in exynos4x12_rate_to_clk()
H A Dphy-exynos5250-usb2.c146 case 9600 * KHZ: in exynos5250_rate_to_clk()
155 case 19200 * KHZ: in exynos5250_rate_to_clk()
/linux/drivers/cpufreq/
H A Dtegra194-cpufreq.c21 #define KHZ 1000 macro
23 #define CPUFREQ_TBL_STEP_HZ (50 * KHZ * KHZ)
95 opp = dev_pm_opp_find_freq_exact(dev, freq_khz * KHZ, true); in tegra_cpufreq_set_bw()
240 return nltbl->ref_clk_hz / KHZ * ndiv / (nltbl->pdiv * nltbl->mdiv); in map_ndiv_to_freq()
356 return (rate_mhz * KHZ); /* in KHz */ in tegra194_calculate_speed()
475 opp = dev_pm_opp_find_freq_exact(cpu_dev, pos->frequency * KHZ, false); in tegra_cpufreq_init_cpufreq_table()
481 ret = dev_pm_opp_enable(cpu_dev, pos->frequency * KHZ); in tegra_cpufreq_init_cpufreq_table()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgk20a.c114 target_clk_f = rate * 2 / KHZ; in gk20a_pllg_calc_mnp()
115 ref_clk_f = clk->parent_rate / KHZ; in gk20a_pllg_calc_mnp()
196 target_clk_f / KHZ); in gk20a_pllg_calc_mnp()
206 target_freq / KHZ, pll->m, pll->n, pll->pl, in gk20a_pllg_calc_mnp()
531 clk->parent_rate / KHZ); in gk20a_clk_setup_slide()
640 clk->parent_rate / KHZ); in gk20a_clk_ctor()
H A Dgm20b.c491 u32 rate = gk20a_pllg_calc_rate(&clk->base, pll) / KHZ; in gm20b_dvfs_calc_safe_pll()
492 u32 parent_rate = clk->base.parent_rate / KHZ; in gm20b_dvfs_calc_safe_pll()
1051 (clk->base.parent_rate / KHZ)); in gm20b_clk_new()
/linux/drivers/clk/sophgo/
H A Dclk-sg2042-pll.c60 #define KHZ 1000UL macro
61 #define MHZ (KHZ * KHZ)
/linux/arch/arm/boot/dts/microchip/
H A Dat91-tse850-3.dts343 /* 4 */ "", "456KHZ", "VCTRL", "SYNCSEL",
/linux/Documentation/virt/kvm/x86/
H A Dtimekeeping.rst68 |------>| CLOCK OUT | ---------> 66.3 KHZ DRAM