Searched refs:KHZ (Results 1 – 8 of 8) sorted by relevance
19 #define KHZ 1000 macro20 #define MHZ (KHZ * KHZ)
137 case 9600 * KHZ: in exynos4x12_rate_to_clk()146 case 19200 * KHZ: in exynos4x12_rate_to_clk()
146 case 9600 * KHZ: in exynos5250_rate_to_clk()155 case 19200 * KHZ: in exynos5250_rate_to_clk()
114 target_clk_f = rate * 2 / KHZ; in gk20a_pllg_calc_mnp()115 ref_clk_f = clk->parent_rate / KHZ; in gk20a_pllg_calc_mnp()196 target_clk_f / KHZ); in gk20a_pllg_calc_mnp()206 target_freq / KHZ, pll->m, pll->n, pll->pl, in gk20a_pllg_calc_mnp()531 clk->parent_rate / KHZ); in gk20a_clk_setup_slide()640 clk->parent_rate / KHZ); in gk20a_clk_ctor()
491 u32 rate = gk20a_pllg_calc_rate(&clk->base, pll) / KHZ; in gm20b_dvfs_calc_safe_pll()492 u32 parent_rate = clk->base.parent_rate / KHZ; in gm20b_dvfs_calc_safe_pll()1051 (clk->base.parent_rate / KHZ)); in gm20b_clk_new()
60 #define KHZ 1000UL macro61 #define MHZ (KHZ * KHZ)
343 /* 4 */ "", "456KHZ", "VCTRL", "SYNCSEL",
68 |------>| CLOCK OUT | ---------> 66.3 KHZ DRAM