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Searched refs:IO_ADDR_W (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/mtd/nand/raw/
H A Dpasemi_nand.c67 out_8(chip->legacy.IO_ADDR_W + (1 << CLE_PIN_CTL), cmd); in pasemi_hwcontrol()
69 out_8(chip->legacy.IO_ADDR_W + (1 << ALE_PIN_CTL), cmd); in pasemi_hwcontrol()
135 chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R; in pasemi_nand_probe()
H A Dorion_nand.c49 writeb(cmd, nc->legacy.IO_ADDR_W + offs); in orion_nand_cmd_ctrl()
155 nc->legacy.IO_ADDR_R = nc->legacy.IO_ADDR_W = io_base; in orion_nand_probe()
H A Dsharpsl.c73 writeb(cmd, chip->legacy.IO_ADDR_W); in sharpsl_nand_hwcontrol()
175 this->legacy.IO_ADDR_W = sharpsl->io + FLASHIO; in sharpsl_nand_probe()
H A Dnand_legacy.c119 iowrite8_rep(chip->legacy.IO_ADDR_W, buf, len); in nand_write_buf()
148 iowrite16_rep(chip->legacy.IO_ADDR_W, p, len >> 1); in nand_write_buf16()
H A Dndfc.c141 chip->legacy.IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA; in ndfc_chip_init()
H A Dlpc32xx_mlc.c761 nand_chip->legacy.IO_ADDR_W = MLC_DATA(host->io_base); in lpc32xx_nand_probe()
H A Dlpc32xx_slc.c895 chip->legacy.IO_ADDR_W = SLC_DATA(host->io_base); in lpc32xx_nand_probe()
/linux/arch/arm/mach-orion5x/
H A Dts78xx-setup.c144 writeb(cmd, this->legacy.IO_ADDR_W); in ts78xx_ts_nand_cmd_ctrl()
155 void __iomem *io_base = chip->legacy.IO_ADDR_W; in ts78xx_ts_nand_write_buf()
/linux/Documentation/driver-api/
H A Dmtdnand.rst183 case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break;
184 case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;
185 case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break;
186 case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;
239 this->legacy.IO_ADDR_W = baseaddr;
342 this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;
346 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
351 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
/linux/include/linux/mtd/
H A Drawnand.h1165 void __iomem *IO_ADDR_W; member