1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2015 Microchip Technology 4 */ 5 #include <linux/module.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/ethtool.h> 9 #include <linux/phylink.h> 10 #include <linux/usb.h> 11 #include <linux/crc32.h> 12 #include <linux/signal.h> 13 #include <linux/slab.h> 14 #include <linux/if_vlan.h> 15 #include <linux/uaccess.h> 16 #include <linux/linkmode.h> 17 #include <linux/list.h> 18 #include <linux/ip.h> 19 #include <linux/ipv6.h> 20 #include <linux/mdio.h> 21 #include <linux/phy.h> 22 #include <net/ip6_checksum.h> 23 #include <net/selftests.h> 24 #include <net/vxlan.h> 25 #include <linux/interrupt.h> 26 #include <linux/irqdomain.h> 27 #include <linux/irq.h> 28 #include <linux/irqchip/chained_irq.h> 29 #include <linux/microchipphy.h> 30 #include <linux/of_mdio.h> 31 #include <linux/of_net.h> 32 #include "lan78xx.h" 33 34 #define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>" 35 #define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices" 36 #define DRIVER_NAME "lan78xx" 37 38 #define TX_TIMEOUT_JIFFIES (5 * HZ) 39 #define THROTTLE_JIFFIES (HZ / 8) 40 #define UNLINK_TIMEOUT_MS 3 41 42 #define RX_MAX_QUEUE_MEMORY (60 * 1518) 43 44 #define SS_USB_PKT_SIZE (1024) 45 #define HS_USB_PKT_SIZE (512) 46 #define FS_USB_PKT_SIZE (64) 47 48 #define MAX_RX_FIFO_SIZE (12 * 1024) 49 #define MAX_TX_FIFO_SIZE (12 * 1024) 50 51 #define FLOW_THRESHOLD(n) ((((n) + 511) / 512) & 0x7F) 52 #define FLOW_CTRL_THRESHOLD(on, off) ((FLOW_THRESHOLD(on) << 0) | \ 53 (FLOW_THRESHOLD(off) << 8)) 54 55 /* Flow control turned on when Rx FIFO level rises above this level (bytes) */ 56 #define FLOW_ON_SS 9216 57 #define FLOW_ON_HS 8704 58 59 /* Flow control turned off when Rx FIFO level falls below this level (bytes) */ 60 #define FLOW_OFF_SS 4096 61 #define FLOW_OFF_HS 1024 62 63 #define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE) 64 #define DEFAULT_BULK_IN_DELAY (0x0800) 65 #define MAX_SINGLE_PACKET_SIZE (9000) 66 #define DEFAULT_TX_CSUM_ENABLE (true) 67 #define DEFAULT_RX_CSUM_ENABLE (true) 68 #define DEFAULT_TSO_CSUM_ENABLE (true) 69 #define DEFAULT_VLAN_FILTER_ENABLE (true) 70 #define DEFAULT_VLAN_RX_OFFLOAD (true) 71 #define TX_ALIGNMENT (4) 72 #define RXW_PADDING 2 73 74 #define LAN78XX_USB_VENDOR_ID (0x0424) 75 #define LAN7800_USB_PRODUCT_ID (0x7800) 76 #define LAN7850_USB_PRODUCT_ID (0x7850) 77 #define LAN7801_USB_PRODUCT_ID (0x7801) 78 #define LAN78XX_EEPROM_MAGIC (0x78A5) 79 #define LAN78XX_OTP_MAGIC (0x78F3) 80 #define AT29M2AF_USB_VENDOR_ID (0x07C9) 81 #define AT29M2AF_USB_PRODUCT_ID (0x0012) 82 83 #define MII_READ 1 84 #define MII_WRITE 0 85 86 #define EEPROM_INDICATOR (0xA5) 87 #define EEPROM_MAC_OFFSET (0x01) 88 #define MAX_EEPROM_SIZE 512 89 #define OTP_INDICATOR_1 (0xF3) 90 #define OTP_INDICATOR_2 (0xF7) 91 92 #define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \ 93 WAKE_MCAST | WAKE_BCAST | \ 94 WAKE_ARP | WAKE_MAGIC) 95 96 #define TX_URB_NUM 10 97 #define TX_SS_URB_NUM TX_URB_NUM 98 #define TX_HS_URB_NUM TX_URB_NUM 99 #define TX_FS_URB_NUM TX_URB_NUM 100 101 /* A single URB buffer must be large enough to hold a complete jumbo packet 102 */ 103 #define TX_SS_URB_SIZE (32 * 1024) 104 #define TX_HS_URB_SIZE (16 * 1024) 105 #define TX_FS_URB_SIZE (10 * 1024) 106 107 #define RX_SS_URB_NUM 30 108 #define RX_HS_URB_NUM 10 109 #define RX_FS_URB_NUM 10 110 #define RX_SS_URB_SIZE TX_SS_URB_SIZE 111 #define RX_HS_URB_SIZE TX_HS_URB_SIZE 112 #define RX_FS_URB_SIZE TX_FS_URB_SIZE 113 114 #define SS_BURST_CAP_SIZE RX_SS_URB_SIZE 115 #define SS_BULK_IN_DELAY 0x2000 116 #define HS_BURST_CAP_SIZE RX_HS_URB_SIZE 117 #define HS_BULK_IN_DELAY 0x2000 118 #define FS_BURST_CAP_SIZE RX_FS_URB_SIZE 119 #define FS_BULK_IN_DELAY 0x2000 120 121 #define TX_CMD_LEN 8 122 #define TX_SKB_MIN_LEN (TX_CMD_LEN + ETH_HLEN) 123 #define LAN78XX_TSO_SIZE(dev) ((dev)->tx_urb_size - TX_SKB_MIN_LEN) 124 125 #define RX_CMD_LEN 10 126 #define RX_SKB_MIN_LEN (RX_CMD_LEN + ETH_HLEN) 127 #define RX_MAX_FRAME_LEN(mtu) ((mtu) + ETH_HLEN + VLAN_HLEN) 128 129 /* USB related defines */ 130 #define BULK_IN_PIPE 1 131 #define BULK_OUT_PIPE 2 132 133 /* default autosuspend delay (mSec)*/ 134 #define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000) 135 136 /* statistic update interval (mSec) */ 137 #define STAT_UPDATE_TIMER (1 * 1000) 138 139 /* time to wait for MAC or FCT to stop (jiffies) */ 140 #define HW_DISABLE_TIMEOUT (HZ / 10) 141 142 /* time to wait between polling MAC or FCT state (ms) */ 143 #define HW_DISABLE_DELAY_MS 1 144 145 /* defines interrupts from interrupt EP */ 146 #define MAX_INT_EP (32) 147 #define INT_EP_INTEP (31) 148 #define INT_EP_OTP_WR_DONE (28) 149 #define INT_EP_EEE_TX_LPI_START (26) 150 #define INT_EP_EEE_TX_LPI_STOP (25) 151 #define INT_EP_EEE_RX_LPI (24) 152 #define INT_EP_MAC_RESET_TIMEOUT (23) 153 #define INT_EP_RDFO (22) 154 #define INT_EP_TXE (21) 155 #define INT_EP_USB_STATUS (20) 156 #define INT_EP_TX_DIS (19) 157 #define INT_EP_RX_DIS (18) 158 #define INT_EP_PHY (17) 159 #define INT_EP_DP (16) 160 #define INT_EP_MAC_ERR (15) 161 #define INT_EP_TDFU (14) 162 #define INT_EP_TDFO (13) 163 #define INT_EP_UTX (12) 164 #define INT_EP_GPIO_11 (11) 165 #define INT_EP_GPIO_10 (10) 166 #define INT_EP_GPIO_9 (9) 167 #define INT_EP_GPIO_8 (8) 168 #define INT_EP_GPIO_7 (7) 169 #define INT_EP_GPIO_6 (6) 170 #define INT_EP_GPIO_5 (5) 171 #define INT_EP_GPIO_4 (4) 172 #define INT_EP_GPIO_3 (3) 173 #define INT_EP_GPIO_2 (2) 174 #define INT_EP_GPIO_1 (1) 175 #define INT_EP_GPIO_0 (0) 176 177 static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = { 178 "RX FCS Errors", 179 "RX Alignment Errors", 180 "Rx Fragment Errors", 181 "RX Jabber Errors", 182 "RX Undersize Frame Errors", 183 "RX Oversize Frame Errors", 184 "RX Dropped Frames", 185 "RX Unicast Byte Count", 186 "RX Broadcast Byte Count", 187 "RX Multicast Byte Count", 188 "RX Unicast Frames", 189 "RX Broadcast Frames", 190 "RX Multicast Frames", 191 "RX Pause Frames", 192 "RX 64 Byte Frames", 193 "RX 65 - 127 Byte Frames", 194 "RX 128 - 255 Byte Frames", 195 "RX 256 - 511 Bytes Frames", 196 "RX 512 - 1023 Byte Frames", 197 "RX 1024 - 1518 Byte Frames", 198 "RX Greater 1518 Byte Frames", 199 "EEE RX LPI Transitions", 200 "EEE RX LPI Time", 201 "TX FCS Errors", 202 "TX Excess Deferral Errors", 203 "TX Carrier Errors", 204 "TX Bad Byte Count", 205 "TX Single Collisions", 206 "TX Multiple Collisions", 207 "TX Excessive Collision", 208 "TX Late Collisions", 209 "TX Unicast Byte Count", 210 "TX Broadcast Byte Count", 211 "TX Multicast Byte Count", 212 "TX Unicast Frames", 213 "TX Broadcast Frames", 214 "TX Multicast Frames", 215 "TX Pause Frames", 216 "TX 64 Byte Frames", 217 "TX 65 - 127 Byte Frames", 218 "TX 128 - 255 Byte Frames", 219 "TX 256 - 511 Bytes Frames", 220 "TX 512 - 1023 Byte Frames", 221 "TX 1024 - 1518 Byte Frames", 222 "TX Greater 1518 Byte Frames", 223 "EEE TX LPI Transitions", 224 "EEE TX LPI Time", 225 }; 226 227 struct lan78xx_statstage { 228 u32 rx_fcs_errors; 229 u32 rx_alignment_errors; 230 u32 rx_fragment_errors; 231 u32 rx_jabber_errors; 232 u32 rx_undersize_frame_errors; 233 u32 rx_oversize_frame_errors; 234 u32 rx_dropped_frames; 235 u32 rx_unicast_byte_count; 236 u32 rx_broadcast_byte_count; 237 u32 rx_multicast_byte_count; 238 u32 rx_unicast_frames; 239 u32 rx_broadcast_frames; 240 u32 rx_multicast_frames; 241 u32 rx_pause_frames; 242 u32 rx_64_byte_frames; 243 u32 rx_65_127_byte_frames; 244 u32 rx_128_255_byte_frames; 245 u32 rx_256_511_bytes_frames; 246 u32 rx_512_1023_byte_frames; 247 u32 rx_1024_1518_byte_frames; 248 u32 rx_greater_1518_byte_frames; 249 u32 eee_rx_lpi_transitions; 250 u32 eee_rx_lpi_time; 251 u32 tx_fcs_errors; 252 u32 tx_excess_deferral_errors; 253 u32 tx_carrier_errors; 254 u32 tx_bad_byte_count; 255 u32 tx_single_collisions; 256 u32 tx_multiple_collisions; 257 u32 tx_excessive_collision; 258 u32 tx_late_collisions; 259 u32 tx_unicast_byte_count; 260 u32 tx_broadcast_byte_count; 261 u32 tx_multicast_byte_count; 262 u32 tx_unicast_frames; 263 u32 tx_broadcast_frames; 264 u32 tx_multicast_frames; 265 u32 tx_pause_frames; 266 u32 tx_64_byte_frames; 267 u32 tx_65_127_byte_frames; 268 u32 tx_128_255_byte_frames; 269 u32 tx_256_511_bytes_frames; 270 u32 tx_512_1023_byte_frames; 271 u32 tx_1024_1518_byte_frames; 272 u32 tx_greater_1518_byte_frames; 273 u32 eee_tx_lpi_transitions; 274 u32 eee_tx_lpi_time; 275 }; 276 277 struct lan78xx_statstage64 { 278 u64 rx_fcs_errors; 279 u64 rx_alignment_errors; 280 u64 rx_fragment_errors; 281 u64 rx_jabber_errors; 282 u64 rx_undersize_frame_errors; 283 u64 rx_oversize_frame_errors; 284 u64 rx_dropped_frames; 285 u64 rx_unicast_byte_count; 286 u64 rx_broadcast_byte_count; 287 u64 rx_multicast_byte_count; 288 u64 rx_unicast_frames; 289 u64 rx_broadcast_frames; 290 u64 rx_multicast_frames; 291 u64 rx_pause_frames; 292 u64 rx_64_byte_frames; 293 u64 rx_65_127_byte_frames; 294 u64 rx_128_255_byte_frames; 295 u64 rx_256_511_bytes_frames; 296 u64 rx_512_1023_byte_frames; 297 u64 rx_1024_1518_byte_frames; 298 u64 rx_greater_1518_byte_frames; 299 u64 eee_rx_lpi_transitions; 300 u64 eee_rx_lpi_time; 301 u64 tx_fcs_errors; 302 u64 tx_excess_deferral_errors; 303 u64 tx_carrier_errors; 304 u64 tx_bad_byte_count; 305 u64 tx_single_collisions; 306 u64 tx_multiple_collisions; 307 u64 tx_excessive_collision; 308 u64 tx_late_collisions; 309 u64 tx_unicast_byte_count; 310 u64 tx_broadcast_byte_count; 311 u64 tx_multicast_byte_count; 312 u64 tx_unicast_frames; 313 u64 tx_broadcast_frames; 314 u64 tx_multicast_frames; 315 u64 tx_pause_frames; 316 u64 tx_64_byte_frames; 317 u64 tx_65_127_byte_frames; 318 u64 tx_128_255_byte_frames; 319 u64 tx_256_511_bytes_frames; 320 u64 tx_512_1023_byte_frames; 321 u64 tx_1024_1518_byte_frames; 322 u64 tx_greater_1518_byte_frames; 323 u64 eee_tx_lpi_transitions; 324 u64 eee_tx_lpi_time; 325 }; 326 327 static u32 lan78xx_regs[] = { 328 ID_REV, 329 INT_STS, 330 HW_CFG, 331 PMT_CTL, 332 E2P_CMD, 333 E2P_DATA, 334 USB_STATUS, 335 VLAN_TYPE, 336 MAC_CR, 337 MAC_RX, 338 MAC_TX, 339 FLOW, 340 ERR_STS, 341 MII_ACC, 342 MII_DATA, 343 EEE_TX_LPI_REQ_DLY, 344 EEE_TW_TX_SYS, 345 EEE_TX_LPI_REM_DLY, 346 WUCSR 347 }; 348 349 #define PHY_REG_SIZE (32 * sizeof(u32)) 350 351 struct lan78xx_net; 352 353 struct lan78xx_priv { 354 struct lan78xx_net *dev; 355 u32 rfe_ctl; 356 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicast hash table */ 357 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */ 358 u32 vlan_table[DP_SEL_VHF_VLAN_LEN]; 359 struct mutex dataport_mutex; /* for dataport access */ 360 spinlock_t rfe_ctl_lock; /* for rfe register access */ 361 struct work_struct set_multicast; 362 struct work_struct set_vlan; 363 u32 wol; 364 }; 365 366 enum skb_state { 367 illegal = 0, 368 tx_start, 369 tx_done, 370 rx_start, 371 rx_done, 372 rx_cleanup, 373 unlink_start 374 }; 375 376 struct skb_data { /* skb->cb is one of these */ 377 struct urb *urb; 378 struct lan78xx_net *dev; 379 enum skb_state state; 380 size_t length; 381 int num_of_packet; 382 }; 383 384 #define EVENT_TX_HALT 0 385 #define EVENT_RX_HALT 1 386 #define EVENT_RX_MEMORY 2 387 #define EVENT_STS_SPLIT 3 388 #define EVENT_PHY_INT_ACK 4 389 #define EVENT_RX_PAUSED 5 390 #define EVENT_DEV_WAKING 6 391 #define EVENT_DEV_ASLEEP 7 392 #define EVENT_DEV_OPEN 8 393 #define EVENT_STAT_UPDATE 9 394 #define EVENT_DEV_DISCONNECT 10 395 396 struct statstage { 397 struct mutex access_lock; /* for stats access */ 398 struct lan78xx_statstage saved; 399 struct lan78xx_statstage rollover_count; 400 struct lan78xx_statstage rollover_max; 401 struct lan78xx_statstage64 curr_stat; 402 }; 403 404 struct irq_domain_data { 405 struct irq_domain *irqdomain; 406 unsigned int phyirq; 407 struct irq_chip *irqchip; 408 irq_flow_handler_t irq_handler; 409 u32 irqenable; 410 struct mutex irq_lock; /* for irq bus access */ 411 }; 412 413 struct lan78xx_net { 414 struct net_device *net; 415 struct usb_device *udev; 416 struct usb_interface *intf; 417 418 unsigned int tx_pend_data_len; 419 size_t n_tx_urbs; 420 size_t n_rx_urbs; 421 size_t tx_urb_size; 422 size_t rx_urb_size; 423 424 struct sk_buff_head rxq_free; 425 struct sk_buff_head rxq; 426 struct sk_buff_head rxq_done; 427 struct sk_buff_head rxq_overflow; 428 struct sk_buff_head txq_free; 429 struct sk_buff_head txq; 430 struct sk_buff_head txq_pend; 431 432 struct napi_struct napi; 433 434 struct delayed_work wq; 435 436 int msg_enable; 437 438 struct urb *urb_intr; 439 struct usb_anchor deferred; 440 441 struct mutex dev_mutex; /* serialise open/stop wrt suspend/resume */ 442 struct mutex mdiobus_mutex; /* for MDIO bus access */ 443 unsigned int pipe_in, pipe_out, pipe_intr; 444 445 unsigned int bulk_in_delay; 446 unsigned int burst_cap; 447 448 unsigned long flags; 449 450 wait_queue_head_t *wait; 451 452 unsigned int maxpacket; 453 struct timer_list stat_monitor; 454 455 unsigned long data[5]; 456 457 u32 chipid; 458 u32 chiprev; 459 struct mii_bus *mdiobus; 460 phy_interface_t interface; 461 462 int delta; 463 struct statstage stats; 464 465 struct irq_domain_data domain_data; 466 467 struct phylink *phylink; 468 struct phylink_config phylink_config; 469 }; 470 471 /* use ethtool to change the level for any given device */ 472 static int msg_level = -1; 473 module_param(msg_level, int, 0); 474 MODULE_PARM_DESC(msg_level, "Override default message level"); 475 476 static struct sk_buff *lan78xx_get_buf(struct sk_buff_head *buf_pool) 477 { 478 if (skb_queue_empty(buf_pool)) 479 return NULL; 480 481 return skb_dequeue(buf_pool); 482 } 483 484 static void lan78xx_release_buf(struct sk_buff_head *buf_pool, 485 struct sk_buff *buf) 486 { 487 buf->data = buf->head; 488 skb_reset_tail_pointer(buf); 489 490 buf->len = 0; 491 buf->data_len = 0; 492 493 skb_queue_tail(buf_pool, buf); 494 } 495 496 static void lan78xx_free_buf_pool(struct sk_buff_head *buf_pool) 497 { 498 struct skb_data *entry; 499 struct sk_buff *buf; 500 501 while (!skb_queue_empty(buf_pool)) { 502 buf = skb_dequeue(buf_pool); 503 if (buf) { 504 entry = (struct skb_data *)buf->cb; 505 usb_free_urb(entry->urb); 506 dev_kfree_skb_any(buf); 507 } 508 } 509 } 510 511 static int lan78xx_alloc_buf_pool(struct sk_buff_head *buf_pool, 512 size_t n_urbs, size_t urb_size, 513 struct lan78xx_net *dev) 514 { 515 struct skb_data *entry; 516 struct sk_buff *buf; 517 struct urb *urb; 518 int i; 519 520 skb_queue_head_init(buf_pool); 521 522 for (i = 0; i < n_urbs; i++) { 523 buf = alloc_skb(urb_size, GFP_ATOMIC); 524 if (!buf) 525 goto error; 526 527 if (skb_linearize(buf) != 0) { 528 dev_kfree_skb_any(buf); 529 goto error; 530 } 531 532 urb = usb_alloc_urb(0, GFP_ATOMIC); 533 if (!urb) { 534 dev_kfree_skb_any(buf); 535 goto error; 536 } 537 538 entry = (struct skb_data *)buf->cb; 539 entry->urb = urb; 540 entry->dev = dev; 541 entry->length = 0; 542 entry->num_of_packet = 0; 543 544 skb_queue_tail(buf_pool, buf); 545 } 546 547 return 0; 548 549 error: 550 lan78xx_free_buf_pool(buf_pool); 551 552 return -ENOMEM; 553 } 554 555 static struct sk_buff *lan78xx_get_rx_buf(struct lan78xx_net *dev) 556 { 557 return lan78xx_get_buf(&dev->rxq_free); 558 } 559 560 static void lan78xx_release_rx_buf(struct lan78xx_net *dev, 561 struct sk_buff *rx_buf) 562 { 563 lan78xx_release_buf(&dev->rxq_free, rx_buf); 564 } 565 566 static void lan78xx_free_rx_resources(struct lan78xx_net *dev) 567 { 568 lan78xx_free_buf_pool(&dev->rxq_free); 569 } 570 571 static int lan78xx_alloc_rx_resources(struct lan78xx_net *dev) 572 { 573 return lan78xx_alloc_buf_pool(&dev->rxq_free, 574 dev->n_rx_urbs, dev->rx_urb_size, dev); 575 } 576 577 static struct sk_buff *lan78xx_get_tx_buf(struct lan78xx_net *dev) 578 { 579 return lan78xx_get_buf(&dev->txq_free); 580 } 581 582 static void lan78xx_release_tx_buf(struct lan78xx_net *dev, 583 struct sk_buff *tx_buf) 584 { 585 lan78xx_release_buf(&dev->txq_free, tx_buf); 586 } 587 588 static void lan78xx_free_tx_resources(struct lan78xx_net *dev) 589 { 590 lan78xx_free_buf_pool(&dev->txq_free); 591 } 592 593 static int lan78xx_alloc_tx_resources(struct lan78xx_net *dev) 594 { 595 return lan78xx_alloc_buf_pool(&dev->txq_free, 596 dev->n_tx_urbs, dev->tx_urb_size, dev); 597 } 598 599 static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data) 600 { 601 u32 *buf; 602 int ret; 603 604 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 605 return -ENODEV; 606 607 buf = kmalloc(sizeof(u32), GFP_KERNEL); 608 if (!buf) 609 return -ENOMEM; 610 611 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 612 USB_VENDOR_REQUEST_READ_REGISTER, 613 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 614 0, index, buf, 4, USB_CTRL_GET_TIMEOUT); 615 if (likely(ret >= 0)) { 616 le32_to_cpus(buf); 617 *data = *buf; 618 } else if (net_ratelimit()) { 619 netdev_warn(dev->net, 620 "Failed to read register index 0x%08x. ret = %pe", 621 index, ERR_PTR(ret)); 622 } 623 624 kfree(buf); 625 626 return ret < 0 ? ret : 0; 627 } 628 629 static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data) 630 { 631 u32 *buf; 632 int ret; 633 634 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 635 return -ENODEV; 636 637 buf = kmalloc(sizeof(u32), GFP_KERNEL); 638 if (!buf) 639 return -ENOMEM; 640 641 *buf = data; 642 cpu_to_le32s(buf); 643 644 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 645 USB_VENDOR_REQUEST_WRITE_REGISTER, 646 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 647 0, index, buf, 4, USB_CTRL_SET_TIMEOUT); 648 if (unlikely(ret < 0) && 649 net_ratelimit()) { 650 netdev_warn(dev->net, 651 "Failed to write register index 0x%08x. ret = %pe", 652 index, ERR_PTR(ret)); 653 } 654 655 kfree(buf); 656 657 return ret < 0 ? ret : 0; 658 } 659 660 static int lan78xx_update_reg(struct lan78xx_net *dev, u32 reg, u32 mask, 661 u32 data) 662 { 663 int ret; 664 u32 buf; 665 666 ret = lan78xx_read_reg(dev, reg, &buf); 667 if (ret < 0) 668 return ret; 669 670 buf &= ~mask; 671 buf |= (mask & data); 672 673 return lan78xx_write_reg(dev, reg, buf); 674 } 675 676 static int lan78xx_read_stats(struct lan78xx_net *dev, 677 struct lan78xx_statstage *data) 678 { 679 int ret = 0; 680 int i; 681 struct lan78xx_statstage *stats; 682 u32 *src; 683 u32 *dst; 684 685 stats = kmalloc_obj(*stats); 686 if (!stats) 687 return -ENOMEM; 688 689 ret = usb_control_msg(dev->udev, 690 usb_rcvctrlpipe(dev->udev, 0), 691 USB_VENDOR_REQUEST_GET_STATS, 692 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 693 0, 694 0, 695 (void *)stats, 696 sizeof(*stats), 697 USB_CTRL_SET_TIMEOUT); 698 if (likely(ret >= 0)) { 699 src = (u32 *)stats; 700 dst = (u32 *)data; 701 for (i = 0; i < sizeof(*stats) / sizeof(u32); i++) { 702 le32_to_cpus(&src[i]); 703 dst[i] = src[i]; 704 } 705 } else { 706 netdev_warn(dev->net, 707 "Failed to read stat ret = %d", ret); 708 } 709 710 kfree(stats); 711 712 return ret; 713 } 714 715 #define check_counter_rollover(struct1, dev_stats, member) \ 716 do { \ 717 if ((struct1)->member < (dev_stats).saved.member) \ 718 (dev_stats).rollover_count.member++; \ 719 } while (0) 720 721 static void lan78xx_check_stat_rollover(struct lan78xx_net *dev, 722 struct lan78xx_statstage *stats) 723 { 724 check_counter_rollover(stats, dev->stats, rx_fcs_errors); 725 check_counter_rollover(stats, dev->stats, rx_alignment_errors); 726 check_counter_rollover(stats, dev->stats, rx_fragment_errors); 727 check_counter_rollover(stats, dev->stats, rx_jabber_errors); 728 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors); 729 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors); 730 check_counter_rollover(stats, dev->stats, rx_dropped_frames); 731 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count); 732 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count); 733 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count); 734 check_counter_rollover(stats, dev->stats, rx_unicast_frames); 735 check_counter_rollover(stats, dev->stats, rx_broadcast_frames); 736 check_counter_rollover(stats, dev->stats, rx_multicast_frames); 737 check_counter_rollover(stats, dev->stats, rx_pause_frames); 738 check_counter_rollover(stats, dev->stats, rx_64_byte_frames); 739 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames); 740 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames); 741 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames); 742 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames); 743 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames); 744 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames); 745 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions); 746 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time); 747 check_counter_rollover(stats, dev->stats, tx_fcs_errors); 748 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors); 749 check_counter_rollover(stats, dev->stats, tx_carrier_errors); 750 check_counter_rollover(stats, dev->stats, tx_bad_byte_count); 751 check_counter_rollover(stats, dev->stats, tx_single_collisions); 752 check_counter_rollover(stats, dev->stats, tx_multiple_collisions); 753 check_counter_rollover(stats, dev->stats, tx_excessive_collision); 754 check_counter_rollover(stats, dev->stats, tx_late_collisions); 755 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count); 756 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count); 757 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count); 758 check_counter_rollover(stats, dev->stats, tx_unicast_frames); 759 check_counter_rollover(stats, dev->stats, tx_broadcast_frames); 760 check_counter_rollover(stats, dev->stats, tx_multicast_frames); 761 check_counter_rollover(stats, dev->stats, tx_pause_frames); 762 check_counter_rollover(stats, dev->stats, tx_64_byte_frames); 763 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames); 764 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames); 765 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames); 766 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames); 767 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames); 768 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames); 769 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions); 770 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time); 771 772 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage)); 773 } 774 775 static void lan78xx_update_stats(struct lan78xx_net *dev) 776 { 777 u32 *p, *count, *max; 778 u64 *data; 779 int i; 780 struct lan78xx_statstage lan78xx_stats; 781 782 if (usb_autopm_get_interface(dev->intf) < 0) 783 return; 784 785 p = (u32 *)&lan78xx_stats; 786 count = (u32 *)&dev->stats.rollover_count; 787 max = (u32 *)&dev->stats.rollover_max; 788 data = (u64 *)&dev->stats.curr_stat; 789 790 mutex_lock(&dev->stats.access_lock); 791 792 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0) 793 lan78xx_check_stat_rollover(dev, &lan78xx_stats); 794 795 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++) 796 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1)); 797 798 mutex_unlock(&dev->stats.access_lock); 799 800 usb_autopm_put_interface(dev->intf); 801 } 802 803 static int lan78xx_start_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enable) 804 { 805 return lan78xx_update_reg(dev, reg, hw_enable, hw_enable); 806 } 807 808 static int lan78xx_stop_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enabled, 809 u32 hw_disabled) 810 { 811 unsigned long timeout; 812 bool stopped = true; 813 int ret; 814 u32 buf; 815 816 /* Stop the h/w block (if not already stopped) */ 817 818 ret = lan78xx_read_reg(dev, reg, &buf); 819 if (ret < 0) 820 return ret; 821 822 if (buf & hw_enabled) { 823 buf &= ~hw_enabled; 824 825 ret = lan78xx_write_reg(dev, reg, buf); 826 if (ret < 0) 827 return ret; 828 829 stopped = false; 830 timeout = jiffies + HW_DISABLE_TIMEOUT; 831 do { 832 ret = lan78xx_read_reg(dev, reg, &buf); 833 if (ret < 0) 834 return ret; 835 836 if (buf & hw_disabled) 837 stopped = true; 838 else 839 msleep(HW_DISABLE_DELAY_MS); 840 } while (!stopped && !time_after(jiffies, timeout)); 841 } 842 843 return stopped ? 0 : -ETIMEDOUT; 844 } 845 846 static int lan78xx_flush_fifo(struct lan78xx_net *dev, u32 reg, u32 fifo_flush) 847 { 848 return lan78xx_update_reg(dev, reg, fifo_flush, fifo_flush); 849 } 850 851 static int lan78xx_start_tx_path(struct lan78xx_net *dev) 852 { 853 int ret; 854 855 netif_dbg(dev, drv, dev->net, "start tx path"); 856 857 /* Start the MAC transmitter */ 858 859 ret = lan78xx_start_hw(dev, MAC_TX, MAC_TX_TXEN_); 860 if (ret < 0) 861 return ret; 862 863 /* Start the Tx FIFO */ 864 865 ret = lan78xx_start_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_); 866 if (ret < 0) 867 return ret; 868 869 return 0; 870 } 871 872 static int lan78xx_stop_tx_path(struct lan78xx_net *dev) 873 { 874 int ret; 875 876 netif_dbg(dev, drv, dev->net, "stop tx path"); 877 878 /* Stop the Tx FIFO */ 879 880 ret = lan78xx_stop_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_, FCT_TX_CTL_DIS_); 881 if (ret < 0) 882 return ret; 883 884 /* Stop the MAC transmitter */ 885 886 ret = lan78xx_stop_hw(dev, MAC_TX, MAC_TX_TXEN_, MAC_TX_TXD_); 887 if (ret < 0) 888 return ret; 889 890 return 0; 891 } 892 893 /* The caller must ensure the Tx path is stopped before calling 894 * lan78xx_flush_tx_fifo(). 895 */ 896 static int lan78xx_flush_tx_fifo(struct lan78xx_net *dev) 897 { 898 return lan78xx_flush_fifo(dev, FCT_TX_CTL, FCT_TX_CTL_RST_); 899 } 900 901 static int lan78xx_start_rx_path(struct lan78xx_net *dev) 902 { 903 int ret; 904 905 netif_dbg(dev, drv, dev->net, "start rx path"); 906 907 /* Start the Rx FIFO */ 908 909 ret = lan78xx_start_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_); 910 if (ret < 0) 911 return ret; 912 913 /* Start the MAC receiver*/ 914 915 ret = lan78xx_start_hw(dev, MAC_RX, MAC_RX_RXEN_); 916 if (ret < 0) 917 return ret; 918 919 return 0; 920 } 921 922 static int lan78xx_stop_rx_path(struct lan78xx_net *dev) 923 { 924 int ret; 925 926 netif_dbg(dev, drv, dev->net, "stop rx path"); 927 928 /* Stop the MAC receiver */ 929 930 ret = lan78xx_stop_hw(dev, MAC_RX, MAC_RX_RXEN_, MAC_RX_RXD_); 931 if (ret < 0) 932 return ret; 933 934 /* Stop the Rx FIFO */ 935 936 ret = lan78xx_stop_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_, FCT_RX_CTL_DIS_); 937 if (ret < 0) 938 return ret; 939 940 return 0; 941 } 942 943 /* The caller must ensure the Rx path is stopped before calling 944 * lan78xx_flush_rx_fifo(). 945 */ 946 static int lan78xx_flush_rx_fifo(struct lan78xx_net *dev) 947 { 948 return lan78xx_flush_fifo(dev, FCT_RX_CTL, FCT_RX_CTL_RST_); 949 } 950 951 /* Loop until the read is completed with timeout called with mdiobus_mutex held */ 952 static int lan78xx_mdiobus_wait_not_busy(struct lan78xx_net *dev) 953 { 954 unsigned long start_time = jiffies; 955 u32 val; 956 int ret; 957 958 do { 959 ret = lan78xx_read_reg(dev, MII_ACC, &val); 960 if (ret < 0) 961 return ret; 962 963 if (!(val & MII_ACC_MII_BUSY_)) 964 return 0; 965 } while (!time_after(jiffies, start_time + HZ)); 966 967 return -ETIMEDOUT; 968 } 969 970 static inline u32 mii_access(int id, int index, int read) 971 { 972 u32 ret; 973 974 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_; 975 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_; 976 if (read) 977 ret |= MII_ACC_MII_READ_; 978 else 979 ret |= MII_ACC_MII_WRITE_; 980 ret |= MII_ACC_MII_BUSY_; 981 982 return ret; 983 } 984 985 static int lan78xx_wait_eeprom(struct lan78xx_net *dev) 986 { 987 unsigned long start_time = jiffies; 988 u32 val; 989 int ret; 990 991 do { 992 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 993 if (ret < 0) 994 return ret; 995 996 if (!(val & E2P_CMD_EPC_BUSY_) || 997 (val & E2P_CMD_EPC_TIMEOUT_)) 998 break; 999 usleep_range(40, 100); 1000 } while (!time_after(jiffies, start_time + HZ)); 1001 1002 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) { 1003 netdev_warn(dev->net, "EEPROM read operation timeout"); 1004 return -ETIMEDOUT; 1005 } 1006 1007 return 0; 1008 } 1009 1010 static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev) 1011 { 1012 unsigned long start_time = jiffies; 1013 u32 val; 1014 int ret; 1015 1016 do { 1017 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 1018 if (ret < 0) 1019 return ret; 1020 1021 if (!(val & E2P_CMD_EPC_BUSY_)) 1022 return 0; 1023 1024 usleep_range(40, 100); 1025 } while (!time_after(jiffies, start_time + HZ)); 1026 1027 netdev_warn(dev->net, "EEPROM is busy"); 1028 return -ETIMEDOUT; 1029 } 1030 1031 static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset, 1032 u32 length, u8 *data) 1033 { 1034 u32 val, saved; 1035 int i, ret; 1036 1037 /* depends on chip, some EEPROM pins are muxed with LED function. 1038 * disable & restore LED function to access EEPROM. 1039 */ 1040 ret = lan78xx_read_reg(dev, HW_CFG, &val); 1041 if (ret < 0) 1042 return ret; 1043 1044 saved = val; 1045 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1046 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 1047 ret = lan78xx_write_reg(dev, HW_CFG, val); 1048 if (ret < 0) 1049 return ret; 1050 } 1051 1052 ret = lan78xx_eeprom_confirm_not_busy(dev); 1053 if (ret == -ETIMEDOUT) 1054 goto read_raw_eeprom_done; 1055 /* If USB fails, there is nothing to do */ 1056 if (ret < 0) 1057 return ret; 1058 1059 for (i = 0; i < length; i++) { 1060 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_; 1061 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 1062 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1063 if (ret < 0) 1064 return ret; 1065 1066 ret = lan78xx_wait_eeprom(dev); 1067 /* Looks like not USB specific error, try to recover */ 1068 if (ret == -ETIMEDOUT) 1069 goto read_raw_eeprom_done; 1070 /* If USB fails, there is nothing to do */ 1071 if (ret < 0) 1072 return ret; 1073 1074 ret = lan78xx_read_reg(dev, E2P_DATA, &val); 1075 if (ret < 0) 1076 return ret; 1077 1078 data[i] = val & 0xFF; 1079 offset++; 1080 } 1081 1082 read_raw_eeprom_done: 1083 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1084 int rc = lan78xx_write_reg(dev, HW_CFG, saved); 1085 /* If USB fails, there is nothing to do */ 1086 if (rc < 0) 1087 return rc; 1088 } 1089 return ret; 1090 } 1091 1092 static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset, 1093 u32 length, u8 *data) 1094 { 1095 int ret; 1096 u8 sig; 1097 1098 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig); 1099 if (ret < 0) 1100 return ret; 1101 1102 if (sig != EEPROM_INDICATOR) 1103 return -ENODATA; 1104 1105 return lan78xx_read_raw_eeprom(dev, offset, length, data); 1106 } 1107 1108 static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset, 1109 u32 length, u8 *data) 1110 { 1111 u32 val; 1112 u32 saved; 1113 int i, ret; 1114 1115 /* depends on chip, some EEPROM pins are muxed with LED function. 1116 * disable & restore LED function to access EEPROM. 1117 */ 1118 ret = lan78xx_read_reg(dev, HW_CFG, &val); 1119 if (ret < 0) 1120 return ret; 1121 1122 saved = val; 1123 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1124 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 1125 ret = lan78xx_write_reg(dev, HW_CFG, val); 1126 if (ret < 0) 1127 return ret; 1128 } 1129 1130 ret = lan78xx_eeprom_confirm_not_busy(dev); 1131 /* Looks like not USB specific error, try to recover */ 1132 if (ret == -ETIMEDOUT) 1133 goto write_raw_eeprom_done; 1134 /* If USB fails, there is nothing to do */ 1135 if (ret < 0) 1136 return ret; 1137 1138 /* Issue write/erase enable command */ 1139 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_; 1140 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1141 if (ret < 0) 1142 return ret; 1143 1144 ret = lan78xx_wait_eeprom(dev); 1145 /* Looks like not USB specific error, try to recover */ 1146 if (ret == -ETIMEDOUT) 1147 goto write_raw_eeprom_done; 1148 /* If USB fails, there is nothing to do */ 1149 if (ret < 0) 1150 return ret; 1151 1152 for (i = 0; i < length; i++) { 1153 /* Fill data register */ 1154 val = data[i]; 1155 ret = lan78xx_write_reg(dev, E2P_DATA, val); 1156 if (ret < 0) 1157 return ret; 1158 1159 /* Send "write" command */ 1160 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_; 1161 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 1162 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1163 if (ret < 0) 1164 return ret; 1165 1166 ret = lan78xx_wait_eeprom(dev); 1167 /* Looks like not USB specific error, try to recover */ 1168 if (ret == -ETIMEDOUT) 1169 goto write_raw_eeprom_done; 1170 /* If USB fails, there is nothing to do */ 1171 if (ret < 0) 1172 return ret; 1173 1174 offset++; 1175 } 1176 1177 write_raw_eeprom_done: 1178 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1179 int rc = lan78xx_write_reg(dev, HW_CFG, saved); 1180 /* If USB fails, there is nothing to do */ 1181 if (rc < 0) 1182 return rc; 1183 } 1184 return ret; 1185 } 1186 1187 static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset, 1188 u32 length, u8 *data) 1189 { 1190 unsigned long timeout; 1191 int ret, i; 1192 u32 buf; 1193 1194 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1195 if (ret < 0) 1196 return ret; 1197 1198 if (buf & OTP_PWR_DN_PWRDN_N_) { 1199 /* clear it and wait to be cleared */ 1200 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1201 if (ret < 0) 1202 return ret; 1203 1204 timeout = jiffies + HZ; 1205 do { 1206 usleep_range(1, 10); 1207 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1208 if (ret < 0) 1209 return ret; 1210 1211 if (time_after(jiffies, timeout)) { 1212 netdev_warn(dev->net, 1213 "timeout on OTP_PWR_DN"); 1214 return -ETIMEDOUT; 1215 } 1216 } while (buf & OTP_PWR_DN_PWRDN_N_); 1217 } 1218 1219 for (i = 0; i < length; i++) { 1220 ret = lan78xx_write_reg(dev, OTP_ADDR1, 1221 ((offset + i) >> 8) & OTP_ADDR1_15_11); 1222 if (ret < 0) 1223 return ret; 1224 1225 ret = lan78xx_write_reg(dev, OTP_ADDR2, 1226 ((offset + i) & OTP_ADDR2_10_3)); 1227 if (ret < 0) 1228 return ret; 1229 1230 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 1231 if (ret < 0) 1232 return ret; 1233 1234 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1235 if (ret < 0) 1236 return ret; 1237 1238 timeout = jiffies + HZ; 1239 do { 1240 udelay(1); 1241 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf); 1242 if (ret < 0) 1243 return ret; 1244 1245 if (time_after(jiffies, timeout)) { 1246 netdev_warn(dev->net, 1247 "timeout on OTP_STATUS"); 1248 return -ETIMEDOUT; 1249 } 1250 } while (buf & OTP_STATUS_BUSY_); 1251 1252 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf); 1253 if (ret < 0) 1254 return ret; 1255 1256 data[i] = (u8)(buf & 0xFF); 1257 } 1258 1259 return 0; 1260 } 1261 1262 static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset, 1263 u32 length, u8 *data) 1264 { 1265 int i; 1266 u32 buf; 1267 unsigned long timeout; 1268 int ret; 1269 1270 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1271 if (ret < 0) 1272 return ret; 1273 1274 if (buf & OTP_PWR_DN_PWRDN_N_) { 1275 /* clear it and wait to be cleared */ 1276 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1277 if (ret < 0) 1278 return ret; 1279 1280 timeout = jiffies + HZ; 1281 do { 1282 udelay(1); 1283 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1284 if (ret < 0) 1285 return ret; 1286 1287 if (time_after(jiffies, timeout)) { 1288 netdev_warn(dev->net, 1289 "timeout on OTP_PWR_DN completion"); 1290 return -ETIMEDOUT; 1291 } 1292 } while (buf & OTP_PWR_DN_PWRDN_N_); 1293 } 1294 1295 /* set to BYTE program mode */ 1296 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_); 1297 if (ret < 0) 1298 return ret; 1299 1300 for (i = 0; i < length; i++) { 1301 ret = lan78xx_write_reg(dev, OTP_ADDR1, 1302 ((offset + i) >> 8) & OTP_ADDR1_15_11); 1303 if (ret < 0) 1304 return ret; 1305 1306 ret = lan78xx_write_reg(dev, OTP_ADDR2, 1307 ((offset + i) & OTP_ADDR2_10_3)); 1308 if (ret < 0) 1309 return ret; 1310 1311 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]); 1312 if (ret < 0) 1313 return ret; 1314 1315 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_); 1316 if (ret < 0) 1317 return ret; 1318 1319 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1320 if (ret < 0) 1321 return ret; 1322 1323 timeout = jiffies + HZ; 1324 do { 1325 udelay(1); 1326 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf); 1327 if (ret < 0) 1328 return ret; 1329 1330 if (time_after(jiffies, timeout)) { 1331 netdev_warn(dev->net, 1332 "Timeout on OTP_STATUS completion"); 1333 return -ETIMEDOUT; 1334 } 1335 } while (buf & OTP_STATUS_BUSY_); 1336 } 1337 1338 return 0; 1339 } 1340 1341 static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset, 1342 u32 length, u8 *data) 1343 { 1344 u8 sig; 1345 int ret; 1346 1347 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig); 1348 1349 if (ret == 0) { 1350 if (sig == OTP_INDICATOR_2) 1351 offset += 0x100; 1352 else if (sig != OTP_INDICATOR_1) 1353 ret = -EINVAL; 1354 if (!ret) 1355 ret = lan78xx_read_raw_otp(dev, offset, length, data); 1356 } 1357 1358 return ret; 1359 } 1360 1361 static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev) 1362 { 1363 int i, ret; 1364 1365 for (i = 0; i < 100; i++) { 1366 u32 dp_sel; 1367 1368 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel); 1369 if (unlikely(ret < 0)) 1370 return ret; 1371 1372 if (dp_sel & DP_SEL_DPRDY_) 1373 return 0; 1374 1375 usleep_range(40, 100); 1376 } 1377 1378 netdev_warn(dev->net, "%s timed out", __func__); 1379 1380 return -ETIMEDOUT; 1381 } 1382 1383 static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select, 1384 u32 addr, u32 length, u32 *buf) 1385 { 1386 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1387 int i, ret; 1388 1389 ret = usb_autopm_get_interface(dev->intf); 1390 if (ret < 0) 1391 return ret; 1392 1393 mutex_lock(&pdata->dataport_mutex); 1394 1395 ret = lan78xx_dataport_wait_not_busy(dev); 1396 if (ret < 0) 1397 goto dataport_write; 1398 1399 ret = lan78xx_update_reg(dev, DP_SEL, DP_SEL_RSEL_MASK_, ram_select); 1400 if (ret < 0) 1401 goto dataport_write; 1402 1403 for (i = 0; i < length; i++) { 1404 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i); 1405 if (ret < 0) 1406 goto dataport_write; 1407 1408 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]); 1409 if (ret < 0) 1410 goto dataport_write; 1411 1412 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_); 1413 if (ret < 0) 1414 goto dataport_write; 1415 1416 ret = lan78xx_dataport_wait_not_busy(dev); 1417 if (ret < 0) 1418 goto dataport_write; 1419 } 1420 1421 dataport_write: 1422 if (ret < 0) 1423 netdev_warn(dev->net, "dataport write failed %pe", ERR_PTR(ret)); 1424 1425 mutex_unlock(&pdata->dataport_mutex); 1426 usb_autopm_put_interface(dev->intf); 1427 1428 return ret; 1429 } 1430 1431 static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata, 1432 int index, u8 addr[ETH_ALEN]) 1433 { 1434 u32 temp; 1435 1436 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) { 1437 temp = addr[3]; 1438 temp = addr[2] | (temp << 8); 1439 temp = addr[1] | (temp << 8); 1440 temp = addr[0] | (temp << 8); 1441 pdata->pfilter_table[index][1] = temp; 1442 temp = addr[5]; 1443 temp = addr[4] | (temp << 8); 1444 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_; 1445 pdata->pfilter_table[index][0] = temp; 1446 } 1447 } 1448 1449 /* returns hash bit number for given MAC address */ 1450 static inline u32 lan78xx_hash(char addr[ETH_ALEN]) 1451 { 1452 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; 1453 } 1454 1455 static int lan78xx_write_mchash_table(struct lan78xx_net *dev) 1456 { 1457 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1458 1459 return lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 1460 DP_SEL_VHF_VLAN_LEN, 1461 DP_SEL_VHF_HASH_LEN, pdata->mchash_table); 1462 } 1463 1464 static void lan78xx_deferred_multicast_write(struct work_struct *param) 1465 { 1466 struct lan78xx_priv *pdata = 1467 container_of(param, struct lan78xx_priv, set_multicast); 1468 struct lan78xx_net *dev = pdata->dev; 1469 int i, ret; 1470 1471 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n", 1472 pdata->rfe_ctl); 1473 1474 ret = lan78xx_write_mchash_table(dev); 1475 if (ret < 0) 1476 goto multicast_write_done; 1477 1478 for (i = 1; i < NUM_OF_MAF; i++) { 1479 ret = lan78xx_write_reg(dev, MAF_HI(i), 0); 1480 if (ret < 0) 1481 goto multicast_write_done; 1482 1483 ret = lan78xx_write_reg(dev, MAF_LO(i), 1484 pdata->pfilter_table[i][1]); 1485 if (ret < 0) 1486 goto multicast_write_done; 1487 1488 ret = lan78xx_write_reg(dev, MAF_HI(i), 1489 pdata->pfilter_table[i][0]); 1490 if (ret < 0) 1491 goto multicast_write_done; 1492 } 1493 1494 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 1495 1496 multicast_write_done: 1497 if (ret < 0) 1498 netdev_warn(dev->net, "multicast write failed %pe", ERR_PTR(ret)); 1499 return; 1500 } 1501 1502 static void lan78xx_update_vlan_filter(struct lan78xx_priv *pdata, 1503 struct net_device *netdev, 1504 netdev_features_t features) 1505 { 1506 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && 1507 !(netdev->flags & IFF_PROMISC)) 1508 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_; 1509 else 1510 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_; 1511 } 1512 1513 static void lan78xx_set_multicast(struct net_device *netdev) 1514 { 1515 struct lan78xx_net *dev = netdev_priv(netdev); 1516 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1517 unsigned long flags; 1518 int i; 1519 1520 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 1521 1522 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ | 1523 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1524 1525 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) 1526 pdata->mchash_table[i] = 0; 1527 1528 /* pfilter_table[0] has own HW address */ 1529 for (i = 1; i < NUM_OF_MAF; i++) { 1530 pdata->pfilter_table[i][0] = 0; 1531 pdata->pfilter_table[i][1] = 0; 1532 } 1533 1534 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_; 1535 1536 if (dev->net->flags & IFF_PROMISC) { 1537 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled"); 1538 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_; 1539 } else { 1540 if (dev->net->flags & IFF_ALLMULTI) { 1541 netif_dbg(dev, drv, dev->net, 1542 "receive all multicast enabled"); 1543 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_; 1544 } 1545 } 1546 1547 lan78xx_update_vlan_filter(pdata, dev->net, dev->net->features); 1548 1549 if (netdev_mc_count(dev->net)) { 1550 struct netdev_hw_addr *ha; 1551 int i; 1552 1553 netif_dbg(dev, drv, dev->net, "receive multicast hash filter"); 1554 1555 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_; 1556 1557 i = 1; 1558 netdev_for_each_mc_addr(ha, netdev) { 1559 /* set first 32 into Perfect Filter */ 1560 if (i < 33) { 1561 lan78xx_set_addr_filter(pdata, i, ha->addr); 1562 } else { 1563 u32 bitnum = lan78xx_hash(ha->addr); 1564 1565 pdata->mchash_table[bitnum / 32] |= 1566 (1 << (bitnum % 32)); 1567 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_; 1568 } 1569 i++; 1570 } 1571 } 1572 1573 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 1574 1575 /* defer register writes to a sleepable context */ 1576 schedule_work(&pdata->set_multicast); 1577 } 1578 1579 static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev); 1580 static int lan78xx_write_vlan_table(struct lan78xx_net *dev); 1581 1582 static int lan78xx_mac_reset(struct lan78xx_net *dev) 1583 { 1584 unsigned long start_time = jiffies; 1585 u32 val; 1586 int ret; 1587 1588 mutex_lock(&dev->mdiobus_mutex); 1589 1590 /* Resetting the device while there is activity on the MDIO 1591 * bus can result in the MAC interface locking up and not 1592 * completing register access transactions. 1593 */ 1594 ret = lan78xx_mdiobus_wait_not_busy(dev); 1595 if (ret < 0) 1596 goto exit_unlock; 1597 1598 ret = lan78xx_read_reg(dev, MAC_CR, &val); 1599 if (ret < 0) 1600 goto exit_unlock; 1601 1602 val |= MAC_CR_RST_; 1603 ret = lan78xx_write_reg(dev, MAC_CR, val); 1604 if (ret < 0) 1605 goto exit_unlock; 1606 1607 /* Wait for the reset to complete before allowing any further 1608 * MAC register accesses otherwise the MAC may lock up. 1609 */ 1610 do { 1611 ret = lan78xx_read_reg(dev, MAC_CR, &val); 1612 if (ret < 0) 1613 goto exit_unlock; 1614 1615 if (!(val & MAC_CR_RST_)) { 1616 ret = 0; 1617 goto exit_unlock; 1618 } 1619 } while (!time_after(jiffies, start_time + HZ)); 1620 1621 ret = -ETIMEDOUT; 1622 exit_unlock: 1623 mutex_unlock(&dev->mdiobus_mutex); 1624 1625 return ret; 1626 } 1627 1628 /** 1629 * lan78xx_phy_int_ack - Acknowledge PHY interrupt 1630 * @dev: pointer to the LAN78xx device structure 1631 * 1632 * This function acknowledges the PHY interrupt by setting the 1633 * INT_STS_PHY_INT_ bit in the interrupt status register (INT_STS). 1634 * 1635 * Return: 0 on success or a negative error code on failure. 1636 */ 1637 static int lan78xx_phy_int_ack(struct lan78xx_net *dev) 1638 { 1639 return lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_); 1640 } 1641 1642 /* some work can't be done in tasklets, so we use keventd 1643 * 1644 * NOTE: annoying asymmetry: if it's active, schedule_work() fails, 1645 * but tasklet_schedule() doesn't. hope the failure is rare. 1646 */ 1647 static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work) 1648 { 1649 set_bit(work, &dev->flags); 1650 if (!schedule_delayed_work(&dev->wq, 0)) 1651 netdev_err(dev->net, "kevent %d may have been dropped\n", work); 1652 } 1653 1654 static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb) 1655 { 1656 u32 intdata; 1657 1658 if (urb->actual_length != 4) { 1659 netdev_warn(dev->net, 1660 "unexpected urb length %d", urb->actual_length); 1661 return; 1662 } 1663 1664 intdata = get_unaligned_le32(urb->transfer_buffer); 1665 1666 if (intdata & INT_ENP_PHY_INT) { 1667 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata); 1668 lan78xx_defer_kevent(dev, EVENT_PHY_INT_ACK); 1669 1670 if (dev->domain_data.phyirq > 0) 1671 generic_handle_irq_safe(dev->domain_data.phyirq); 1672 } else { 1673 netdev_warn(dev->net, 1674 "unexpected interrupt: 0x%08x\n", intdata); 1675 } 1676 } 1677 1678 static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev) 1679 { 1680 return MAX_EEPROM_SIZE; 1681 } 1682 1683 static int lan78xx_ethtool_get_eeprom(struct net_device *netdev, 1684 struct ethtool_eeprom *ee, u8 *data) 1685 { 1686 struct lan78xx_net *dev = netdev_priv(netdev); 1687 int ret; 1688 1689 ret = usb_autopm_get_interface(dev->intf); 1690 if (ret) 1691 return ret; 1692 1693 ee->magic = LAN78XX_EEPROM_MAGIC; 1694 1695 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data); 1696 1697 usb_autopm_put_interface(dev->intf); 1698 1699 return ret; 1700 } 1701 1702 static int lan78xx_ethtool_set_eeprom(struct net_device *netdev, 1703 struct ethtool_eeprom *ee, u8 *data) 1704 { 1705 struct lan78xx_net *dev = netdev_priv(netdev); 1706 int ret; 1707 1708 ret = usb_autopm_get_interface(dev->intf); 1709 if (ret) 1710 return ret; 1711 1712 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure 1713 * to load data from EEPROM 1714 */ 1715 if (ee->magic == LAN78XX_EEPROM_MAGIC) { 1716 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data); 1717 } else if ((ee->magic == LAN78XX_OTP_MAGIC) && 1718 (ee->offset == 0) && 1719 (ee->len == 512) && 1720 (data[0] == OTP_INDICATOR_1)) { 1721 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data); 1722 } else { 1723 ret = -EINVAL; 1724 } 1725 1726 usb_autopm_put_interface(dev->intf); 1727 1728 return ret; 1729 } 1730 1731 static void lan78xx_get_strings(struct net_device *netdev, u32 stringset, 1732 u8 *data) 1733 { 1734 if (stringset == ETH_SS_STATS) 1735 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings)); 1736 else if (stringset == ETH_SS_TEST) 1737 net_selftest_get_strings(data); 1738 } 1739 1740 static int lan78xx_get_sset_count(struct net_device *netdev, int sset) 1741 { 1742 if (sset == ETH_SS_STATS) 1743 return ARRAY_SIZE(lan78xx_gstrings); 1744 else if (sset == ETH_SS_TEST) 1745 return net_selftest_get_count(); 1746 else 1747 return -EOPNOTSUPP; 1748 } 1749 1750 static void lan78xx_get_stats(struct net_device *netdev, 1751 struct ethtool_stats *stats, u64 *data) 1752 { 1753 struct lan78xx_net *dev = netdev_priv(netdev); 1754 1755 lan78xx_update_stats(dev); 1756 1757 mutex_lock(&dev->stats.access_lock); 1758 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat)); 1759 mutex_unlock(&dev->stats.access_lock); 1760 } 1761 1762 static void lan78xx_get_wol(struct net_device *netdev, 1763 struct ethtool_wolinfo *wol) 1764 { 1765 struct lan78xx_net *dev = netdev_priv(netdev); 1766 int ret; 1767 u32 buf; 1768 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1769 1770 if (usb_autopm_get_interface(dev->intf) < 0) 1771 return; 1772 1773 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 1774 if (unlikely(ret < 0)) { 1775 netdev_warn(dev->net, "failed to get WoL %pe", ERR_PTR(ret)); 1776 wol->supported = 0; 1777 wol->wolopts = 0; 1778 } else { 1779 if (buf & USB_CFG_RMT_WKP_) { 1780 wol->supported = WAKE_ALL; 1781 wol->wolopts = pdata->wol; 1782 } else { 1783 wol->supported = 0; 1784 wol->wolopts = 0; 1785 } 1786 } 1787 1788 usb_autopm_put_interface(dev->intf); 1789 } 1790 1791 static int lan78xx_set_wol(struct net_device *netdev, 1792 struct ethtool_wolinfo *wol) 1793 { 1794 struct lan78xx_net *dev = netdev_priv(netdev); 1795 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1796 int ret; 1797 1798 if (wol->wolopts & ~WAKE_ALL) 1799 return -EINVAL; 1800 1801 ret = usb_autopm_get_interface(dev->intf); 1802 if (ret < 0) 1803 return ret; 1804 1805 pdata->wol = wol->wolopts; 1806 1807 ret = device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts); 1808 if (ret < 0) 1809 goto exit_pm_put; 1810 1811 ret = phy_ethtool_set_wol(netdev->phydev, wol); 1812 1813 exit_pm_put: 1814 usb_autopm_put_interface(dev->intf); 1815 1816 return ret; 1817 } 1818 1819 static int lan78xx_get_eee(struct net_device *net, struct ethtool_keee *edata) 1820 { 1821 struct lan78xx_net *dev = netdev_priv(net); 1822 1823 return phylink_ethtool_get_eee(dev->phylink, edata); 1824 } 1825 1826 static int lan78xx_set_eee(struct net_device *net, struct ethtool_keee *edata) 1827 { 1828 struct lan78xx_net *dev = netdev_priv(net); 1829 1830 return phylink_ethtool_set_eee(dev->phylink, edata); 1831 } 1832 1833 static void lan78xx_get_drvinfo(struct net_device *net, 1834 struct ethtool_drvinfo *info) 1835 { 1836 struct lan78xx_net *dev = netdev_priv(net); 1837 1838 strscpy(info->driver, DRIVER_NAME, sizeof(info->driver)); 1839 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info)); 1840 } 1841 1842 static u32 lan78xx_get_msglevel(struct net_device *net) 1843 { 1844 struct lan78xx_net *dev = netdev_priv(net); 1845 1846 return dev->msg_enable; 1847 } 1848 1849 static void lan78xx_set_msglevel(struct net_device *net, u32 level) 1850 { 1851 struct lan78xx_net *dev = netdev_priv(net); 1852 1853 dev->msg_enable = level; 1854 } 1855 1856 static int lan78xx_get_link_ksettings(struct net_device *net, 1857 struct ethtool_link_ksettings *cmd) 1858 { 1859 struct lan78xx_net *dev = netdev_priv(net); 1860 1861 return phylink_ethtool_ksettings_get(dev->phylink, cmd); 1862 } 1863 1864 static int lan78xx_set_link_ksettings(struct net_device *net, 1865 const struct ethtool_link_ksettings *cmd) 1866 { 1867 struct lan78xx_net *dev = netdev_priv(net); 1868 1869 return phylink_ethtool_ksettings_set(dev->phylink, cmd); 1870 } 1871 1872 static void lan78xx_get_pause(struct net_device *net, 1873 struct ethtool_pauseparam *pause) 1874 { 1875 struct lan78xx_net *dev = netdev_priv(net); 1876 1877 phylink_ethtool_get_pauseparam(dev->phylink, pause); 1878 } 1879 1880 static int lan78xx_set_pause(struct net_device *net, 1881 struct ethtool_pauseparam *pause) 1882 { 1883 struct lan78xx_net *dev = netdev_priv(net); 1884 1885 return phylink_ethtool_set_pauseparam(dev->phylink, pause); 1886 } 1887 1888 static int lan78xx_get_regs_len(struct net_device *netdev) 1889 { 1890 return sizeof(lan78xx_regs); 1891 } 1892 1893 static void 1894 lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1895 void *buf) 1896 { 1897 struct lan78xx_net *dev = netdev_priv(netdev); 1898 unsigned int data_count = 0; 1899 u32 *data = buf; 1900 int i, ret; 1901 1902 /* Read Device/MAC registers */ 1903 for (i = 0; i < ARRAY_SIZE(lan78xx_regs); i++) { 1904 ret = lan78xx_read_reg(dev, lan78xx_regs[i], &data[i]); 1905 if (ret < 0) { 1906 netdev_warn(dev->net, 1907 "failed to read register 0x%08x\n", 1908 lan78xx_regs[i]); 1909 goto clean_data; 1910 } 1911 1912 data_count++; 1913 } 1914 1915 return; 1916 1917 clean_data: 1918 memset(data, 0, data_count * sizeof(u32)); 1919 } 1920 1921 static const struct ethtool_ops lan78xx_ethtool_ops = { 1922 .get_link = ethtool_op_get_link, 1923 .nway_reset = phy_ethtool_nway_reset, 1924 .get_drvinfo = lan78xx_get_drvinfo, 1925 .get_msglevel = lan78xx_get_msglevel, 1926 .set_msglevel = lan78xx_set_msglevel, 1927 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len, 1928 .get_eeprom = lan78xx_ethtool_get_eeprom, 1929 .set_eeprom = lan78xx_ethtool_set_eeprom, 1930 .get_ethtool_stats = lan78xx_get_stats, 1931 .get_sset_count = lan78xx_get_sset_count, 1932 .self_test = net_selftest, 1933 .get_strings = lan78xx_get_strings, 1934 .get_wol = lan78xx_get_wol, 1935 .set_wol = lan78xx_set_wol, 1936 .get_ts_info = ethtool_op_get_ts_info, 1937 .get_eee = lan78xx_get_eee, 1938 .set_eee = lan78xx_set_eee, 1939 .get_pauseparam = lan78xx_get_pause, 1940 .set_pauseparam = lan78xx_set_pause, 1941 .get_link_ksettings = lan78xx_get_link_ksettings, 1942 .set_link_ksettings = lan78xx_set_link_ksettings, 1943 .get_regs_len = lan78xx_get_regs_len, 1944 .get_regs = lan78xx_get_regs, 1945 }; 1946 1947 static int lan78xx_init_mac_address(struct lan78xx_net *dev) 1948 { 1949 u32 addr_lo, addr_hi; 1950 u8 addr[6]; 1951 int ret; 1952 1953 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo); 1954 if (ret < 0) 1955 return ret; 1956 1957 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi); 1958 if (ret < 0) 1959 return ret; 1960 1961 addr[0] = addr_lo & 0xFF; 1962 addr[1] = (addr_lo >> 8) & 0xFF; 1963 addr[2] = (addr_lo >> 16) & 0xFF; 1964 addr[3] = (addr_lo >> 24) & 0xFF; 1965 addr[4] = addr_hi & 0xFF; 1966 addr[5] = (addr_hi >> 8) & 0xFF; 1967 1968 if (!is_valid_ether_addr(addr)) { 1969 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) { 1970 /* valid address present in Device Tree */ 1971 netif_dbg(dev, ifup, dev->net, 1972 "MAC address read from Device Tree"); 1973 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET, 1974 ETH_ALEN, addr) == 0) || 1975 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET, 1976 ETH_ALEN, addr) == 0)) && 1977 is_valid_ether_addr(addr)) { 1978 /* eeprom values are valid so use them */ 1979 netif_dbg(dev, ifup, dev->net, 1980 "MAC address read from EEPROM"); 1981 } else { 1982 /* generate random MAC */ 1983 eth_random_addr(addr); 1984 netif_dbg(dev, ifup, dev->net, 1985 "MAC address set to random addr"); 1986 } 1987 1988 addr_lo = addr[0] | (addr[1] << 8) | 1989 (addr[2] << 16) | (addr[3] << 24); 1990 addr_hi = addr[4] | (addr[5] << 8); 1991 1992 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 1993 if (ret < 0) 1994 return ret; 1995 1996 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 1997 if (ret < 0) 1998 return ret; 1999 } 2000 2001 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 2002 if (ret < 0) 2003 return ret; 2004 2005 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 2006 if (ret < 0) 2007 return ret; 2008 2009 eth_hw_addr_set(dev->net, addr); 2010 2011 return 0; 2012 } 2013 2014 /* MDIO read and write wrappers for phylib */ 2015 static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx) 2016 { 2017 struct lan78xx_net *dev = bus->priv; 2018 u32 val, addr; 2019 int ret; 2020 2021 ret = usb_autopm_get_interface(dev->intf); 2022 if (ret < 0) 2023 return ret; 2024 2025 mutex_lock(&dev->mdiobus_mutex); 2026 2027 /* confirm MII not busy */ 2028 ret = lan78xx_mdiobus_wait_not_busy(dev); 2029 if (ret < 0) 2030 goto done; 2031 2032 /* set the address, index & direction (read from PHY) */ 2033 addr = mii_access(phy_id, idx, MII_READ); 2034 ret = lan78xx_write_reg(dev, MII_ACC, addr); 2035 if (ret < 0) 2036 goto done; 2037 2038 ret = lan78xx_mdiobus_wait_not_busy(dev); 2039 if (ret < 0) 2040 goto done; 2041 2042 ret = lan78xx_read_reg(dev, MII_DATA, &val); 2043 if (ret < 0) 2044 goto done; 2045 2046 ret = (int)(val & 0xFFFF); 2047 2048 done: 2049 mutex_unlock(&dev->mdiobus_mutex); 2050 usb_autopm_put_interface(dev->intf); 2051 2052 return ret; 2053 } 2054 2055 static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx, 2056 u16 regval) 2057 { 2058 struct lan78xx_net *dev = bus->priv; 2059 u32 val, addr; 2060 int ret; 2061 2062 ret = usb_autopm_get_interface(dev->intf); 2063 if (ret < 0) 2064 return ret; 2065 2066 mutex_lock(&dev->mdiobus_mutex); 2067 2068 /* confirm MII not busy */ 2069 ret = lan78xx_mdiobus_wait_not_busy(dev); 2070 if (ret < 0) 2071 goto done; 2072 2073 val = (u32)regval; 2074 ret = lan78xx_write_reg(dev, MII_DATA, val); 2075 if (ret < 0) 2076 goto done; 2077 2078 /* set the address, index & direction (write to PHY) */ 2079 addr = mii_access(phy_id, idx, MII_WRITE); 2080 ret = lan78xx_write_reg(dev, MII_ACC, addr); 2081 if (ret < 0) 2082 goto done; 2083 2084 ret = lan78xx_mdiobus_wait_not_busy(dev); 2085 if (ret < 0) 2086 goto done; 2087 2088 done: 2089 mutex_unlock(&dev->mdiobus_mutex); 2090 usb_autopm_put_interface(dev->intf); 2091 return ret; 2092 } 2093 2094 static int lan78xx_mdio_init(struct lan78xx_net *dev) 2095 { 2096 struct device_node *node; 2097 int ret; 2098 2099 dev->mdiobus = mdiobus_alloc(); 2100 if (!dev->mdiobus) { 2101 netdev_err(dev->net, "can't allocate MDIO bus\n"); 2102 return -ENOMEM; 2103 } 2104 2105 dev->mdiobus->priv = (void *)dev; 2106 dev->mdiobus->read = lan78xx_mdiobus_read; 2107 dev->mdiobus->write = lan78xx_mdiobus_write; 2108 dev->mdiobus->name = "lan78xx-mdiobus"; 2109 dev->mdiobus->parent = &dev->udev->dev; 2110 2111 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d", 2112 dev->udev->bus->busnum, dev->udev->devnum); 2113 2114 switch (dev->chipid) { 2115 case ID_REV_CHIP_ID_7800_: 2116 case ID_REV_CHIP_ID_7850_: 2117 /* set to internal PHY id */ 2118 dev->mdiobus->phy_mask = ~(1 << 1); 2119 break; 2120 case ID_REV_CHIP_ID_7801_: 2121 break; 2122 } 2123 2124 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio"); 2125 ret = of_mdiobus_register(dev->mdiobus, node); 2126 of_node_put(node); 2127 if (ret) { 2128 netdev_err(dev->net, "can't register MDIO bus\n"); 2129 goto exit1; 2130 } 2131 2132 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id); 2133 return 0; 2134 exit1: 2135 mdiobus_free(dev->mdiobus); 2136 return ret; 2137 } 2138 2139 static void lan78xx_remove_mdio(struct lan78xx_net *dev) 2140 { 2141 mdiobus_unregister(dev->mdiobus); 2142 mdiobus_free(dev->mdiobus); 2143 } 2144 2145 static int irq_map(struct irq_domain *d, unsigned int irq, 2146 irq_hw_number_t hwirq) 2147 { 2148 struct irq_domain_data *data = d->host_data; 2149 2150 irq_set_chip_data(irq, data); 2151 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler); 2152 irq_set_noprobe(irq); 2153 2154 return 0; 2155 } 2156 2157 static void irq_unmap(struct irq_domain *d, unsigned int irq) 2158 { 2159 irq_set_chip_and_handler(irq, NULL, NULL); 2160 irq_set_chip_data(irq, NULL); 2161 } 2162 2163 static const struct irq_domain_ops chip_domain_ops = { 2164 .map = irq_map, 2165 .unmap = irq_unmap, 2166 }; 2167 2168 static void lan78xx_irq_mask(struct irq_data *irqd) 2169 { 2170 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2171 2172 data->irqenable &= ~BIT(irqd_to_hwirq(irqd)); 2173 } 2174 2175 static void lan78xx_irq_unmask(struct irq_data *irqd) 2176 { 2177 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2178 2179 data->irqenable |= BIT(irqd_to_hwirq(irqd)); 2180 } 2181 2182 static void lan78xx_irq_bus_lock(struct irq_data *irqd) 2183 { 2184 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2185 2186 mutex_lock(&data->irq_lock); 2187 } 2188 2189 static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd) 2190 { 2191 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2192 struct lan78xx_net *dev = 2193 container_of(data, struct lan78xx_net, domain_data); 2194 u32 buf; 2195 int ret; 2196 2197 /* call register access here because irq_bus_lock & irq_bus_sync_unlock 2198 * are only two callbacks executed in non-atomic contex. 2199 */ 2200 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2201 if (ret < 0) 2202 goto irq_bus_sync_unlock; 2203 2204 if (buf != data->irqenable) 2205 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable); 2206 2207 irq_bus_sync_unlock: 2208 if (ret < 0) 2209 netdev_err(dev->net, "Failed to sync IRQ enable register: %pe\n", 2210 ERR_PTR(ret)); 2211 2212 mutex_unlock(&data->irq_lock); 2213 } 2214 2215 static struct irq_chip lan78xx_irqchip = { 2216 .name = "lan78xx-irqs", 2217 .irq_mask = lan78xx_irq_mask, 2218 .irq_unmask = lan78xx_irq_unmask, 2219 .irq_bus_lock = lan78xx_irq_bus_lock, 2220 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock, 2221 }; 2222 2223 static int lan78xx_setup_irq_domain(struct lan78xx_net *dev) 2224 { 2225 struct irq_domain *irqdomain; 2226 unsigned int irqmap = 0; 2227 u32 buf; 2228 int ret = 0; 2229 2230 mutex_init(&dev->domain_data.irq_lock); 2231 2232 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2233 if (ret < 0) 2234 return ret; 2235 2236 dev->domain_data.irqenable = buf; 2237 2238 dev->domain_data.irqchip = &lan78xx_irqchip; 2239 dev->domain_data.irq_handler = handle_simple_irq; 2240 2241 irqdomain = irq_domain_create_simple(dev_fwnode(dev->udev->dev.parent), MAX_INT_EP, 0, 2242 &chip_domain_ops, &dev->domain_data); 2243 if (irqdomain) { 2244 /* create mapping for PHY interrupt */ 2245 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY); 2246 if (!irqmap) { 2247 irq_domain_remove(irqdomain); 2248 2249 irqdomain = NULL; 2250 ret = -EINVAL; 2251 } 2252 } else { 2253 ret = -EINVAL; 2254 } 2255 2256 dev->domain_data.irqdomain = irqdomain; 2257 dev->domain_data.phyirq = irqmap; 2258 2259 return ret; 2260 } 2261 2262 static void lan78xx_remove_irq_domain(struct lan78xx_net *dev) 2263 { 2264 if (dev->domain_data.phyirq > 0) { 2265 irq_dispose_mapping(dev->domain_data.phyirq); 2266 2267 if (dev->domain_data.irqdomain) 2268 irq_domain_remove(dev->domain_data.irqdomain); 2269 } 2270 dev->domain_data.phyirq = 0; 2271 dev->domain_data.irqdomain = NULL; 2272 } 2273 2274 static void lan78xx_mac_config(struct phylink_config *config, unsigned int mode, 2275 const struct phylink_link_state *state) 2276 { 2277 struct net_device *net = to_net_dev(config->dev); 2278 struct lan78xx_net *dev = netdev_priv(net); 2279 u32 mac_cr = 0; 2280 int ret; 2281 2282 /* Check if the mode is supported */ 2283 if (mode != MLO_AN_FIXED && mode != MLO_AN_PHY) { 2284 netdev_err(net, "Unsupported negotiation mode: %u\n", mode); 2285 return; 2286 } 2287 2288 switch (state->interface) { 2289 case PHY_INTERFACE_MODE_GMII: 2290 mac_cr |= MAC_CR_GMII_EN_; 2291 break; 2292 case PHY_INTERFACE_MODE_RGMII: 2293 case PHY_INTERFACE_MODE_RGMII_ID: 2294 case PHY_INTERFACE_MODE_RGMII_TXID: 2295 case PHY_INTERFACE_MODE_RGMII_RXID: 2296 break; 2297 default: 2298 netdev_warn(net, "Unsupported interface mode: %d\n", 2299 state->interface); 2300 return; 2301 } 2302 2303 ret = lan78xx_update_reg(dev, MAC_CR, MAC_CR_GMII_EN_, mac_cr); 2304 if (ret < 0) 2305 netdev_err(net, "Failed to config MAC with error %pe\n", 2306 ERR_PTR(ret)); 2307 } 2308 2309 static void lan78xx_mac_link_down(struct phylink_config *config, 2310 unsigned int mode, phy_interface_t interface) 2311 { 2312 struct net_device *net = to_net_dev(config->dev); 2313 struct lan78xx_net *dev = netdev_priv(net); 2314 int ret; 2315 2316 netif_stop_queue(net); 2317 2318 /* MAC reset will not de-assert TXEN/RXEN, we need to stop them 2319 * manually before reset. TX and RX should be disabled before running 2320 * link_up sequence. 2321 */ 2322 ret = lan78xx_stop_tx_path(dev); 2323 if (ret < 0) 2324 goto link_down_fail; 2325 2326 ret = lan78xx_stop_rx_path(dev); 2327 if (ret < 0) 2328 goto link_down_fail; 2329 2330 /* MAC reset seems to not affect MAC configuration, no idea if it is 2331 * really needed, but it was done in previous driver version. So, leave 2332 * it here. 2333 */ 2334 ret = lan78xx_mac_reset(dev); 2335 if (ret < 0) 2336 goto link_down_fail; 2337 2338 return; 2339 2340 link_down_fail: 2341 netdev_err(dev->net, "Failed to set MAC down with error %pe\n", 2342 ERR_PTR(ret)); 2343 } 2344 2345 /** 2346 * lan78xx_configure_usb - Configure USB link power settings 2347 * @dev: pointer to the LAN78xx device structure 2348 * @speed: negotiated Ethernet link speed (in Mbps) 2349 * 2350 * This function configures U1/U2 link power management for SuperSpeed 2351 * USB devices based on the current Ethernet link speed. It uses the 2352 * USB_CFG1 register to enable or disable U1 and U2 low-power states. 2353 * 2354 * Note: Only LAN7800 and LAN7801 support SuperSpeed (USB 3.x). 2355 * LAN7850 is a High-Speed-only (USB 2.0) device and is skipped. 2356 * 2357 * Return: 0 on success or a negative error code on failure. 2358 */ 2359 static int lan78xx_configure_usb(struct lan78xx_net *dev, int speed) 2360 { 2361 u32 mask, val; 2362 int ret; 2363 2364 /* Only configure USB settings for SuperSpeed devices */ 2365 if (dev->udev->speed != USB_SPEED_SUPER) 2366 return 0; 2367 2368 /* LAN7850 does not support USB 3.x */ 2369 if (dev->chipid == ID_REV_CHIP_ID_7850_) { 2370 netdev_warn_once(dev->net, "Unexpected SuperSpeed for LAN7850 (USB 2.0 only)\n"); 2371 return 0; 2372 } 2373 2374 switch (speed) { 2375 case SPEED_1000: 2376 /* Disable U2, enable U1 */ 2377 ret = lan78xx_update_reg(dev, USB_CFG1, 2378 USB_CFG1_DEV_U2_INIT_EN_, 0); 2379 if (ret < 0) 2380 return ret; 2381 2382 return lan78xx_update_reg(dev, USB_CFG1, 2383 USB_CFG1_DEV_U1_INIT_EN_, 2384 USB_CFG1_DEV_U1_INIT_EN_); 2385 2386 case SPEED_100: 2387 case SPEED_10: 2388 /* Enable both U1 and U2 */ 2389 mask = USB_CFG1_DEV_U1_INIT_EN_ | USB_CFG1_DEV_U2_INIT_EN_; 2390 val = mask; 2391 return lan78xx_update_reg(dev, USB_CFG1, mask, val); 2392 2393 default: 2394 netdev_warn(dev->net, "Unsupported link speed: %d\n", speed); 2395 return -EINVAL; 2396 } 2397 } 2398 2399 /** 2400 * lan78xx_configure_flowcontrol - Set MAC and FIFO flow control configuration 2401 * @dev: pointer to the LAN78xx device structure 2402 * @tx_pause: enable transmission of pause frames 2403 * @rx_pause: enable reception of pause frames 2404 * 2405 * This function configures the LAN78xx flow control settings by writing 2406 * to the FLOW and FCT_FLOW registers. The pause time is set to the 2407 * maximum allowed value (65535 quanta). FIFO thresholds are selected 2408 * based on USB speed. 2409 * 2410 * The Pause Time field is measured in units of 512-bit times (quanta): 2411 * - At 1 Gbps: 1 quanta = 512 ns → max ~33.6 ms pause 2412 * - At 100 Mbps: 1 quanta = 5.12 µs → max ~335 ms pause 2413 * - At 10 Mbps: 1 quanta = 51.2 µs → max ~3.3 s pause 2414 * 2415 * Flow control thresholds (FCT_FLOW) are used to trigger pause/resume: 2416 * - RXUSED is the number of bytes used in the RX FIFO 2417 * - Flow is turned ON when RXUSED ≥ FLOW_ON threshold 2418 * - Flow is turned OFF when RXUSED ≤ FLOW_OFF threshold 2419 * - Both thresholds are encoded in units of 512 bytes (rounded up) 2420 * 2421 * Thresholds differ by USB speed because available USB bandwidth 2422 * affects how fast packets can be drained from the RX FIFO: 2423 * - USB 3.x (SuperSpeed): 2424 * FLOW_ON = 9216 bytes → 18 units 2425 * FLOW_OFF = 4096 bytes → 8 units 2426 * - USB 2.0 (High-Speed): 2427 * FLOW_ON = 8704 bytes → 17 units 2428 * FLOW_OFF = 1024 bytes → 2 units 2429 * 2430 * Note: The FCT_FLOW register must be configured before enabling TX pause 2431 * (i.e., before setting FLOW_CR_TX_FCEN_), as required by the hardware. 2432 * 2433 * Return: 0 on success or a negative error code on failure. 2434 */ 2435 static int lan78xx_configure_flowcontrol(struct lan78xx_net *dev, 2436 bool tx_pause, bool rx_pause) 2437 { 2438 /* Use maximum pause time: 65535 quanta (512-bit times) */ 2439 const u32 pause_time_quanta = 65535; 2440 u32 fct_flow = 0; 2441 u32 flow = 0; 2442 int ret; 2443 2444 /* Prepare MAC flow control bits */ 2445 if (tx_pause) 2446 flow |= FLOW_CR_TX_FCEN_ | pause_time_quanta; 2447 2448 if (rx_pause) 2449 flow |= FLOW_CR_RX_FCEN_; 2450 2451 /* Select RX FIFO thresholds based on USB speed 2452 * 2453 * FCT_FLOW layout: 2454 * bits [6:0] FLOW_ON threshold (RXUSED ≥ ON → assert pause) 2455 * bits [14:8] FLOW_OFF threshold (RXUSED ≤ OFF → deassert pause) 2456 * thresholds are expressed in units of 512 bytes 2457 */ 2458 switch (dev->udev->speed) { 2459 case USB_SPEED_SUPER: 2460 fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_SS, FLOW_OFF_SS); 2461 break; 2462 case USB_SPEED_HIGH: 2463 fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_HS, FLOW_OFF_HS); 2464 break; 2465 default: 2466 netdev_warn(dev->net, "Unsupported USB speed: %d\n", 2467 dev->udev->speed); 2468 return -EINVAL; 2469 } 2470 2471 /* Step 1: Write FIFO thresholds before enabling pause frames */ 2472 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow); 2473 if (ret < 0) 2474 return ret; 2475 2476 /* Step 2: Enable MAC pause functionality */ 2477 return lan78xx_write_reg(dev, FLOW, flow); 2478 } 2479 2480 static void lan78xx_mac_link_up(struct phylink_config *config, 2481 struct phy_device *phy, 2482 unsigned int mode, phy_interface_t interface, 2483 int speed, int duplex, 2484 bool tx_pause, bool rx_pause) 2485 { 2486 struct net_device *net = to_net_dev(config->dev); 2487 struct lan78xx_net *dev = netdev_priv(net); 2488 u32 mac_cr = 0; 2489 int ret; 2490 2491 switch (speed) { 2492 case SPEED_1000: 2493 mac_cr |= MAC_CR_SPEED_1000_; 2494 break; 2495 case SPEED_100: 2496 mac_cr |= MAC_CR_SPEED_100_; 2497 break; 2498 case SPEED_10: 2499 mac_cr |= MAC_CR_SPEED_10_; 2500 break; 2501 default: 2502 netdev_err(dev->net, "Unsupported speed %d\n", speed); 2503 return; 2504 } 2505 2506 if (duplex == DUPLEX_FULL) 2507 mac_cr |= MAC_CR_FULL_DUPLEX_; 2508 2509 /* make sure TXEN and RXEN are disabled before reconfiguring MAC */ 2510 ret = lan78xx_update_reg(dev, MAC_CR, MAC_CR_SPEED_MASK_ | 2511 MAC_CR_FULL_DUPLEX_ | MAC_CR_EEE_EN_, mac_cr); 2512 if (ret < 0) 2513 goto link_up_fail; 2514 2515 ret = lan78xx_configure_flowcontrol(dev, tx_pause, rx_pause); 2516 if (ret < 0) 2517 goto link_up_fail; 2518 2519 ret = lan78xx_configure_usb(dev, speed); 2520 if (ret < 0) 2521 goto link_up_fail; 2522 2523 lan78xx_rx_urb_submit_all(dev); 2524 2525 ret = lan78xx_flush_rx_fifo(dev); 2526 if (ret < 0) 2527 goto link_up_fail; 2528 2529 ret = lan78xx_flush_tx_fifo(dev); 2530 if (ret < 0) 2531 goto link_up_fail; 2532 2533 ret = lan78xx_start_tx_path(dev); 2534 if (ret < 0) 2535 goto link_up_fail; 2536 2537 ret = lan78xx_start_rx_path(dev); 2538 if (ret < 0) 2539 goto link_up_fail; 2540 2541 /* The RFE clears the VLAN/DA hash filter (VHF) on a link down/up 2542 * cycle, so reprogram both tables from their shadow copies. 2543 */ 2544 ret = lan78xx_write_vlan_table(dev); 2545 if (ret < 0) 2546 goto link_up_fail; 2547 2548 ret = lan78xx_write_mchash_table(dev); 2549 if (ret < 0) 2550 goto link_up_fail; 2551 2552 netif_start_queue(net); 2553 2554 return; 2555 2556 link_up_fail: 2557 netdev_err(dev->net, "Failed to set MAC up with error %pe\n", 2558 ERR_PTR(ret)); 2559 } 2560 2561 /** 2562 * lan78xx_mac_eee_enable - Enable or disable MAC-side EEE support 2563 * @dev: LAN78xx device 2564 * @enable: true to enable EEE, false to disable 2565 * 2566 * This function sets or clears the MAC_CR_EEE_EN_ bit to control Energy 2567 * Efficient Ethernet (EEE) operation. According to current understanding 2568 * of the LAN7800 documentation, this bit can be modified while TX and RX 2569 * are enabled. No explicit requirement was found to disable data paths 2570 * before changing this bit. 2571 * 2572 * Return: 0 on success or a negative error code 2573 */ 2574 static int lan78xx_mac_eee_enable(struct lan78xx_net *dev, bool enable) 2575 { 2576 u32 mac_cr = 0; 2577 2578 if (enable) 2579 mac_cr |= MAC_CR_EEE_EN_; 2580 2581 return lan78xx_update_reg(dev, MAC_CR, MAC_CR_EEE_EN_, mac_cr); 2582 } 2583 2584 static void lan78xx_mac_disable_tx_lpi(struct phylink_config *config) 2585 { 2586 struct net_device *net = to_net_dev(config->dev); 2587 struct lan78xx_net *dev = netdev_priv(net); 2588 2589 lan78xx_mac_eee_enable(dev, false); 2590 } 2591 2592 static int lan78xx_mac_enable_tx_lpi(struct phylink_config *config, u32 timer, 2593 bool tx_clk_stop) 2594 { 2595 struct net_device *net = to_net_dev(config->dev); 2596 struct lan78xx_net *dev = netdev_priv(net); 2597 int ret; 2598 2599 /* Software should only change this field when Energy Efficient 2600 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing 2601 * EEEEN during probe, and phylink itself guarantees that 2602 * mac_disable_tx_lpi() will have been previously called. 2603 */ 2604 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, timer); 2605 if (ret < 0) 2606 return ret; 2607 2608 return lan78xx_mac_eee_enable(dev, true); 2609 } 2610 2611 static const struct phylink_mac_ops lan78xx_phylink_mac_ops = { 2612 .mac_config = lan78xx_mac_config, 2613 .mac_link_down = lan78xx_mac_link_down, 2614 .mac_link_up = lan78xx_mac_link_up, 2615 .mac_disable_tx_lpi = lan78xx_mac_disable_tx_lpi, 2616 .mac_enable_tx_lpi = lan78xx_mac_enable_tx_lpi, 2617 }; 2618 2619 /** 2620 * lan78xx_set_fixed_link() - Set fixed link configuration for LAN7801 2621 * @dev: LAN78xx device 2622 * 2623 * Use fixed link configuration with 1 Gbps full duplex. This is used in special 2624 * cases like EVB-KSZ9897-1, where LAN7801 acts as a USB-to-Ethernet interface 2625 * to a switch without a visible PHY. 2626 * 2627 * Return: pointer to the registered fixed PHY, or ERR_PTR() on error. 2628 */ 2629 static int lan78xx_set_fixed_link(struct lan78xx_net *dev) 2630 { 2631 static const struct phylink_link_state state = { 2632 .speed = SPEED_1000, 2633 .duplex = DUPLEX_FULL, 2634 }; 2635 2636 netdev_info(dev->net, 2637 "No PHY found on LAN7801 – using fixed link instead (e.g. EVB-KSZ9897-1)\n"); 2638 2639 return phylink_set_fixed_link(dev->phylink, &state); 2640 } 2641 2642 /** 2643 * lan78xx_get_phy() - Probe or register PHY device and set interface mode 2644 * @dev: LAN78xx device structure 2645 * 2646 * This function attempts to find a PHY on the MDIO bus. If no PHY is found 2647 * and the chip is LAN7801, it registers a fixed PHY as fallback. It also 2648 * sets dev->interface based on chip ID and detected PHY type. 2649 * 2650 * Return: a valid PHY device pointer, or ERR_PTR() on failure. 2651 */ 2652 static struct phy_device *lan78xx_get_phy(struct lan78xx_net *dev) 2653 { 2654 struct phy_device *phydev; 2655 2656 /* Attempt to locate a PHY on the MDIO bus */ 2657 phydev = phy_find_first(dev->mdiobus); 2658 2659 switch (dev->chipid) { 2660 case ID_REV_CHIP_ID_7801_: 2661 if (phydev) { 2662 /* External RGMII PHY detected */ 2663 dev->interface = PHY_INTERFACE_MODE_RGMII_ID; 2664 phydev->is_internal = false; 2665 2666 if (!phydev->drv) 2667 netdev_warn(dev->net, 2668 "PHY driver not found – assuming RGMII delays are on PCB or strapped for the PHY\n"); 2669 2670 return phydev; 2671 } 2672 2673 dev->interface = PHY_INTERFACE_MODE_RGMII; 2674 /* No PHY found – fallback to fixed PHY (e.g. KSZ switch board) */ 2675 return NULL; 2676 2677 case ID_REV_CHIP_ID_7800_: 2678 case ID_REV_CHIP_ID_7850_: 2679 if (!phydev) 2680 return ERR_PTR(-ENODEV); 2681 2682 /* These use internal GMII-connected PHY */ 2683 dev->interface = PHY_INTERFACE_MODE_GMII; 2684 phydev->is_internal = true; 2685 return phydev; 2686 2687 default: 2688 netdev_err(dev->net, "Unknown CHIP ID: 0x%08x\n", dev->chipid); 2689 return ERR_PTR(-ENODEV); 2690 } 2691 } 2692 2693 /** 2694 * lan78xx_mac_prepare_for_phy() - Preconfigure MAC-side interface settings 2695 * @dev: LAN78xx device 2696 * 2697 * Configure MAC-side registers according to dev->interface, which should be 2698 * set by lan78xx_get_phy(). 2699 * 2700 * - For PHY_INTERFACE_MODE_RGMII: 2701 * Enable MAC-side TXC delay. This mode seems to be used in a special setup 2702 * without a real PHY, likely on EVB-KSZ9897-1. In that design, LAN7801 is 2703 * connected to the KSZ9897 switch, and the link timing is expected to be 2704 * hardwired (e.g. via strapping or board layout). No devicetree support is 2705 * assumed here. 2706 * 2707 * - For PHY_INTERFACE_MODE_RGMII_ID: 2708 * Disable MAC-side delay and rely on the PHY driver to provide delay. 2709 * 2710 * - For GMII, no MAC-specific config is needed. 2711 * 2712 * Return: 0 on success or a negative error code. 2713 */ 2714 static int lan78xx_mac_prepare_for_phy(struct lan78xx_net *dev) 2715 { 2716 int ret; 2717 2718 switch (dev->interface) { 2719 case PHY_INTERFACE_MODE_RGMII: 2720 /* Enable MAC-side TX clock delay */ 2721 ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 2722 MAC_RGMII_ID_TXC_DELAY_EN_); 2723 if (ret < 0) 2724 return ret; 2725 2726 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00); 2727 if (ret < 0) 2728 return ret; 2729 2730 ret = lan78xx_update_reg(dev, HW_CFG, 2731 HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_, 2732 HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_); 2733 if (ret < 0) 2734 return ret; 2735 2736 break; 2737 2738 case PHY_INTERFACE_MODE_RGMII_ID: 2739 /* Disable MAC-side TXC delay, PHY provides it */ 2740 ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 0); 2741 if (ret < 0) 2742 return ret; 2743 2744 break; 2745 2746 case PHY_INTERFACE_MODE_GMII: 2747 /* No MAC-specific configuration required */ 2748 break; 2749 2750 default: 2751 netdev_warn(dev->net, "Unsupported interface mode: %d\n", 2752 dev->interface); 2753 break; 2754 } 2755 2756 return 0; 2757 } 2758 2759 /** 2760 * lan78xx_configure_leds_from_dt() - Configure LED enables based on DT 2761 * @dev: LAN78xx device 2762 * @phydev: PHY device (must be valid) 2763 * 2764 * Reads "microchip,led-modes" property from the PHY's DT node and enables 2765 * the corresponding number of LEDs by writing to HW_CFG. 2766 * 2767 * This helper preserves the original logic, enabling up to 4 LEDs. 2768 * If the property is not present, this function does nothing. 2769 * 2770 * Return: 0 on success or a negative error code. 2771 */ 2772 static int lan78xx_configure_leds_from_dt(struct lan78xx_net *dev, 2773 struct phy_device *phydev) 2774 { 2775 struct device_node *np = phydev->mdio.dev.of_node; 2776 u32 reg; 2777 int len, ret; 2778 2779 if (!np) 2780 return 0; 2781 2782 len = of_property_count_elems_of_size(np, "microchip,led-modes", 2783 sizeof(u32)); 2784 if (len < 0) 2785 return 0; 2786 2787 ret = lan78xx_read_reg(dev, HW_CFG, ®); 2788 if (ret < 0) 2789 return ret; 2790 2791 reg &= ~(HW_CFG_LED0_EN_ | HW_CFG_LED1_EN_ | 2792 HW_CFG_LED2_EN_ | HW_CFG_LED3_EN_); 2793 2794 reg |= (len > 0) * HW_CFG_LED0_EN_ | 2795 (len > 1) * HW_CFG_LED1_EN_ | 2796 (len > 2) * HW_CFG_LED2_EN_ | 2797 (len > 3) * HW_CFG_LED3_EN_; 2798 2799 return lan78xx_write_reg(dev, HW_CFG, reg); 2800 } 2801 2802 static int lan78xx_phylink_setup(struct lan78xx_net *dev) 2803 { 2804 struct phylink_config *pc = &dev->phylink_config; 2805 struct phylink *phylink; 2806 2807 pc->dev = &dev->net->dev; 2808 pc->type = PHYLINK_NETDEV; 2809 pc->mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | MAC_10 | 2810 MAC_100 | MAC_1000FD; 2811 pc->mac_managed_pm = true; 2812 pc->lpi_capabilities = MAC_100FD | MAC_1000FD; 2813 /* 2814 * Default TX LPI (Low Power Idle) request delay count is set to 50us. 2815 * 2816 * Source: LAN7800 Documentation, DS00001992H, Section 15.1.57, Page 204. 2817 * 2818 * Reasoning: 2819 * According to the application note in the LAN7800 documentation, a 2820 * zero delay may negatively impact the TX data path’s ability to 2821 * support Gigabit operation. A value of 50us is recommended as a 2822 * reasonable default when the part operates at Gigabit speeds, 2823 * balancing stability and power efficiency in EEE mode. This delay can 2824 * be increased based on performance testing, as EEE is designed for 2825 * scenarios with mostly idle links and occasional bursts of full 2826 * bandwidth transmission. The goal is to ensure reliable Gigabit 2827 * performance without overly aggressive power optimization during 2828 * inactive periods. 2829 */ 2830 pc->lpi_timer_default = 50; 2831 pc->eee_enabled_default = true; 2832 2833 if (dev->chipid == ID_REV_CHIP_ID_7801_) 2834 phy_interface_set_rgmii(pc->supported_interfaces); 2835 else 2836 __set_bit(PHY_INTERFACE_MODE_GMII, pc->supported_interfaces); 2837 2838 memcpy(dev->phylink_config.lpi_interfaces, 2839 dev->phylink_config.supported_interfaces, 2840 sizeof(dev->phylink_config.lpi_interfaces)); 2841 2842 phylink = phylink_create(pc, dev->net->dev.fwnode, 2843 dev->interface, &lan78xx_phylink_mac_ops); 2844 if (IS_ERR(phylink)) 2845 return PTR_ERR(phylink); 2846 2847 dev->phylink = phylink; 2848 2849 return 0; 2850 } 2851 2852 static void lan78xx_phy_uninit(struct lan78xx_net *dev) 2853 { 2854 if (dev->phylink) { 2855 phylink_disconnect_phy(dev->phylink); 2856 phylink_destroy(dev->phylink); 2857 dev->phylink = NULL; 2858 } 2859 } 2860 2861 static int lan78xx_phy_init(struct lan78xx_net *dev) 2862 { 2863 struct phy_device *phydev; 2864 int ret; 2865 2866 phydev = lan78xx_get_phy(dev); 2867 /* phydev can be NULL if no PHY is found and the chip is LAN7801, 2868 * which will use a fixed link later. 2869 * If an error occurs, return the error code immediately. 2870 */ 2871 if (IS_ERR(phydev)) 2872 return PTR_ERR(phydev); 2873 2874 ret = lan78xx_phylink_setup(dev); 2875 if (ret < 0) 2876 return ret; 2877 2878 ret = lan78xx_mac_prepare_for_phy(dev); 2879 if (ret < 0) 2880 goto phylink_uninit; 2881 2882 /* If no PHY is found, set up a fixed link. It is very specific to 2883 * the LAN7801 and is used in special cases like EVB-KSZ9897-1 where 2884 * LAN7801 acts as a USB-to-Ethernet interface to a switch without 2885 * a visible PHY. 2886 */ 2887 if (!phydev) { 2888 ret = lan78xx_set_fixed_link(dev); 2889 if (ret < 0) 2890 goto phylink_uninit; 2891 2892 /* No PHY found, so set up a fixed link and return early. 2893 * No need to configure PHY IRQ or attach to phylink. 2894 */ 2895 return 0; 2896 } 2897 2898 /* if phyirq is not set, use polling mode in phylib */ 2899 if (dev->domain_data.phyirq > 0) 2900 phydev->irq = dev->domain_data.phyirq; 2901 else 2902 phydev->irq = PHY_POLL; 2903 dev->mdiobus->irq[phydev->mdio.addr] = phydev->irq; 2904 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq); 2905 2906 ret = phylink_connect_phy(dev->phylink, phydev); 2907 if (ret) { 2908 netdev_err(dev->net, "can't attach PHY to %s, error %pe\n", 2909 dev->mdiobus->id, ERR_PTR(ret)); 2910 goto phylink_uninit; 2911 } 2912 2913 ret = lan78xx_configure_leds_from_dt(dev, phydev); 2914 if (ret < 0) 2915 goto phylink_uninit; 2916 2917 return 0; 2918 2919 phylink_uninit: 2920 lan78xx_phy_uninit(dev); 2921 2922 return ret; 2923 } 2924 2925 static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size) 2926 { 2927 bool rxenabled; 2928 u32 buf; 2929 int ret; 2930 2931 ret = lan78xx_read_reg(dev, MAC_RX, &buf); 2932 if (ret < 0) 2933 return ret; 2934 2935 rxenabled = ((buf & MAC_RX_RXEN_) != 0); 2936 2937 if (rxenabled) { 2938 buf &= ~MAC_RX_RXEN_; 2939 ret = lan78xx_write_reg(dev, MAC_RX, buf); 2940 if (ret < 0) 2941 return ret; 2942 } 2943 2944 /* add 4 to size for FCS */ 2945 buf &= ~MAC_RX_MAX_SIZE_MASK_; 2946 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 2947 2948 ret = lan78xx_write_reg(dev, MAC_RX, buf); 2949 if (ret < 0) 2950 return ret; 2951 2952 if (rxenabled) { 2953 buf |= MAC_RX_RXEN_; 2954 ret = lan78xx_write_reg(dev, MAC_RX, buf); 2955 if (ret < 0) 2956 return ret; 2957 } 2958 2959 return 0; 2960 } 2961 2962 static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q) 2963 { 2964 struct sk_buff *skb; 2965 unsigned long flags; 2966 int count = 0; 2967 2968 spin_lock_irqsave(&q->lock, flags); 2969 while (!skb_queue_empty(q)) { 2970 struct skb_data *entry; 2971 struct urb *urb; 2972 int ret; 2973 2974 skb_queue_walk(q, skb) { 2975 entry = (struct skb_data *)skb->cb; 2976 if (entry->state != unlink_start) 2977 goto found; 2978 } 2979 break; 2980 found: 2981 entry->state = unlink_start; 2982 urb = entry->urb; 2983 2984 /* Get reference count of the URB to avoid it to be 2985 * freed during usb_unlink_urb, which may trigger 2986 * use-after-free problem inside usb_unlink_urb since 2987 * usb_unlink_urb is always racing with .complete 2988 * handler(include defer_bh). 2989 */ 2990 usb_get_urb(urb); 2991 spin_unlock_irqrestore(&q->lock, flags); 2992 /* during some PM-driven resume scenarios, 2993 * these (async) unlinks complete immediately 2994 */ 2995 ret = usb_unlink_urb(urb); 2996 if (ret != -EINPROGRESS && ret != 0) 2997 netdev_dbg(dev->net, "unlink urb err, %d\n", ret); 2998 else 2999 count++; 3000 usb_put_urb(urb); 3001 spin_lock_irqsave(&q->lock, flags); 3002 } 3003 spin_unlock_irqrestore(&q->lock, flags); 3004 return count; 3005 } 3006 3007 static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu) 3008 { 3009 struct lan78xx_net *dev = netdev_priv(netdev); 3010 int max_frame_len = RX_MAX_FRAME_LEN(new_mtu); 3011 int ret; 3012 3013 /* no second zero-length packet read wanted after mtu-sized packets */ 3014 if ((max_frame_len % dev->maxpacket) == 0) 3015 return -EDOM; 3016 3017 ret = usb_autopm_get_interface(dev->intf); 3018 if (ret < 0) 3019 return ret; 3020 3021 ret = lan78xx_set_rx_max_frame_length(dev, max_frame_len); 3022 if (ret < 0) 3023 netdev_err(dev->net, "MTU changed to %d from %d failed with %pe\n", 3024 new_mtu, netdev->mtu, ERR_PTR(ret)); 3025 else 3026 WRITE_ONCE(netdev->mtu, new_mtu); 3027 3028 usb_autopm_put_interface(dev->intf); 3029 3030 return ret; 3031 } 3032 3033 static int lan78xx_set_mac_addr(struct net_device *netdev, void *p) 3034 { 3035 struct lan78xx_net *dev = netdev_priv(netdev); 3036 struct sockaddr *addr = p; 3037 u32 addr_lo, addr_hi; 3038 int ret; 3039 3040 if (netif_running(netdev)) 3041 return -EBUSY; 3042 3043 if (!is_valid_ether_addr(addr->sa_data)) 3044 return -EADDRNOTAVAIL; 3045 3046 eth_hw_addr_set(netdev, addr->sa_data); 3047 3048 addr_lo = netdev->dev_addr[0] | 3049 netdev->dev_addr[1] << 8 | 3050 netdev->dev_addr[2] << 16 | 3051 netdev->dev_addr[3] << 24; 3052 addr_hi = netdev->dev_addr[4] | 3053 netdev->dev_addr[5] << 8; 3054 3055 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 3056 if (ret < 0) 3057 return ret; 3058 3059 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 3060 if (ret < 0) 3061 return ret; 3062 3063 /* Added to support MAC address changes */ 3064 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 3065 if (ret < 0) 3066 return ret; 3067 3068 return lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 3069 } 3070 3071 /* Enable or disable Rx checksum offload engine */ 3072 static int lan78xx_set_features(struct net_device *netdev, 3073 netdev_features_t features) 3074 { 3075 struct lan78xx_net *dev = netdev_priv(netdev); 3076 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3077 unsigned long flags; 3078 3079 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 3080 3081 if (features & NETIF_F_RXCSUM) { 3082 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_; 3083 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_; 3084 } else { 3085 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_); 3086 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_); 3087 } 3088 3089 if (features & NETIF_F_HW_VLAN_CTAG_RX) 3090 pdata->rfe_ctl |= RFE_CTL_VLAN_STRIP_; 3091 else 3092 pdata->rfe_ctl &= ~RFE_CTL_VLAN_STRIP_; 3093 3094 lan78xx_update_vlan_filter(pdata, netdev, features); 3095 3096 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 3097 3098 return lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 3099 } 3100 3101 static int lan78xx_write_vlan_table(struct lan78xx_net *dev) 3102 { 3103 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3104 3105 return lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0, 3106 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table); 3107 } 3108 3109 static void lan78xx_deferred_vlan_write(struct work_struct *param) 3110 { 3111 struct lan78xx_priv *pdata = 3112 container_of(param, struct lan78xx_priv, set_vlan); 3113 3114 lan78xx_write_vlan_table(pdata->dev); 3115 } 3116 3117 static int lan78xx_vlan_rx_add_vid(struct net_device *netdev, 3118 __be16 proto, u16 vid) 3119 { 3120 struct lan78xx_net *dev = netdev_priv(netdev); 3121 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3122 u16 vid_bit_index; 3123 u16 vid_dword_index; 3124 3125 vid_dword_index = (vid >> 5) & 0x7F; 3126 vid_bit_index = vid & 0x1F; 3127 3128 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index); 3129 3130 /* defer register writes to a sleepable context */ 3131 schedule_work(&pdata->set_vlan); 3132 3133 return 0; 3134 } 3135 3136 static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev, 3137 __be16 proto, u16 vid) 3138 { 3139 struct lan78xx_net *dev = netdev_priv(netdev); 3140 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3141 u16 vid_bit_index; 3142 u16 vid_dword_index; 3143 3144 vid_dword_index = (vid >> 5) & 0x7F; 3145 vid_bit_index = vid & 0x1F; 3146 3147 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index); 3148 3149 /* defer register writes to a sleepable context */ 3150 schedule_work(&pdata->set_vlan); 3151 3152 return 0; 3153 } 3154 3155 static int lan78xx_init_ltm(struct lan78xx_net *dev) 3156 { 3157 u32 regs[6] = { 0 }; 3158 int ret; 3159 u32 buf; 3160 3161 /* LAN7850 is USB 2.0 and does not support LTM */ 3162 if (dev->chipid == ID_REV_CHIP_ID_7850_) 3163 return 0; 3164 3165 ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 3166 if (ret < 0) 3167 goto init_ltm_failed; 3168 3169 if (buf & USB_CFG1_LTM_ENABLE_) { 3170 u8 temp[2]; 3171 /* Get values from EEPROM first */ 3172 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) { 3173 if (temp[0] == 24) { 3174 ret = lan78xx_read_raw_eeprom(dev, 3175 temp[1] * 2, 3176 24, 3177 (u8 *)regs); 3178 if (ret < 0) 3179 return ret; 3180 } 3181 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) { 3182 if (temp[0] == 24) { 3183 ret = lan78xx_read_raw_otp(dev, 3184 temp[1] * 2, 3185 24, 3186 (u8 *)regs); 3187 if (ret < 0) 3188 return ret; 3189 } 3190 } 3191 } 3192 3193 ret = lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]); 3194 if (ret < 0) 3195 goto init_ltm_failed; 3196 3197 ret = lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]); 3198 if (ret < 0) 3199 goto init_ltm_failed; 3200 3201 ret = lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]); 3202 if (ret < 0) 3203 goto init_ltm_failed; 3204 3205 ret = lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]); 3206 if (ret < 0) 3207 goto init_ltm_failed; 3208 3209 ret = lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]); 3210 if (ret < 0) 3211 goto init_ltm_failed; 3212 3213 ret = lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]); 3214 if (ret < 0) 3215 goto init_ltm_failed; 3216 3217 return 0; 3218 3219 init_ltm_failed: 3220 netdev_err(dev->net, "Failed to init LTM with error %pe\n", ERR_PTR(ret)); 3221 return ret; 3222 } 3223 3224 static int lan78xx_urb_config_init(struct lan78xx_net *dev) 3225 { 3226 int result = 0; 3227 3228 switch (dev->udev->speed) { 3229 case USB_SPEED_SUPER: 3230 dev->rx_urb_size = RX_SS_URB_SIZE; 3231 dev->tx_urb_size = TX_SS_URB_SIZE; 3232 dev->n_rx_urbs = RX_SS_URB_NUM; 3233 dev->n_tx_urbs = TX_SS_URB_NUM; 3234 dev->bulk_in_delay = SS_BULK_IN_DELAY; 3235 dev->burst_cap = SS_BURST_CAP_SIZE / SS_USB_PKT_SIZE; 3236 break; 3237 case USB_SPEED_HIGH: 3238 dev->rx_urb_size = RX_HS_URB_SIZE; 3239 dev->tx_urb_size = TX_HS_URB_SIZE; 3240 dev->n_rx_urbs = RX_HS_URB_NUM; 3241 dev->n_tx_urbs = TX_HS_URB_NUM; 3242 dev->bulk_in_delay = HS_BULK_IN_DELAY; 3243 dev->burst_cap = HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 3244 break; 3245 case USB_SPEED_FULL: 3246 dev->rx_urb_size = RX_FS_URB_SIZE; 3247 dev->tx_urb_size = TX_FS_URB_SIZE; 3248 dev->n_rx_urbs = RX_FS_URB_NUM; 3249 dev->n_tx_urbs = TX_FS_URB_NUM; 3250 dev->bulk_in_delay = FS_BULK_IN_DELAY; 3251 dev->burst_cap = FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 3252 break; 3253 default: 3254 netdev_warn(dev->net, "USB bus speed not supported\n"); 3255 result = -EIO; 3256 break; 3257 } 3258 3259 return result; 3260 } 3261 3262 static int lan78xx_reset(struct lan78xx_net *dev) 3263 { 3264 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3265 unsigned long timeout; 3266 int ret; 3267 u32 buf; 3268 3269 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 3270 if (ret < 0) 3271 return ret; 3272 3273 buf |= HW_CFG_LRST_; 3274 3275 ret = lan78xx_write_reg(dev, HW_CFG, buf); 3276 if (ret < 0) 3277 return ret; 3278 3279 timeout = jiffies + HZ; 3280 do { 3281 mdelay(1); 3282 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 3283 if (ret < 0) 3284 return ret; 3285 3286 if (time_after(jiffies, timeout)) { 3287 netdev_warn(dev->net, 3288 "timeout on completion of LiteReset"); 3289 ret = -ETIMEDOUT; 3290 return ret; 3291 } 3292 } while (buf & HW_CFG_LRST_); 3293 3294 /* save DEVID for later usage */ 3295 ret = lan78xx_read_reg(dev, ID_REV, &buf); 3296 if (ret < 0) 3297 return ret; 3298 3299 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16; 3300 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_; 3301 3302 ret = lan78xx_init_mac_address(dev); 3303 if (ret < 0) 3304 return ret; 3305 3306 /* Respond to the IN token with a NAK */ 3307 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 3308 if (ret < 0) 3309 return ret; 3310 3311 buf |= USB_CFG_BIR_; 3312 3313 ret = lan78xx_write_reg(dev, USB_CFG0, buf); 3314 if (ret < 0) 3315 return ret; 3316 3317 /* Init LTM */ 3318 ret = lan78xx_init_ltm(dev); 3319 if (ret < 0) 3320 return ret; 3321 3322 ret = lan78xx_write_reg(dev, BURST_CAP, dev->burst_cap); 3323 if (ret < 0) 3324 return ret; 3325 3326 ret = lan78xx_write_reg(dev, BULK_IN_DLY, dev->bulk_in_delay); 3327 if (ret < 0) 3328 return ret; 3329 3330 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 3331 if (ret < 0) 3332 return ret; 3333 3334 buf |= HW_CFG_MEF_; 3335 buf |= HW_CFG_CLK125_EN_; 3336 buf |= HW_CFG_REFCLK25_EN_; 3337 3338 ret = lan78xx_write_reg(dev, HW_CFG, buf); 3339 if (ret < 0) 3340 return ret; 3341 3342 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 3343 if (ret < 0) 3344 return ret; 3345 3346 buf |= USB_CFG_BCE_; 3347 3348 ret = lan78xx_write_reg(dev, USB_CFG0, buf); 3349 if (ret < 0) 3350 return ret; 3351 3352 /* set FIFO sizes */ 3353 buf = (MAX_RX_FIFO_SIZE - 512) / 512; 3354 3355 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf); 3356 if (ret < 0) 3357 return ret; 3358 3359 buf = (MAX_TX_FIFO_SIZE - 512) / 512; 3360 3361 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf); 3362 if (ret < 0) 3363 return ret; 3364 3365 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 3366 if (ret < 0) 3367 return ret; 3368 3369 ret = lan78xx_write_reg(dev, FLOW, 0); 3370 if (ret < 0) 3371 return ret; 3372 3373 ret = lan78xx_write_reg(dev, FCT_FLOW, 0); 3374 if (ret < 0) 3375 return ret; 3376 3377 /* Don't need rfe_ctl_lock during initialisation */ 3378 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 3379 if (ret < 0) 3380 return ret; 3381 3382 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_; 3383 3384 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 3385 if (ret < 0) 3386 return ret; 3387 3388 /* Enable or disable checksum offload engines */ 3389 ret = lan78xx_set_features(dev->net, dev->net->features); 3390 if (ret < 0) 3391 return ret; 3392 3393 lan78xx_set_multicast(dev->net); 3394 3395 /* reset PHY */ 3396 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 3397 if (ret < 0) 3398 return ret; 3399 3400 buf |= PMT_CTL_PHY_RST_; 3401 3402 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 3403 if (ret < 0) 3404 return ret; 3405 3406 timeout = jiffies + HZ; 3407 do { 3408 mdelay(1); 3409 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 3410 if (ret < 0) 3411 return ret; 3412 3413 if (time_after(jiffies, timeout)) { 3414 netdev_warn(dev->net, "timeout waiting for PHY Reset"); 3415 ret = -ETIMEDOUT; 3416 return ret; 3417 } 3418 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_)); 3419 3420 ret = lan78xx_read_reg(dev, MAC_CR, &buf); 3421 if (ret < 0) 3422 return ret; 3423 3424 buf &= ~(MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_ | MAC_CR_EEE_EN_); 3425 3426 /* LAN7801 only has RGMII mode */ 3427 if (dev->chipid == ID_REV_CHIP_ID_7801_) 3428 buf &= ~MAC_CR_GMII_EN_; 3429 3430 ret = lan78xx_write_reg(dev, MAC_CR, buf); 3431 if (ret < 0) 3432 return ret; 3433 3434 ret = lan78xx_set_rx_max_frame_length(dev, 3435 RX_MAX_FRAME_LEN(dev->net->mtu)); 3436 3437 return ret; 3438 } 3439 3440 static void lan78xx_init_stats(struct lan78xx_net *dev) 3441 { 3442 u32 *p; 3443 int i; 3444 3445 /* initialize for stats update 3446 * some counters are 20bits and some are 32bits 3447 */ 3448 p = (u32 *)&dev->stats.rollover_max; 3449 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++) 3450 p[i] = 0xFFFFF; 3451 3452 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF; 3453 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF; 3454 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF; 3455 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF; 3456 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF; 3457 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF; 3458 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF; 3459 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF; 3460 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF; 3461 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF; 3462 3463 set_bit(EVENT_STAT_UPDATE, &dev->flags); 3464 } 3465 3466 static int lan78xx_open(struct net_device *net) 3467 { 3468 struct lan78xx_net *dev = netdev_priv(net); 3469 int ret; 3470 3471 netif_dbg(dev, ifup, dev->net, "open device"); 3472 3473 ret = usb_autopm_get_interface(dev->intf); 3474 if (ret < 0) 3475 return ret; 3476 3477 mutex_lock(&dev->dev_mutex); 3478 3479 lan78xx_init_stats(dev); 3480 3481 napi_enable(&dev->napi); 3482 3483 set_bit(EVENT_DEV_OPEN, &dev->flags); 3484 3485 /* for Link Check */ 3486 if (dev->urb_intr) { 3487 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); 3488 if (ret < 0) { 3489 netif_err(dev, ifup, dev->net, 3490 "intr submit %d\n", ret); 3491 goto done; 3492 } 3493 } 3494 3495 phylink_start(dev->phylink); 3496 3497 done: 3498 mutex_unlock(&dev->dev_mutex); 3499 3500 if (ret < 0) 3501 usb_autopm_put_interface(dev->intf); 3502 3503 return ret; 3504 } 3505 3506 static void lan78xx_terminate_urbs(struct lan78xx_net *dev) 3507 { 3508 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup); 3509 DECLARE_WAITQUEUE(wait, current); 3510 int temp; 3511 3512 /* ensure there are no more active urbs */ 3513 add_wait_queue(&unlink_wakeup, &wait); 3514 set_current_state(TASK_UNINTERRUPTIBLE); 3515 dev->wait = &unlink_wakeup; 3516 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq); 3517 3518 /* maybe wait for deletions to finish. */ 3519 while (!skb_queue_empty(&dev->rxq) || 3520 !skb_queue_empty(&dev->txq)) { 3521 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS)); 3522 set_current_state(TASK_UNINTERRUPTIBLE); 3523 netif_dbg(dev, ifdown, dev->net, 3524 "waited for %d urb completions", temp); 3525 } 3526 set_current_state(TASK_RUNNING); 3527 dev->wait = NULL; 3528 remove_wait_queue(&unlink_wakeup, &wait); 3529 3530 /* empty Rx done, Rx overflow and Tx pend queues 3531 */ 3532 while (!skb_queue_empty(&dev->rxq_done)) { 3533 struct sk_buff *skb = skb_dequeue(&dev->rxq_done); 3534 3535 lan78xx_release_rx_buf(dev, skb); 3536 } 3537 3538 skb_queue_purge(&dev->rxq_overflow); 3539 skb_queue_purge(&dev->txq_pend); 3540 } 3541 3542 static int lan78xx_stop(struct net_device *net) 3543 { 3544 struct lan78xx_net *dev = netdev_priv(net); 3545 3546 netif_dbg(dev, ifup, dev->net, "stop device"); 3547 3548 mutex_lock(&dev->dev_mutex); 3549 3550 if (timer_pending(&dev->stat_monitor)) 3551 timer_delete_sync(&dev->stat_monitor); 3552 3553 clear_bit(EVENT_DEV_OPEN, &dev->flags); 3554 napi_disable(&dev->napi); 3555 3556 lan78xx_terminate_urbs(dev); 3557 3558 netif_info(dev, ifdown, dev->net, 3559 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n", 3560 net->stats.rx_packets, net->stats.tx_packets, 3561 net->stats.rx_errors, net->stats.tx_errors); 3562 3563 phylink_stop(dev->phylink); 3564 3565 usb_kill_urb(dev->urb_intr); 3566 3567 /* deferred work (task, timer, softirq) must also stop. 3568 * can't flush_scheduled_work() until we drop rtnl (later), 3569 * else workers could deadlock; so make workers a NOP. 3570 */ 3571 clear_bit(EVENT_TX_HALT, &dev->flags); 3572 clear_bit(EVENT_RX_HALT, &dev->flags); 3573 clear_bit(EVENT_PHY_INT_ACK, &dev->flags); 3574 clear_bit(EVENT_STAT_UPDATE, &dev->flags); 3575 3576 cancel_delayed_work_sync(&dev->wq); 3577 3578 usb_autopm_put_interface(dev->intf); 3579 3580 mutex_unlock(&dev->dev_mutex); 3581 3582 return 0; 3583 } 3584 3585 static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb, 3586 struct sk_buff_head *list, enum skb_state state) 3587 { 3588 unsigned long flags; 3589 enum skb_state old_state; 3590 struct skb_data *entry = (struct skb_data *)skb->cb; 3591 3592 spin_lock_irqsave(&list->lock, flags); 3593 old_state = entry->state; 3594 entry->state = state; 3595 3596 __skb_unlink(skb, list); 3597 spin_unlock(&list->lock); 3598 spin_lock(&dev->rxq_done.lock); 3599 3600 __skb_queue_tail(&dev->rxq_done, skb); 3601 if (skb_queue_len(&dev->rxq_done) == 1) 3602 napi_schedule(&dev->napi); 3603 3604 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 3605 3606 return old_state; 3607 } 3608 3609 static void tx_complete(struct urb *urb) 3610 { 3611 struct sk_buff *skb = (struct sk_buff *)urb->context; 3612 struct skb_data *entry = (struct skb_data *)skb->cb; 3613 struct lan78xx_net *dev = entry->dev; 3614 3615 if (urb->status == 0) { 3616 dev->net->stats.tx_packets += entry->num_of_packet; 3617 dev->net->stats.tx_bytes += entry->length; 3618 } else { 3619 dev->net->stats.tx_errors += entry->num_of_packet; 3620 3621 switch (urb->status) { 3622 case -EPIPE: 3623 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 3624 break; 3625 3626 /* software-driven interface shutdown */ 3627 case -ECONNRESET: 3628 case -ESHUTDOWN: 3629 netif_dbg(dev, tx_err, dev->net, 3630 "tx err interface gone %d\n", 3631 entry->urb->status); 3632 break; 3633 3634 case -EPROTO: 3635 case -ETIME: 3636 case -EILSEQ: 3637 netif_stop_queue(dev->net); 3638 netif_dbg(dev, tx_err, dev->net, 3639 "tx err queue stopped %d\n", 3640 entry->urb->status); 3641 break; 3642 default: 3643 netif_dbg(dev, tx_err, dev->net, 3644 "unknown tx err %d\n", 3645 entry->urb->status); 3646 break; 3647 } 3648 } 3649 3650 usb_autopm_put_interface_async(dev->intf); 3651 3652 skb_unlink(skb, &dev->txq); 3653 3654 lan78xx_release_tx_buf(dev, skb); 3655 3656 /* Re-schedule NAPI if Tx data pending but no URBs in progress. 3657 */ 3658 if (skb_queue_empty(&dev->txq) && 3659 !skb_queue_empty(&dev->txq_pend)) 3660 napi_schedule(&dev->napi); 3661 } 3662 3663 static void lan78xx_queue_skb(struct sk_buff_head *list, 3664 struct sk_buff *newsk, enum skb_state state) 3665 { 3666 struct skb_data *entry = (struct skb_data *)newsk->cb; 3667 3668 __skb_queue_tail(list, newsk); 3669 entry->state = state; 3670 } 3671 3672 static unsigned int lan78xx_tx_urb_space(struct lan78xx_net *dev) 3673 { 3674 return skb_queue_len(&dev->txq_free) * dev->tx_urb_size; 3675 } 3676 3677 static unsigned int lan78xx_tx_pend_data_len(struct lan78xx_net *dev) 3678 { 3679 return dev->tx_pend_data_len; 3680 } 3681 3682 static void lan78xx_tx_pend_skb_add(struct lan78xx_net *dev, 3683 struct sk_buff *skb, 3684 unsigned int *tx_pend_data_len) 3685 { 3686 unsigned long flags; 3687 3688 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3689 3690 __skb_queue_tail(&dev->txq_pend, skb); 3691 3692 dev->tx_pend_data_len += skb->len; 3693 *tx_pend_data_len = dev->tx_pend_data_len; 3694 3695 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3696 } 3697 3698 static void lan78xx_tx_pend_skb_head_add(struct lan78xx_net *dev, 3699 struct sk_buff *skb, 3700 unsigned int *tx_pend_data_len) 3701 { 3702 unsigned long flags; 3703 3704 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3705 3706 __skb_queue_head(&dev->txq_pend, skb); 3707 3708 dev->tx_pend_data_len += skb->len; 3709 *tx_pend_data_len = dev->tx_pend_data_len; 3710 3711 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3712 } 3713 3714 static void lan78xx_tx_pend_skb_get(struct lan78xx_net *dev, 3715 struct sk_buff **skb, 3716 unsigned int *tx_pend_data_len) 3717 { 3718 unsigned long flags; 3719 3720 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3721 3722 *skb = __skb_dequeue(&dev->txq_pend); 3723 if (*skb) 3724 dev->tx_pend_data_len -= (*skb)->len; 3725 *tx_pend_data_len = dev->tx_pend_data_len; 3726 3727 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3728 } 3729 3730 static netdev_tx_t 3731 lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net) 3732 { 3733 struct lan78xx_net *dev = netdev_priv(net); 3734 unsigned int tx_pend_data_len; 3735 3736 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) 3737 schedule_delayed_work(&dev->wq, 0); 3738 3739 skb_tx_timestamp(skb); 3740 3741 lan78xx_tx_pend_skb_add(dev, skb, &tx_pend_data_len); 3742 3743 /* Set up a Tx URB if none is in progress */ 3744 3745 if (skb_queue_empty(&dev->txq)) 3746 napi_schedule(&dev->napi); 3747 3748 /* Stop stack Tx queue if we have enough data to fill 3749 * all the free Tx URBs. 3750 */ 3751 if (tx_pend_data_len > lan78xx_tx_urb_space(dev)) { 3752 netif_stop_queue(net); 3753 3754 netif_dbg(dev, hw, dev->net, "tx data len: %u, urb space %u", 3755 tx_pend_data_len, lan78xx_tx_urb_space(dev)); 3756 3757 /* Kick off transmission of pending data */ 3758 3759 if (!skb_queue_empty(&dev->txq_free)) 3760 napi_schedule(&dev->napi); 3761 } 3762 3763 return NETDEV_TX_OK; 3764 } 3765 3766 static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf) 3767 { 3768 struct lan78xx_priv *pdata = NULL; 3769 int ret; 3770 int i; 3771 3772 dev->data[0] = (unsigned long) kzalloc_obj(*pdata); 3773 3774 pdata = (struct lan78xx_priv *)(dev->data[0]); 3775 if (!pdata) { 3776 netdev_warn(dev->net, "Unable to allocate lan78xx_priv"); 3777 return -ENOMEM; 3778 } 3779 3780 pdata->dev = dev; 3781 3782 spin_lock_init(&pdata->rfe_ctl_lock); 3783 mutex_init(&pdata->dataport_mutex); 3784 3785 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write); 3786 3787 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++) 3788 pdata->vlan_table[i] = 0; 3789 3790 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write); 3791 3792 dev->net->features = 0; 3793 3794 if (DEFAULT_TX_CSUM_ENABLE) 3795 dev->net->features |= NETIF_F_HW_CSUM; 3796 3797 if (DEFAULT_RX_CSUM_ENABLE) 3798 dev->net->features |= NETIF_F_RXCSUM; 3799 3800 if (DEFAULT_TSO_CSUM_ENABLE) 3801 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG; 3802 3803 if (DEFAULT_VLAN_RX_OFFLOAD) 3804 dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX; 3805 3806 if (DEFAULT_VLAN_FILTER_ENABLE) 3807 dev->net->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 3808 3809 dev->net->hw_features = dev->net->features; 3810 3811 ret = lan78xx_setup_irq_domain(dev); 3812 if (ret < 0) { 3813 netdev_warn(dev->net, 3814 "lan78xx_setup_irq_domain() failed : %d", ret); 3815 goto out1; 3816 } 3817 3818 /* Init all registers */ 3819 ret = lan78xx_reset(dev); 3820 if (ret) { 3821 netdev_warn(dev->net, "Registers INIT FAILED...."); 3822 goto out2; 3823 } 3824 3825 ret = lan78xx_mdio_init(dev); 3826 if (ret) { 3827 netdev_warn(dev->net, "MDIO INIT FAILED....."); 3828 goto out2; 3829 } 3830 3831 dev->net->flags |= IFF_MULTICAST; 3832 3833 pdata->wol = WAKE_MAGIC; 3834 3835 return ret; 3836 3837 out2: 3838 lan78xx_remove_irq_domain(dev); 3839 3840 out1: 3841 netdev_warn(dev->net, "Bind routine FAILED"); 3842 cancel_work_sync(&pdata->set_multicast); 3843 cancel_work_sync(&pdata->set_vlan); 3844 kfree(pdata); 3845 return ret; 3846 } 3847 3848 static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf) 3849 { 3850 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3851 3852 lan78xx_remove_irq_domain(dev); 3853 3854 lan78xx_remove_mdio(dev); 3855 3856 if (pdata) { 3857 cancel_work_sync(&pdata->set_multicast); 3858 cancel_work_sync(&pdata->set_vlan); 3859 netif_dbg(dev, ifdown, dev->net, "free pdata"); 3860 kfree(pdata); 3861 pdata = NULL; 3862 dev->data[0] = 0; 3863 } 3864 } 3865 3866 static void lan78xx_rx_csum_offload(struct lan78xx_net *dev, 3867 struct sk_buff *skb, 3868 u32 rx_cmd_a, u32 rx_cmd_b) 3869 { 3870 /* HW Checksum offload appears to be flawed if used when not stripping 3871 * VLAN headers. Drop back to S/W checksums under these conditions. 3872 */ 3873 if (!(dev->net->features & NETIF_F_RXCSUM) || 3874 unlikely(rx_cmd_a & RX_CMD_A_ICSM_) || 3875 unlikely(rx_cmd_a & RX_CMD_A_CSE_MASK_) || 3876 ((rx_cmd_a & RX_CMD_A_FVTG_) && 3877 !(dev->net->features & NETIF_F_HW_VLAN_CTAG_RX))) { 3878 skb->ip_summed = CHECKSUM_NONE; 3879 } else { 3880 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_)); 3881 skb->ip_summed = CHECKSUM_COMPLETE; 3882 } 3883 } 3884 3885 static void lan78xx_rx_vlan_offload(struct lan78xx_net *dev, 3886 struct sk_buff *skb, 3887 u32 rx_cmd_a, u32 rx_cmd_b) 3888 { 3889 if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) && 3890 (rx_cmd_a & RX_CMD_A_FVTG_)) 3891 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 3892 (rx_cmd_b & 0xffff)); 3893 } 3894 3895 static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb) 3896 { 3897 dev->net->stats.rx_packets++; 3898 dev->net->stats.rx_bytes += skb->len; 3899 3900 skb->protocol = eth_type_trans(skb, dev->net); 3901 3902 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n", 3903 skb->len + sizeof(struct ethhdr), skb->protocol); 3904 memset(skb->cb, 0, sizeof(struct skb_data)); 3905 3906 if (skb_defer_rx_timestamp(skb)) 3907 return; 3908 3909 napi_gro_receive(&dev->napi, skb); 3910 } 3911 3912 static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb, 3913 int budget, int *work_done) 3914 { 3915 if (skb->len < RX_SKB_MIN_LEN) 3916 return 0; 3917 3918 /* Extract frames from the URB buffer and pass each one to 3919 * the stack in a new NAPI SKB. 3920 */ 3921 while (skb->len > 0) { 3922 u32 rx_cmd_a, rx_cmd_b, align_count, size; 3923 u16 rx_cmd_c; 3924 unsigned char *packet; 3925 3926 rx_cmd_a = get_unaligned_le32(skb->data); 3927 skb_pull(skb, sizeof(rx_cmd_a)); 3928 3929 rx_cmd_b = get_unaligned_le32(skb->data); 3930 skb_pull(skb, sizeof(rx_cmd_b)); 3931 3932 rx_cmd_c = get_unaligned_le16(skb->data); 3933 skb_pull(skb, sizeof(rx_cmd_c)); 3934 3935 packet = skb->data; 3936 3937 /* get the packet length */ 3938 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 3939 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4; 3940 3941 if (unlikely(size > skb->len)) { 3942 netif_dbg(dev, rx_err, dev->net, 3943 "size err rx_cmd_a=0x%08x\n", 3944 rx_cmd_a); 3945 return 0; 3946 } 3947 3948 if (unlikely(rx_cmd_a & RX_CMD_A_RED_) && 3949 (rx_cmd_a & RX_CMD_A_RX_HARD_ERRS_MASK_)) { 3950 netif_dbg(dev, rx_err, dev->net, 3951 "Error rx_cmd_a=0x%08x", rx_cmd_a); 3952 } else { 3953 u32 frame_len; 3954 struct sk_buff *skb2; 3955 3956 if (unlikely(size < ETH_FCS_LEN)) { 3957 netif_dbg(dev, rx_err, dev->net, 3958 "size err rx_cmd_a=0x%08x\n", 3959 rx_cmd_a); 3960 return 0; 3961 } 3962 3963 frame_len = size - ETH_FCS_LEN; 3964 3965 skb2 = napi_alloc_skb(&dev->napi, frame_len); 3966 if (!skb2) 3967 return 0; 3968 3969 memcpy(skb2->data, packet, frame_len); 3970 3971 skb_put(skb2, frame_len); 3972 3973 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b); 3974 lan78xx_rx_vlan_offload(dev, skb2, rx_cmd_a, rx_cmd_b); 3975 3976 /* Processing of the URB buffer must complete once 3977 * it has started. If the NAPI work budget is exhausted 3978 * while frames remain they are added to the overflow 3979 * queue for delivery in the next NAPI polling cycle. 3980 */ 3981 if (*work_done < budget) { 3982 lan78xx_skb_return(dev, skb2); 3983 ++(*work_done); 3984 } else { 3985 skb_queue_tail(&dev->rxq_overflow, skb2); 3986 } 3987 } 3988 3989 skb_pull(skb, size); 3990 3991 /* skip padding bytes before the next frame starts */ 3992 if (skb->len) 3993 skb_pull(skb, align_count); 3994 } 3995 3996 return 1; 3997 } 3998 3999 static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb, 4000 int budget, int *work_done) 4001 { 4002 if (!lan78xx_rx(dev, skb, budget, work_done)) { 4003 netif_dbg(dev, rx_err, dev->net, "drop\n"); 4004 dev->net->stats.rx_errors++; 4005 } 4006 } 4007 4008 static void rx_complete(struct urb *urb) 4009 { 4010 struct sk_buff *skb = (struct sk_buff *)urb->context; 4011 struct skb_data *entry = (struct skb_data *)skb->cb; 4012 struct lan78xx_net *dev = entry->dev; 4013 int urb_status = urb->status; 4014 enum skb_state state; 4015 4016 netif_dbg(dev, rx_status, dev->net, 4017 "rx done: status %d", urb->status); 4018 4019 skb_put(skb, urb->actual_length); 4020 state = rx_done; 4021 4022 if (urb != entry->urb) 4023 netif_warn(dev, rx_err, dev->net, "URB pointer mismatch"); 4024 4025 switch (urb_status) { 4026 case 0: 4027 if (skb->len < RX_SKB_MIN_LEN) { 4028 state = rx_cleanup; 4029 dev->net->stats.rx_errors++; 4030 dev->net->stats.rx_length_errors++; 4031 netif_dbg(dev, rx_err, dev->net, 4032 "rx length %d\n", skb->len); 4033 } 4034 usb_mark_last_busy(dev->udev); 4035 break; 4036 case -EPIPE: 4037 dev->net->stats.rx_errors++; 4038 lan78xx_defer_kevent(dev, EVENT_RX_HALT); 4039 fallthrough; 4040 case -ECONNRESET: /* async unlink */ 4041 case -ESHUTDOWN: /* hardware gone */ 4042 netif_dbg(dev, ifdown, dev->net, 4043 "rx shutdown, code %d\n", urb_status); 4044 state = rx_cleanup; 4045 break; 4046 case -EPROTO: 4047 case -ETIME: 4048 case -EILSEQ: 4049 dev->net->stats.rx_errors++; 4050 state = rx_cleanup; 4051 break; 4052 4053 /* data overrun ... flush fifo? */ 4054 case -EOVERFLOW: 4055 dev->net->stats.rx_over_errors++; 4056 fallthrough; 4057 4058 default: 4059 state = rx_cleanup; 4060 dev->net->stats.rx_errors++; 4061 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status); 4062 break; 4063 } 4064 4065 state = defer_bh(dev, skb, &dev->rxq, state); 4066 } 4067 4068 static int rx_submit(struct lan78xx_net *dev, struct sk_buff *skb, gfp_t flags) 4069 { 4070 struct skb_data *entry = (struct skb_data *)skb->cb; 4071 size_t size = dev->rx_urb_size; 4072 struct urb *urb = entry->urb; 4073 unsigned long lockflags; 4074 int ret = 0; 4075 4076 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in, 4077 skb->data, size, rx_complete, skb); 4078 4079 spin_lock_irqsave(&dev->rxq.lock, lockflags); 4080 4081 if (netif_device_present(dev->net) && 4082 netif_running(dev->net) && 4083 !test_bit(EVENT_RX_HALT, &dev->flags) && 4084 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4085 ret = usb_submit_urb(urb, flags); 4086 switch (ret) { 4087 case 0: 4088 lan78xx_queue_skb(&dev->rxq, skb, rx_start); 4089 break; 4090 case -EPIPE: 4091 lan78xx_defer_kevent(dev, EVENT_RX_HALT); 4092 break; 4093 case -ENODEV: 4094 case -ENOENT: 4095 netif_dbg(dev, ifdown, dev->net, "device gone\n"); 4096 netif_device_detach(dev->net); 4097 break; 4098 case -EHOSTUNREACH: 4099 ret = -ENOLINK; 4100 napi_schedule(&dev->napi); 4101 break; 4102 default: 4103 netif_dbg(dev, rx_err, dev->net, 4104 "rx submit, %d\n", ret); 4105 napi_schedule(&dev->napi); 4106 break; 4107 } 4108 } else { 4109 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n"); 4110 ret = -ENOLINK; 4111 } 4112 spin_unlock_irqrestore(&dev->rxq.lock, lockflags); 4113 4114 if (ret) 4115 lan78xx_release_rx_buf(dev, skb); 4116 4117 return ret; 4118 } 4119 4120 static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev) 4121 { 4122 struct sk_buff *rx_buf; 4123 4124 /* Ensure the maximum number of Rx URBs is submitted 4125 */ 4126 while ((rx_buf = lan78xx_get_rx_buf(dev)) != NULL) { 4127 if (rx_submit(dev, rx_buf, GFP_ATOMIC) != 0) 4128 break; 4129 } 4130 } 4131 4132 static void lan78xx_rx_urb_resubmit(struct lan78xx_net *dev, 4133 struct sk_buff *rx_buf) 4134 { 4135 /* reset SKB data pointers */ 4136 4137 rx_buf->data = rx_buf->head; 4138 skb_reset_tail_pointer(rx_buf); 4139 rx_buf->len = 0; 4140 rx_buf->data_len = 0; 4141 4142 rx_submit(dev, rx_buf, GFP_ATOMIC); 4143 } 4144 4145 static void lan78xx_fill_tx_cmd_words(struct sk_buff *skb, u8 *buffer) 4146 { 4147 u32 tx_cmd_a; 4148 u32 tx_cmd_b; 4149 4150 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_; 4151 4152 if (skb->ip_summed == CHECKSUM_PARTIAL) 4153 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_; 4154 4155 tx_cmd_b = 0; 4156 if (skb_is_gso(skb)) { 4157 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_); 4158 4159 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_; 4160 4161 tx_cmd_a |= TX_CMD_A_LSO_; 4162 } 4163 4164 if (skb_vlan_tag_present(skb)) { 4165 tx_cmd_a |= TX_CMD_A_IVTG_; 4166 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_; 4167 } 4168 4169 put_unaligned_le32(tx_cmd_a, buffer); 4170 put_unaligned_le32(tx_cmd_b, buffer + 4); 4171 } 4172 4173 static struct skb_data *lan78xx_tx_buf_fill(struct lan78xx_net *dev, 4174 struct sk_buff *tx_buf) 4175 { 4176 struct skb_data *entry = (struct skb_data *)tx_buf->cb; 4177 int remain = dev->tx_urb_size; 4178 u8 *tx_data = tx_buf->data; 4179 u32 urb_len = 0; 4180 4181 entry->num_of_packet = 0; 4182 entry->length = 0; 4183 4184 /* Work through the pending SKBs and copy the data of each SKB into 4185 * the URB buffer if there room for all the SKB data. 4186 * 4187 * There must be at least DST+SRC+TYPE in the SKB (with padding enabled) 4188 */ 4189 while (remain >= TX_SKB_MIN_LEN) { 4190 unsigned int pending_bytes; 4191 unsigned int align_bytes; 4192 struct sk_buff *skb; 4193 unsigned int len; 4194 4195 lan78xx_tx_pend_skb_get(dev, &skb, &pending_bytes); 4196 4197 if (!skb) 4198 break; 4199 4200 align_bytes = (TX_ALIGNMENT - (urb_len % TX_ALIGNMENT)) % 4201 TX_ALIGNMENT; 4202 len = align_bytes + TX_CMD_LEN + skb->len; 4203 if (len > remain) { 4204 lan78xx_tx_pend_skb_head_add(dev, skb, &pending_bytes); 4205 break; 4206 } 4207 4208 tx_data += align_bytes; 4209 4210 lan78xx_fill_tx_cmd_words(skb, tx_data); 4211 tx_data += TX_CMD_LEN; 4212 4213 len = skb->len; 4214 if (skb_copy_bits(skb, 0, tx_data, len) < 0) { 4215 struct net_device_stats *stats = &dev->net->stats; 4216 4217 stats->tx_dropped++; 4218 dev_kfree_skb_any(skb); 4219 tx_data -= TX_CMD_LEN; 4220 continue; 4221 } 4222 4223 tx_data += len; 4224 entry->length += max_t(unsigned int, len, ETH_ZLEN); 4225 entry->num_of_packet += skb_shinfo(skb)->gso_segs ?: 1; 4226 4227 dev_kfree_skb_any(skb); 4228 4229 urb_len = (u32)(tx_data - (u8 *)tx_buf->data); 4230 4231 remain = dev->tx_urb_size - urb_len; 4232 } 4233 4234 skb_put(tx_buf, urb_len); 4235 4236 return entry; 4237 } 4238 4239 static void lan78xx_tx_bh(struct lan78xx_net *dev) 4240 { 4241 int ret; 4242 4243 /* Start the stack Tx queue if it was stopped 4244 */ 4245 netif_tx_lock(dev->net); 4246 if (netif_queue_stopped(dev->net)) { 4247 if (lan78xx_tx_pend_data_len(dev) < lan78xx_tx_urb_space(dev)) 4248 netif_wake_queue(dev->net); 4249 } 4250 netif_tx_unlock(dev->net); 4251 4252 /* Go through the Tx pending queue and set up URBs to transfer 4253 * the data to the device. Stop if no more pending data or URBs, 4254 * or if an error occurs when a URB is submitted. 4255 */ 4256 do { 4257 struct skb_data *entry; 4258 struct sk_buff *tx_buf; 4259 unsigned long flags; 4260 4261 if (skb_queue_empty(&dev->txq_pend)) 4262 break; 4263 4264 tx_buf = lan78xx_get_tx_buf(dev); 4265 if (!tx_buf) 4266 break; 4267 4268 entry = lan78xx_tx_buf_fill(dev, tx_buf); 4269 4270 spin_lock_irqsave(&dev->txq.lock, flags); 4271 ret = usb_autopm_get_interface_async(dev->intf); 4272 if (ret < 0) { 4273 spin_unlock_irqrestore(&dev->txq.lock, flags); 4274 goto out; 4275 } 4276 4277 usb_fill_bulk_urb(entry->urb, dev->udev, dev->pipe_out, 4278 tx_buf->data, tx_buf->len, tx_complete, 4279 tx_buf); 4280 4281 if (tx_buf->len % dev->maxpacket == 0) { 4282 /* send USB_ZERO_PACKET */ 4283 entry->urb->transfer_flags |= URB_ZERO_PACKET; 4284 } 4285 4286 #ifdef CONFIG_PM 4287 /* if device is asleep stop outgoing packet processing */ 4288 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4289 usb_anchor_urb(entry->urb, &dev->deferred); 4290 netif_stop_queue(dev->net); 4291 spin_unlock_irqrestore(&dev->txq.lock, flags); 4292 netdev_dbg(dev->net, 4293 "Delaying transmission for resumption\n"); 4294 return; 4295 } 4296 #endif 4297 ret = usb_submit_urb(entry->urb, GFP_ATOMIC); 4298 switch (ret) { 4299 case 0: 4300 netif_trans_update(dev->net); 4301 lan78xx_queue_skb(&dev->txq, tx_buf, tx_start); 4302 break; 4303 case -EPIPE: 4304 netif_stop_queue(dev->net); 4305 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 4306 usb_autopm_put_interface_async(dev->intf); 4307 break; 4308 case -ENODEV: 4309 case -ENOENT: 4310 netif_dbg(dev, tx_err, dev->net, 4311 "tx submit urb err %d (disconnected?)", ret); 4312 netif_device_detach(dev->net); 4313 break; 4314 default: 4315 usb_autopm_put_interface_async(dev->intf); 4316 netif_dbg(dev, tx_err, dev->net, 4317 "tx submit urb err %d\n", ret); 4318 break; 4319 } 4320 4321 spin_unlock_irqrestore(&dev->txq.lock, flags); 4322 4323 if (ret) { 4324 netdev_warn(dev->net, "failed to tx urb %d\n", ret); 4325 out: 4326 dev->net->stats.tx_dropped += entry->num_of_packet; 4327 lan78xx_release_tx_buf(dev, tx_buf); 4328 } 4329 } while (ret == 0); 4330 } 4331 4332 static int lan78xx_bh(struct lan78xx_net *dev, int budget) 4333 { 4334 struct sk_buff_head done; 4335 struct sk_buff *rx_buf; 4336 struct skb_data *entry; 4337 unsigned long flags; 4338 int work_done = 0; 4339 4340 /* Pass frames received in the last NAPI cycle before 4341 * working on newly completed URBs. 4342 */ 4343 while (!skb_queue_empty(&dev->rxq_overflow)) { 4344 lan78xx_skb_return(dev, skb_dequeue(&dev->rxq_overflow)); 4345 ++work_done; 4346 } 4347 4348 /* Take a snapshot of the done queue and move items to a 4349 * temporary queue. Rx URB completions will continue to add 4350 * to the done queue. 4351 */ 4352 __skb_queue_head_init(&done); 4353 4354 spin_lock_irqsave(&dev->rxq_done.lock, flags); 4355 skb_queue_splice_init(&dev->rxq_done, &done); 4356 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 4357 4358 /* Extract receive frames from completed URBs and 4359 * pass them to the stack. Re-submit each completed URB. 4360 */ 4361 while ((work_done < budget) && 4362 (rx_buf = __skb_dequeue(&done))) { 4363 entry = (struct skb_data *)(rx_buf->cb); 4364 switch (entry->state) { 4365 case rx_done: 4366 rx_process(dev, rx_buf, budget, &work_done); 4367 break; 4368 case rx_cleanup: 4369 break; 4370 default: 4371 netdev_dbg(dev->net, "rx buf state %d\n", 4372 entry->state); 4373 break; 4374 } 4375 4376 lan78xx_rx_urb_resubmit(dev, rx_buf); 4377 } 4378 4379 /* If budget was consumed before processing all the URBs put them 4380 * back on the front of the done queue. They will be first to be 4381 * processed in the next NAPI cycle. 4382 */ 4383 spin_lock_irqsave(&dev->rxq_done.lock, flags); 4384 skb_queue_splice(&done, &dev->rxq_done); 4385 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 4386 4387 if (netif_device_present(dev->net) && netif_running(dev->net)) { 4388 /* reset update timer delta */ 4389 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) { 4390 dev->delta = 1; 4391 mod_timer(&dev->stat_monitor, 4392 jiffies + STAT_UPDATE_TIMER); 4393 } 4394 4395 /* Submit all free Rx URBs */ 4396 4397 if (!test_bit(EVENT_RX_HALT, &dev->flags)) 4398 lan78xx_rx_urb_submit_all(dev); 4399 4400 /* Submit new Tx URBs */ 4401 4402 lan78xx_tx_bh(dev); 4403 } 4404 4405 return work_done; 4406 } 4407 4408 static int lan78xx_poll(struct napi_struct *napi, int budget) 4409 { 4410 struct lan78xx_net *dev = container_of(napi, struct lan78xx_net, napi); 4411 int result = budget; 4412 int work_done; 4413 4414 /* Don't do any work if the device is suspended */ 4415 4416 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4417 napi_complete_done(napi, 0); 4418 return 0; 4419 } 4420 4421 /* Process completed URBs and submit new URBs */ 4422 4423 work_done = lan78xx_bh(dev, budget); 4424 4425 if (work_done < budget) { 4426 napi_complete_done(napi, work_done); 4427 4428 /* Start a new polling cycle if data was received or 4429 * data is waiting to be transmitted. 4430 */ 4431 if (!skb_queue_empty(&dev->rxq_done)) { 4432 napi_schedule(napi); 4433 } else if (netif_carrier_ok(dev->net)) { 4434 if (skb_queue_empty(&dev->txq) && 4435 !skb_queue_empty(&dev->txq_pend)) { 4436 napi_schedule(napi); 4437 } else { 4438 netif_tx_lock(dev->net); 4439 if (netif_queue_stopped(dev->net)) { 4440 netif_wake_queue(dev->net); 4441 napi_schedule(napi); 4442 } 4443 netif_tx_unlock(dev->net); 4444 } 4445 } 4446 result = work_done; 4447 } 4448 4449 return result; 4450 } 4451 4452 static void lan78xx_delayedwork(struct work_struct *work) 4453 { 4454 int status; 4455 struct lan78xx_net *dev; 4456 4457 dev = container_of(work, struct lan78xx_net, wq.work); 4458 4459 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 4460 return; 4461 4462 if (usb_autopm_get_interface(dev->intf) < 0) 4463 return; 4464 4465 if (test_bit(EVENT_TX_HALT, &dev->flags)) { 4466 unlink_urbs(dev, &dev->txq); 4467 4468 status = usb_clear_halt(dev->udev, dev->pipe_out); 4469 if (status < 0 && 4470 status != -EPIPE && 4471 status != -ESHUTDOWN) { 4472 if (netif_msg_tx_err(dev)) 4473 netdev_err(dev->net, 4474 "can't clear tx halt, status %d\n", 4475 status); 4476 } else { 4477 clear_bit(EVENT_TX_HALT, &dev->flags); 4478 if (status != -ESHUTDOWN) 4479 netif_wake_queue(dev->net); 4480 } 4481 } 4482 4483 if (test_bit(EVENT_RX_HALT, &dev->flags)) { 4484 unlink_urbs(dev, &dev->rxq); 4485 status = usb_clear_halt(dev->udev, dev->pipe_in); 4486 if (status < 0 && 4487 status != -EPIPE && 4488 status != -ESHUTDOWN) { 4489 if (netif_msg_rx_err(dev)) 4490 netdev_err(dev->net, 4491 "can't clear rx halt, status %d\n", 4492 status); 4493 } else { 4494 clear_bit(EVENT_RX_HALT, &dev->flags); 4495 napi_schedule(&dev->napi); 4496 } 4497 } 4498 4499 if (test_bit(EVENT_PHY_INT_ACK, &dev->flags)) { 4500 int ret = 0; 4501 4502 clear_bit(EVENT_PHY_INT_ACK, &dev->flags); 4503 ret = lan78xx_phy_int_ack(dev); 4504 if (ret) 4505 netdev_info(dev->net, "PHY INT ack failed (%pe)\n", 4506 ERR_PTR(ret)); 4507 } 4508 4509 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) { 4510 lan78xx_update_stats(dev); 4511 4512 clear_bit(EVENT_STAT_UPDATE, &dev->flags); 4513 4514 mod_timer(&dev->stat_monitor, 4515 jiffies + (STAT_UPDATE_TIMER * dev->delta)); 4516 4517 dev->delta = min((dev->delta * 2), 50); 4518 } 4519 4520 usb_autopm_put_interface(dev->intf); 4521 } 4522 4523 static void intr_complete(struct urb *urb) 4524 { 4525 struct lan78xx_net *dev = urb->context; 4526 int status = urb->status; 4527 4528 switch (status) { 4529 /* success */ 4530 case 0: 4531 lan78xx_status(dev, urb); 4532 break; 4533 4534 /* software-driven interface shutdown */ 4535 case -ENOENT: /* urb killed */ 4536 case -ENODEV: /* hardware gone */ 4537 case -ESHUTDOWN: /* hardware gone */ 4538 netif_dbg(dev, ifdown, dev->net, 4539 "intr shutdown, code %d\n", status); 4540 return; 4541 4542 /* NOTE: not throttling like RX/TX, since this endpoint 4543 * already polls infrequently 4544 */ 4545 default: 4546 netdev_dbg(dev->net, "intr status %d\n", status); 4547 break; 4548 } 4549 4550 if (!netif_device_present(dev->net) || 4551 !netif_running(dev->net)) { 4552 netdev_warn(dev->net, "not submitting new status URB"); 4553 return; 4554 } 4555 4556 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length); 4557 status = usb_submit_urb(urb, GFP_ATOMIC); 4558 4559 switch (status) { 4560 case 0: 4561 break; 4562 case -ENODEV: 4563 case -ENOENT: 4564 netif_dbg(dev, timer, dev->net, 4565 "intr resubmit %d (disconnect?)", status); 4566 netif_device_detach(dev->net); 4567 break; 4568 default: 4569 netif_err(dev, timer, dev->net, 4570 "intr resubmit --> %d\n", status); 4571 break; 4572 } 4573 } 4574 4575 static void lan78xx_disconnect(struct usb_interface *intf) 4576 { 4577 struct lan78xx_net *dev; 4578 struct net_device *net; 4579 4580 dev = usb_get_intfdata(intf); 4581 usb_set_intfdata(intf, NULL); 4582 if (!dev) 4583 return; 4584 4585 net = dev->net; 4586 4587 rtnl_lock(); 4588 phylink_stop(dev->phylink); 4589 phylink_disconnect_phy(dev->phylink); 4590 rtnl_unlock(); 4591 4592 unregister_netdev(net); 4593 4594 timer_shutdown_sync(&dev->stat_monitor); 4595 set_bit(EVENT_DEV_DISCONNECT, &dev->flags); 4596 cancel_delayed_work_sync(&dev->wq); 4597 4598 phylink_destroy(dev->phylink); 4599 4600 usb_scuttle_anchored_urbs(&dev->deferred); 4601 4602 lan78xx_unbind(dev, intf); 4603 4604 lan78xx_free_tx_resources(dev); 4605 lan78xx_free_rx_resources(dev); 4606 4607 usb_kill_urb(dev->urb_intr); 4608 usb_free_urb(dev->urb_intr); 4609 4610 free_netdev(net); 4611 } 4612 4613 static void lan78xx_tx_timeout(struct net_device *net, unsigned int txqueue) 4614 { 4615 struct lan78xx_net *dev = netdev_priv(net); 4616 4617 unlink_urbs(dev, &dev->txq); 4618 napi_schedule(&dev->napi); 4619 } 4620 4621 static netdev_features_t lan78xx_features_check(struct sk_buff *skb, 4622 struct net_device *netdev, 4623 netdev_features_t features) 4624 { 4625 struct lan78xx_net *dev = netdev_priv(netdev); 4626 4627 if (skb->len > LAN78XX_TSO_SIZE(dev)) 4628 features &= ~NETIF_F_GSO_MASK; 4629 4630 features = vlan_features_check(skb, features); 4631 features = vxlan_features_check(skb, features); 4632 4633 return features; 4634 } 4635 4636 static const struct net_device_ops lan78xx_netdev_ops = { 4637 .ndo_open = lan78xx_open, 4638 .ndo_stop = lan78xx_stop, 4639 .ndo_start_xmit = lan78xx_start_xmit, 4640 .ndo_tx_timeout = lan78xx_tx_timeout, 4641 .ndo_change_mtu = lan78xx_change_mtu, 4642 .ndo_set_mac_address = lan78xx_set_mac_addr, 4643 .ndo_validate_addr = eth_validate_addr, 4644 .ndo_eth_ioctl = phy_do_ioctl_running, 4645 .ndo_set_rx_mode = lan78xx_set_multicast, 4646 .ndo_set_features = lan78xx_set_features, 4647 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid, 4648 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid, 4649 .ndo_features_check = lan78xx_features_check, 4650 }; 4651 4652 static void lan78xx_stat_monitor(struct timer_list *t) 4653 { 4654 struct lan78xx_net *dev = timer_container_of(dev, t, stat_monitor); 4655 4656 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE); 4657 } 4658 4659 static int lan78xx_probe(struct usb_interface *intf, 4660 const struct usb_device_id *id) 4661 { 4662 struct usb_host_endpoint *ep_blkin, *ep_blkout, *ep_intr; 4663 struct lan78xx_net *dev; 4664 struct net_device *netdev; 4665 struct usb_device *udev; 4666 int ret; 4667 unsigned int maxp; 4668 unsigned int period; 4669 u8 *buf = NULL; 4670 4671 udev = interface_to_usbdev(intf); 4672 4673 netdev = alloc_etherdev(sizeof(struct lan78xx_net)); 4674 if (!netdev) { 4675 dev_err(&intf->dev, "Error: OOM\n"); 4676 return -ENOMEM; 4677 } 4678 4679 SET_NETDEV_DEV(netdev, &intf->dev); 4680 4681 dev = netdev_priv(netdev); 4682 dev->udev = udev; 4683 dev->intf = intf; 4684 dev->net = netdev; 4685 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV 4686 | NETIF_MSG_PROBE | NETIF_MSG_LINK); 4687 4688 skb_queue_head_init(&dev->rxq); 4689 skb_queue_head_init(&dev->txq); 4690 skb_queue_head_init(&dev->rxq_done); 4691 skb_queue_head_init(&dev->txq_pend); 4692 skb_queue_head_init(&dev->rxq_overflow); 4693 mutex_init(&dev->mdiobus_mutex); 4694 mutex_init(&dev->dev_mutex); 4695 4696 ret = lan78xx_urb_config_init(dev); 4697 if (ret < 0) 4698 goto out2; 4699 4700 ret = lan78xx_alloc_tx_resources(dev); 4701 if (ret < 0) 4702 goto out2; 4703 4704 ret = lan78xx_alloc_rx_resources(dev); 4705 if (ret < 0) 4706 goto out3; 4707 4708 /* MTU range: 68 - 9000 */ 4709 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE; 4710 4711 netif_set_tso_max_size(netdev, LAN78XX_TSO_SIZE(dev)); 4712 4713 netif_napi_add(netdev, &dev->napi, lan78xx_poll); 4714 4715 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork); 4716 init_usb_anchor(&dev->deferred); 4717 4718 netdev->netdev_ops = &lan78xx_netdev_ops; 4719 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES; 4720 netdev->ethtool_ops = &lan78xx_ethtool_ops; 4721 4722 dev->delta = 1; 4723 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0); 4724 4725 mutex_init(&dev->stats.access_lock); 4726 4727 if (intf->cur_altsetting->desc.bNumEndpoints < 3) { 4728 ret = -ENODEV; 4729 goto out4; 4730 } 4731 4732 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE); 4733 ep_blkin = usb_pipe_endpoint(udev, dev->pipe_in); 4734 if (!ep_blkin || !usb_endpoint_is_bulk_in(&ep_blkin->desc)) { 4735 ret = -ENODEV; 4736 goto out4; 4737 } 4738 4739 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE); 4740 ep_blkout = usb_pipe_endpoint(udev, dev->pipe_out); 4741 if (!ep_blkout || !usb_endpoint_is_bulk_out(&ep_blkout->desc)) { 4742 ret = -ENODEV; 4743 goto out4; 4744 } 4745 4746 ep_intr = &intf->cur_altsetting->endpoint[2]; 4747 if (!usb_endpoint_is_int_in(&ep_intr->desc)) { 4748 ret = -ENODEV; 4749 goto out4; 4750 } 4751 4752 dev->pipe_intr = usb_rcvintpipe(dev->udev, 4753 usb_endpoint_num(&ep_intr->desc)); 4754 4755 ret = lan78xx_bind(dev, intf); 4756 if (ret < 0) 4757 goto out4; 4758 4759 period = ep_intr->desc.bInterval; 4760 maxp = usb_maxpacket(dev->udev, dev->pipe_intr); 4761 4762 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL); 4763 if (!dev->urb_intr) { 4764 ret = -ENOMEM; 4765 goto out5; 4766 } 4767 4768 buf = kmalloc(maxp, GFP_KERNEL); 4769 if (!buf) { 4770 ret = -ENOMEM; 4771 goto free_urbs; 4772 } 4773 4774 usb_fill_int_urb(dev->urb_intr, dev->udev, 4775 dev->pipe_intr, buf, maxp, 4776 intr_complete, dev, period); 4777 dev->urb_intr->transfer_flags |= URB_FREE_BUFFER; 4778 4779 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out); 4780 4781 /* Reject broken descriptors. */ 4782 if (dev->maxpacket == 0) { 4783 ret = -ENODEV; 4784 goto free_urbs; 4785 } 4786 4787 /* driver requires remote-wakeup capability during autosuspend. */ 4788 intf->needs_remote_wakeup = 1; 4789 4790 ret = lan78xx_phy_init(dev); 4791 if (ret < 0) 4792 goto free_urbs; 4793 4794 ret = register_netdev(netdev); 4795 if (ret != 0) { 4796 netif_err(dev, probe, netdev, "couldn't register the device\n"); 4797 goto phy_uninit; 4798 } 4799 4800 usb_set_intfdata(intf, dev); 4801 4802 ret = device_set_wakeup_enable(&udev->dev, true); 4803 4804 /* Default delay of 2sec has more overhead than advantage. 4805 * Set to 10sec as default. 4806 */ 4807 pm_runtime_set_autosuspend_delay(&udev->dev, 4808 DEFAULT_AUTOSUSPEND_DELAY); 4809 4810 return 0; 4811 4812 phy_uninit: 4813 lan78xx_phy_uninit(dev); 4814 free_urbs: 4815 usb_free_urb(dev->urb_intr); 4816 out5: 4817 lan78xx_unbind(dev, intf); 4818 out4: 4819 netif_napi_del(&dev->napi); 4820 lan78xx_free_rx_resources(dev); 4821 out3: 4822 lan78xx_free_tx_resources(dev); 4823 out2: 4824 free_netdev(netdev); 4825 4826 return ret; 4827 } 4828 4829 static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len) 4830 { 4831 const u16 crc16poly = 0x8005; 4832 int i; 4833 u16 bit, crc, msb; 4834 u8 data; 4835 4836 crc = 0xFFFF; 4837 for (i = 0; i < len; i++) { 4838 data = *buf++; 4839 for (bit = 0; bit < 8; bit++) { 4840 msb = crc >> 15; 4841 crc <<= 1; 4842 4843 if (msb ^ (u16)(data & 1)) { 4844 crc ^= crc16poly; 4845 crc |= (u16)0x0001U; 4846 } 4847 data >>= 1; 4848 } 4849 } 4850 4851 return crc; 4852 } 4853 4854 static int lan78xx_set_auto_suspend(struct lan78xx_net *dev) 4855 { 4856 u32 buf; 4857 int ret; 4858 4859 ret = lan78xx_stop_tx_path(dev); 4860 if (ret < 0) 4861 return ret; 4862 4863 ret = lan78xx_stop_rx_path(dev); 4864 if (ret < 0) 4865 return ret; 4866 4867 /* auto suspend (selective suspend) */ 4868 4869 ret = lan78xx_write_reg(dev, WUCSR, 0); 4870 if (ret < 0) 4871 return ret; 4872 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4873 if (ret < 0) 4874 return ret; 4875 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 4876 if (ret < 0) 4877 return ret; 4878 4879 /* set goodframe wakeup */ 4880 4881 ret = lan78xx_read_reg(dev, WUCSR, &buf); 4882 if (ret < 0) 4883 return ret; 4884 4885 buf |= WUCSR_RFE_WAKE_EN_; 4886 buf |= WUCSR_STORE_WAKE_; 4887 4888 ret = lan78xx_write_reg(dev, WUCSR, buf); 4889 if (ret < 0) 4890 return ret; 4891 4892 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4893 if (ret < 0) 4894 return ret; 4895 4896 buf &= ~PMT_CTL_RES_CLR_WKP_EN_; 4897 buf |= PMT_CTL_RES_CLR_WKP_STS_; 4898 buf |= PMT_CTL_PHY_WAKE_EN_; 4899 buf |= PMT_CTL_WOL_EN_; 4900 buf &= ~PMT_CTL_SUS_MODE_MASK_; 4901 buf |= PMT_CTL_SUS_MODE_3_; 4902 4903 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4904 if (ret < 0) 4905 return ret; 4906 4907 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4908 if (ret < 0) 4909 return ret; 4910 4911 buf |= PMT_CTL_WUPS_MASK_; 4912 4913 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4914 if (ret < 0) 4915 return ret; 4916 4917 ret = lan78xx_start_rx_path(dev); 4918 4919 return ret; 4920 } 4921 4922 static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol) 4923 { 4924 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 4925 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 4926 const u8 arp_type[2] = { 0x08, 0x06 }; 4927 u32 temp_pmt_ctl; 4928 int mask_index; 4929 u32 temp_wucsr; 4930 u32 buf; 4931 u16 crc; 4932 int ret; 4933 4934 ret = lan78xx_stop_tx_path(dev); 4935 if (ret < 0) 4936 return ret; 4937 ret = lan78xx_stop_rx_path(dev); 4938 if (ret < 0) 4939 return ret; 4940 4941 ret = lan78xx_write_reg(dev, WUCSR, 0); 4942 if (ret < 0) 4943 return ret; 4944 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4945 if (ret < 0) 4946 return ret; 4947 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 4948 if (ret < 0) 4949 return ret; 4950 4951 temp_wucsr = 0; 4952 4953 temp_pmt_ctl = 0; 4954 4955 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl); 4956 if (ret < 0) 4957 return ret; 4958 4959 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_; 4960 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_; 4961 4962 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++) { 4963 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0); 4964 if (ret < 0) 4965 return ret; 4966 } 4967 4968 mask_index = 0; 4969 if (wol & WAKE_PHY) { 4970 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_; 4971 4972 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4973 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4974 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4975 } 4976 if (wol & WAKE_MAGIC) { 4977 temp_wucsr |= WUCSR_MPEN_; 4978 4979 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4980 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4981 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_; 4982 } 4983 if (wol & WAKE_BCAST) { 4984 temp_wucsr |= WUCSR_BCST_EN_; 4985 4986 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4987 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4988 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4989 } 4990 if (wol & WAKE_MCAST) { 4991 temp_wucsr |= WUCSR_WAKE_EN_; 4992 4993 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */ 4994 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3); 4995 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 4996 WUF_CFGX_EN_ | 4997 WUF_CFGX_TYPE_MCAST_ | 4998 (0 << WUF_CFGX_OFFSET_SHIFT_) | 4999 (crc & WUF_CFGX_CRC16_MASK_)); 5000 if (ret < 0) 5001 return ret; 5002 5003 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7); 5004 if (ret < 0) 5005 return ret; 5006 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 5007 if (ret < 0) 5008 return ret; 5009 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 5010 if (ret < 0) 5011 return ret; 5012 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 5013 if (ret < 0) 5014 return ret; 5015 5016 mask_index++; 5017 5018 /* for IPv6 Multicast */ 5019 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2); 5020 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 5021 WUF_CFGX_EN_ | 5022 WUF_CFGX_TYPE_MCAST_ | 5023 (0 << WUF_CFGX_OFFSET_SHIFT_) | 5024 (crc & WUF_CFGX_CRC16_MASK_)); 5025 if (ret < 0) 5026 return ret; 5027 5028 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3); 5029 if (ret < 0) 5030 return ret; 5031 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 5032 if (ret < 0) 5033 return ret; 5034 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 5035 if (ret < 0) 5036 return ret; 5037 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 5038 if (ret < 0) 5039 return ret; 5040 5041 mask_index++; 5042 5043 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5044 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5045 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5046 } 5047 if (wol & WAKE_UCAST) { 5048 temp_wucsr |= WUCSR_PFDA_EN_; 5049 5050 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5051 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5052 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5053 } 5054 if (wol & WAKE_ARP) { 5055 temp_wucsr |= WUCSR_WAKE_EN_; 5056 5057 /* set WUF_CFG & WUF_MASK 5058 * for packettype (offset 12,13) = ARP (0x0806) 5059 */ 5060 crc = lan78xx_wakeframe_crc16(arp_type, 2); 5061 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 5062 WUF_CFGX_EN_ | 5063 WUF_CFGX_TYPE_ALL_ | 5064 (0 << WUF_CFGX_OFFSET_SHIFT_) | 5065 (crc & WUF_CFGX_CRC16_MASK_)); 5066 if (ret < 0) 5067 return ret; 5068 5069 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000); 5070 if (ret < 0) 5071 return ret; 5072 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 5073 if (ret < 0) 5074 return ret; 5075 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 5076 if (ret < 0) 5077 return ret; 5078 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 5079 if (ret < 0) 5080 return ret; 5081 5082 mask_index++; 5083 5084 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5085 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5086 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5087 } 5088 5089 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr); 5090 if (ret < 0) 5091 return ret; 5092 5093 /* when multiple WOL bits are set */ 5094 if (hweight_long((unsigned long)wol) > 1) { 5095 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5096 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5097 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5098 } 5099 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl); 5100 if (ret < 0) 5101 return ret; 5102 5103 /* clear WUPS */ 5104 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 5105 if (ret < 0) 5106 return ret; 5107 5108 buf |= PMT_CTL_WUPS_MASK_; 5109 5110 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 5111 if (ret < 0) 5112 return ret; 5113 5114 ret = lan78xx_start_rx_path(dev); 5115 5116 return ret; 5117 } 5118 5119 static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message) 5120 { 5121 struct lan78xx_net *dev = usb_get_intfdata(intf); 5122 bool dev_open; 5123 int ret; 5124 5125 mutex_lock(&dev->dev_mutex); 5126 5127 netif_dbg(dev, ifdown, dev->net, 5128 "suspending: pm event %#x", message.event); 5129 5130 dev_open = test_bit(EVENT_DEV_OPEN, &dev->flags); 5131 5132 if (dev_open) { 5133 spin_lock_irq(&dev->txq.lock); 5134 /* don't autosuspend while transmitting */ 5135 if ((skb_queue_len(&dev->txq) || 5136 skb_queue_len(&dev->txq_pend)) && 5137 PMSG_IS_AUTO(message)) { 5138 spin_unlock_irq(&dev->txq.lock); 5139 ret = -EBUSY; 5140 goto out; 5141 } else { 5142 set_bit(EVENT_DEV_ASLEEP, &dev->flags); 5143 spin_unlock_irq(&dev->txq.lock); 5144 } 5145 5146 rtnl_lock(); 5147 phylink_suspend(dev->phylink, false); 5148 rtnl_unlock(); 5149 5150 /* stop RX */ 5151 ret = lan78xx_stop_rx_path(dev); 5152 if (ret < 0) 5153 goto out; 5154 5155 ret = lan78xx_flush_rx_fifo(dev); 5156 if (ret < 0) 5157 goto out; 5158 5159 /* stop Tx */ 5160 ret = lan78xx_stop_tx_path(dev); 5161 if (ret < 0) 5162 goto out; 5163 5164 /* empty out the Rx and Tx queues */ 5165 netif_device_detach(dev->net); 5166 lan78xx_terminate_urbs(dev); 5167 usb_kill_urb(dev->urb_intr); 5168 5169 /* reattach */ 5170 netif_device_attach(dev->net); 5171 5172 timer_delete(&dev->stat_monitor); 5173 5174 if (PMSG_IS_AUTO(message)) { 5175 ret = lan78xx_set_auto_suspend(dev); 5176 if (ret < 0) 5177 goto out; 5178 } else { 5179 struct lan78xx_priv *pdata; 5180 5181 pdata = (struct lan78xx_priv *)(dev->data[0]); 5182 netif_carrier_off(dev->net); 5183 ret = lan78xx_set_suspend(dev, pdata->wol); 5184 if (ret < 0) 5185 goto out; 5186 } 5187 } else { 5188 /* Interface is down; don't allow WOL and PHY 5189 * events to wake up the host 5190 */ 5191 u32 buf; 5192 5193 set_bit(EVENT_DEV_ASLEEP, &dev->flags); 5194 5195 ret = lan78xx_write_reg(dev, WUCSR, 0); 5196 if (ret < 0) 5197 goto out; 5198 ret = lan78xx_write_reg(dev, WUCSR2, 0); 5199 if (ret < 0) 5200 goto out; 5201 5202 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 5203 if (ret < 0) 5204 goto out; 5205 5206 buf &= ~PMT_CTL_RES_CLR_WKP_EN_; 5207 buf |= PMT_CTL_RES_CLR_WKP_STS_; 5208 buf &= ~PMT_CTL_SUS_MODE_MASK_; 5209 buf |= PMT_CTL_SUS_MODE_3_; 5210 5211 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 5212 if (ret < 0) 5213 goto out; 5214 5215 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 5216 if (ret < 0) 5217 goto out; 5218 5219 buf |= PMT_CTL_WUPS_MASK_; 5220 5221 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 5222 if (ret < 0) 5223 goto out; 5224 } 5225 5226 ret = 0; 5227 out: 5228 mutex_unlock(&dev->dev_mutex); 5229 5230 return ret; 5231 } 5232 5233 static bool lan78xx_submit_deferred_urbs(struct lan78xx_net *dev) 5234 { 5235 bool pipe_halted = false; 5236 struct urb *urb; 5237 5238 while ((urb = usb_get_from_anchor(&dev->deferred))) { 5239 struct sk_buff *skb = urb->context; 5240 int ret; 5241 5242 if (!netif_device_present(dev->net) || 5243 !netif_carrier_ok(dev->net) || 5244 pipe_halted) { 5245 lan78xx_release_tx_buf(dev, skb); 5246 usb_put_urb(urb); 5247 continue; 5248 } 5249 5250 ret = usb_submit_urb(urb, GFP_ATOMIC); 5251 usb_put_urb(urb); 5252 5253 if (ret == 0) { 5254 netif_trans_update(dev->net); 5255 lan78xx_queue_skb(&dev->txq, skb, tx_start); 5256 } else { 5257 if (ret == -EPIPE) { 5258 netif_stop_queue(dev->net); 5259 pipe_halted = true; 5260 } else if (ret == -ENODEV) { 5261 netif_device_detach(dev->net); 5262 } 5263 5264 lan78xx_release_tx_buf(dev, skb); 5265 } 5266 } 5267 5268 return pipe_halted; 5269 } 5270 5271 static int lan78xx_resume(struct usb_interface *intf) 5272 { 5273 struct lan78xx_net *dev = usb_get_intfdata(intf); 5274 bool dev_open; 5275 int ret; 5276 5277 mutex_lock(&dev->dev_mutex); 5278 5279 netif_dbg(dev, ifup, dev->net, "resuming device"); 5280 5281 dev_open = test_bit(EVENT_DEV_OPEN, &dev->flags); 5282 5283 if (dev_open) { 5284 bool pipe_halted = false; 5285 5286 ret = lan78xx_flush_tx_fifo(dev); 5287 if (ret < 0) 5288 goto out; 5289 5290 if (dev->urb_intr) { 5291 int ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); 5292 5293 if (ret < 0) { 5294 if (ret == -ENODEV) 5295 netif_device_detach(dev->net); 5296 netdev_warn(dev->net, "Failed to submit intr URB"); 5297 } 5298 } 5299 5300 spin_lock_irq(&dev->txq.lock); 5301 5302 if (netif_device_present(dev->net)) { 5303 pipe_halted = lan78xx_submit_deferred_urbs(dev); 5304 5305 if (pipe_halted) 5306 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 5307 } 5308 5309 clear_bit(EVENT_DEV_ASLEEP, &dev->flags); 5310 5311 spin_unlock_irq(&dev->txq.lock); 5312 5313 if (!pipe_halted && 5314 netif_device_present(dev->net) && 5315 (lan78xx_tx_pend_data_len(dev) < lan78xx_tx_urb_space(dev))) 5316 netif_start_queue(dev->net); 5317 5318 ret = lan78xx_start_tx_path(dev); 5319 if (ret < 0) 5320 goto out; 5321 5322 napi_schedule(&dev->napi); 5323 5324 if (!timer_pending(&dev->stat_monitor)) { 5325 dev->delta = 1; 5326 mod_timer(&dev->stat_monitor, 5327 jiffies + STAT_UPDATE_TIMER); 5328 } 5329 5330 } else { 5331 clear_bit(EVENT_DEV_ASLEEP, &dev->flags); 5332 } 5333 5334 ret = lan78xx_write_reg(dev, WUCSR2, 0); 5335 if (ret < 0) 5336 goto out; 5337 ret = lan78xx_write_reg(dev, WUCSR, 0); 5338 if (ret < 0) 5339 goto out; 5340 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 5341 if (ret < 0) 5342 goto out; 5343 5344 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ | 5345 WUCSR2_ARP_RCD_ | 5346 WUCSR2_IPV6_TCPSYN_RCD_ | 5347 WUCSR2_IPV4_TCPSYN_RCD_); 5348 if (ret < 0) 5349 goto out; 5350 5351 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ | 5352 WUCSR_EEE_RX_WAKE_ | 5353 WUCSR_PFDA_FR_ | 5354 WUCSR_RFE_WAKE_FR_ | 5355 WUCSR_WUFR_ | 5356 WUCSR_MPR_ | 5357 WUCSR_BCST_FR_); 5358 if (ret < 0) 5359 goto out; 5360 5361 ret = 0; 5362 out: 5363 mutex_unlock(&dev->dev_mutex); 5364 5365 return ret; 5366 } 5367 5368 static int lan78xx_reset_resume(struct usb_interface *intf) 5369 { 5370 struct lan78xx_net *dev = usb_get_intfdata(intf); 5371 int ret; 5372 5373 netif_dbg(dev, ifup, dev->net, "(reset) resuming device"); 5374 5375 ret = lan78xx_reset(dev); 5376 if (ret < 0) 5377 return ret; 5378 5379 ret = lan78xx_resume(intf); 5380 if (ret < 0) 5381 return ret; 5382 5383 rtnl_lock(); 5384 phylink_resume(dev->phylink); 5385 rtnl_unlock(); 5386 5387 return 0; 5388 } 5389 5390 static const struct usb_device_id products[] = { 5391 { 5392 /* LAN7800 USB Gigabit Ethernet Device */ 5393 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID), 5394 }, 5395 { 5396 /* LAN7850 USB Gigabit Ethernet Device */ 5397 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID), 5398 }, 5399 { 5400 /* LAN7801 USB Gigabit Ethernet Device */ 5401 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID), 5402 }, 5403 { 5404 /* ATM2-AF USB Gigabit Ethernet Device */ 5405 USB_DEVICE(AT29M2AF_USB_VENDOR_ID, AT29M2AF_USB_PRODUCT_ID), 5406 }, 5407 {}, 5408 }; 5409 MODULE_DEVICE_TABLE(usb, products); 5410 5411 static struct usb_driver lan78xx_driver = { 5412 .name = DRIVER_NAME, 5413 .id_table = products, 5414 .probe = lan78xx_probe, 5415 .disconnect = lan78xx_disconnect, 5416 .suspend = lan78xx_suspend, 5417 .resume = lan78xx_resume, 5418 .reset_resume = lan78xx_reset_resume, 5419 .supports_autosuspend = 1, 5420 .disable_hub_initiated_lpm = 1, 5421 }; 5422 5423 module_usb_driver(lan78xx_driver); 5424 5425 MODULE_AUTHOR(DRIVER_AUTHOR); 5426 MODULE_DESCRIPTION(DRIVER_DESC); 5427 MODULE_LICENSE("GPL"); 5428